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1 | /* |
2 | * Copyright (C) 2012-2013 Linaro Ltd. | |
3 | * Author: Haojian Zhuang <haojian.zhuang@linaro.org> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License version 2 as | |
7 | * publishhed by the Free Software Foundation. | |
8 | */ | |
9 | ||
10 | /dts-v1/; | |
22e99a6d HZ |
11 | |
12 | #include "hi3620.dtsi" | |
fa8962a8 HZ |
13 | |
14 | / { | |
15 | model = "Hisilicon Hi4511 Development Board"; | |
16 | compatible = "hisilicon,hi3620-hi4511"; | |
17 | ||
18 | chosen { | |
14317946 WX |
19 | bootargs = "root=/dev/ram0"; |
20 | stdout-path = "serial0:115200n8"; | |
fa8962a8 HZ |
21 | }; |
22 | ||
23 | memory { | |
24 | device_type = "memory"; | |
25 | reg = <0x40000000 0x20000000>; | |
26 | }; | |
27 | ||
28 | amba { | |
29 | dual_timer0: dual_timer@800000 { | |
30 | status = "ok"; | |
31 | }; | |
32 | ||
33 | uart0: uart@b00000 { /* console */ | |
34 | pinctrl-names = "default", "idle"; | |
35 | pinctrl-0 = <&uart0_pmx_func &uart0_cfg_func>; | |
36 | pinctrl-1 = <&uart0_pmx_idle &uart0_cfg_idle>; | |
37 | status = "ok"; | |
38 | }; | |
39 | ||
40 | uart1: uart@b01000 { /* modem */ | |
41 | pinctrl-names = "default", "idle"; | |
42 | pinctrl-0 = <&uart1_pmx_func &uart1_cfg_func>; | |
43 | pinctrl-1 = <&uart1_pmx_idle &uart1_cfg_idle>; | |
44 | status = "ok"; | |
45 | }; | |
46 | ||
47 | uart2: uart@b02000 { /* audience */ | |
48 | pinctrl-names = "default", "idle"; | |
49 | pinctrl-0 = <&uart2_pmx_func &uart2_cfg_func>; | |
50 | pinctrl-1 = <&uart2_pmx_idle &uart2_cfg_idle>; | |
51 | status = "ok"; | |
52 | }; | |
53 | ||
54 | uart3: uart@b03000 { | |
55 | pinctrl-names = "default", "idle"; | |
56 | pinctrl-0 = <&uart3_pmx_func &uart3_cfg_func>; | |
57 | pinctrl-1 = <&uart3_pmx_idle &uart3_cfg_idle>; | |
58 | status = "ok"; | |
59 | }; | |
60 | ||
61 | uart4: uart@b04000 { | |
62 | pinctrl-names = "default", "idle"; | |
63 | pinctrl-0 = <&uart4_pmx_func &uart4_cfg_func>; | |
64 | pinctrl-1 = <&uart4_pmx_idle &uart4_cfg_func>; | |
65 | status = "ok"; | |
66 | }; | |
67 | ||
68 | pmx0: pinmux@803000 { | |
69 | pinctrl-names = "default"; | |
70 | pinctrl-0 = <&board_pmx_pins>; | |
71 | ||
72 | board_pmx_pins: board_pmx_pins { | |
73 | pinctrl-single,pins = < | |
74 | 0x008 0x0 /* GPIO -- eFUSE_DOUT */ | |
75 | 0x100 0x0 /* USIM_CLK & USIM_DATA (IOMG63) */ | |
76 | >; | |
77 | }; | |
78 | uart0_pmx_func: uart0_pmx_func { | |
79 | pinctrl-single,pins = < | |
80 | 0x0f0 0x0 | |
81 | 0x0f4 0x0 /* UART0_RX & UART0_TX */ | |
82 | >; | |
83 | }; | |
84 | uart0_pmx_idle: uart0_pmx_idle { | |
85 | pinctrl-single,pins = < | |
86 | /*0x0f0 0x1*/ /* UART0_CTS & UART0_RTS */ | |
87 | 0x0f4 0x1 /* UART0_RX & UART0_TX */ | |
88 | >; | |
89 | }; | |
90 | uart1_pmx_func: uart1_pmx_func { | |
91 | pinctrl-single,pins = < | |
92 | 0x0f8 0x0 /* UART1_CTS & UART1_RTS (IOMG61) */ | |
93 | 0x0fc 0x0 /* UART1_RX & UART1_TX (IOMG62) */ | |
94 | >; | |
95 | }; | |
96 | uart1_pmx_idle: uart1_pmx_idle { | |
97 | pinctrl-single,pins = < | |
98 | 0x0f8 0x1 /* GPIO (IOMG61) */ | |
99 | 0x0fc 0x1 /* GPIO (IOMG62) */ | |
100 | >; | |
101 | }; | |
102 | uart2_pmx_func: uart2_pmx_func { | |
103 | pinctrl-single,pins = < | |
104 | 0x104 0x2 /* UART2_RXD (IOMG96) */ | |
105 | 0x108 0x2 /* UART2_TXD (IOMG64) */ | |
106 | >; | |
107 | }; | |
108 | uart2_pmx_idle: uart2_pmx_idle { | |
109 | pinctrl-single,pins = < | |
110 | 0x104 0x1 /* GPIO (IOMG96) */ | |
111 | 0x108 0x1 /* GPIO (IOMG64) */ | |
112 | >; | |
113 | }; | |
114 | uart3_pmx_func: uart3_pmx_func { | |
115 | pinctrl-single,pins = < | |
116 | 0x160 0x2 /* UART3_CTS & UART3_RTS (IOMG85) */ | |
117 | 0x164 0x2 /* UART3_RXD & UART3_TXD (IOMG86) */ | |
118 | >; | |
119 | }; | |
120 | uart3_pmx_idle: uart3_pmx_idle { | |
121 | pinctrl-single,pins = < | |
122 | 0x160 0x1 /* GPIO (IOMG85) */ | |
123 | 0x164 0x1 /* GPIO (IOMG86) */ | |
124 | >; | |
125 | }; | |
126 | uart4_pmx_func: uart4_pmx_func { | |
127 | pinctrl-single,pins = < | |
128 | 0x168 0x0 /* UART4_CTS & UART4_RTS (IOMG87) */ | |
129 | 0x16c 0x0 /* UART4_RXD (IOMG88) */ | |
130 | 0x170 0x0 /* UART4_TXD (IOMG93) */ | |
131 | >; | |
132 | }; | |
133 | uart4_pmx_idle: uart4_pmx_idle { | |
134 | pinctrl-single,pins = < | |
135 | 0x168 0x1 /* GPIO (IOMG87) */ | |
136 | 0x16c 0x1 /* GPIO (IOMG88) */ | |
137 | 0x170 0x1 /* GPIO (IOMG93) */ | |
138 | >; | |
139 | }; | |
140 | i2c0_pmx_func: i2c0_pmx_func { | |
141 | pinctrl-single,pins = < | |
142 | 0x0b4 0x0 /* I2C0_SCL & I2C0_SDA (IOMG45) */ | |
143 | >; | |
144 | }; | |
145 | i2c0_pmx_idle: i2c0_pmx_idle { | |
146 | pinctrl-single,pins = < | |
147 | 0x0b4 0x1 /* GPIO (IOMG45) */ | |
148 | >; | |
149 | }; | |
150 | i2c1_pmx_func: i2c1_pmx_func { | |
151 | pinctrl-single,pins = < | |
152 | 0x0b8 0x0 /* I2C1_SCL & I2C1_SDA (IOMG46) */ | |
153 | >; | |
154 | }; | |
155 | i2c1_pmx_idle: i2c1_pmx_idle { | |
156 | pinctrl-single,pins = < | |
157 | 0x0b8 0x1 /* GPIO (IOMG46) */ | |
158 | >; | |
159 | }; | |
160 | i2c2_pmx_func: i2c2_pmx_func { | |
161 | pinctrl-single,pins = < | |
162 | 0x068 0x0 /* I2C2_SCL (IOMG26) */ | |
163 | 0x06c 0x0 /* I2C2_SDA (IOMG27) */ | |
164 | >; | |
165 | }; | |
166 | i2c2_pmx_idle: i2c2_pmx_idle { | |
167 | pinctrl-single,pins = < | |
168 | 0x068 0x1 /* GPIO (IOMG26) */ | |
169 | 0x06c 0x1 /* GPIO (IOMG27) */ | |
170 | >; | |
171 | }; | |
172 | i2c3_pmx_func: i2c3_pmx_func { | |
173 | pinctrl-single,pins = < | |
174 | 0x050 0x2 /* I2C3_SCL (IOMG20) */ | |
175 | 0x054 0x2 /* I2C3_SDA (IOMG21) */ | |
176 | >; | |
177 | }; | |
178 | i2c3_pmx_idle: i2c3_pmx_idle { | |
179 | pinctrl-single,pins = < | |
180 | 0x050 0x1 /* GPIO (IOMG20) */ | |
181 | 0x054 0x1 /* GPIO (IOMG21) */ | |
182 | >; | |
183 | }; | |
184 | spi0_pmx_func: spi0_pmx_func { | |
185 | pinctrl-single,pins = < | |
186 | 0x0d4 0x0 /* SPI0_CLK/SPI0_DI/SPI0_DO (IOMG53) */ | |
187 | 0x0d8 0x0 /* SPI0_CS0 (IOMG54) */ | |
188 | 0x0dc 0x0 /* SPI0_CS1 (IOMG55) */ | |
189 | 0x0e0 0x0 /* SPI0_CS2 (IOMG56) */ | |
190 | 0x0e4 0x0 /* SPI0_CS3 (IOMG57) */ | |
191 | >; | |
192 | }; | |
193 | spi0_pmx_idle: spi0_pmx_idle { | |
194 | pinctrl-single,pins = < | |
195 | 0x0d4 0x1 /* GPIO (IOMG53) */ | |
196 | 0x0d8 0x1 /* GPIO (IOMG54) */ | |
197 | 0x0dc 0x1 /* GPIO (IOMG55) */ | |
198 | 0x0e0 0x1 /* GPIO (IOMG56) */ | |
199 | 0x0e4 0x1 /* GPIO (IOMG57) */ | |
200 | >; | |
201 | }; | |
202 | spi1_pmx_func: spi1_pmx_func { | |
203 | pinctrl-single,pins = < | |
204 | 0x184 0x0 /* SPI1_CLK/SPI1_DI (IOMG98) */ | |
205 | 0x0e8 0x0 /* SPI1_DO (IOMG58) */ | |
206 | 0x0ec 0x0 /* SPI1_CS (IOMG95) */ | |
207 | >; | |
208 | }; | |
209 | spi1_pmx_idle: spi1_pmx_idle { | |
210 | pinctrl-single,pins = < | |
211 | 0x184 0x1 /* GPIO (IOMG98) */ | |
212 | 0x0e8 0x1 /* GPIO (IOMG58) */ | |
213 | 0x0ec 0x1 /* GPIO (IOMG95) */ | |
214 | >; | |
215 | }; | |
216 | kpc_pmx_func: kpc_pmx_func { | |
217 | pinctrl-single,pins = < | |
218 | 0x12c 0x0 /* KEY_IN0 (IOMG73) */ | |
219 | 0x130 0x0 /* KEY_IN1 (IOMG74) */ | |
220 | 0x134 0x0 /* KEY_IN2 (IOMG75) */ | |
221 | 0x10c 0x0 /* KEY_OUT0 (IOMG65) */ | |
222 | 0x110 0x0 /* KEY_OUT1 (IOMG66) */ | |
223 | 0x114 0x0 /* KEY_OUT2 (IOMG67) */ | |
224 | >; | |
225 | }; | |
226 | kpc_pmx_idle: kpc_pmx_idle { | |
227 | pinctrl-single,pins = < | |
228 | 0x12c 0x1 /* GPIO (IOMG73) */ | |
229 | 0x130 0x1 /* GPIO (IOMG74) */ | |
230 | 0x134 0x1 /* GPIO (IOMG75) */ | |
231 | 0x10c 0x1 /* GPIO (IOMG65) */ | |
232 | 0x110 0x1 /* GPIO (IOMG66) */ | |
233 | 0x114 0x1 /* GPIO (IOMG67) */ | |
234 | >; | |
235 | }; | |
236 | gpio_key_func: gpio_key_func { | |
237 | pinctrl-single,pins = < | |
238 | 0x10c 0x1 /* KEY_OUT0/GPIO (IOMG65) */ | |
239 | 0x130 0x1 /* KEY_IN1/GPIO (IOMG74) */ | |
240 | >; | |
241 | }; | |
242 | emmc_pmx_func: emmc_pmx_func { | |
243 | pinctrl-single,pins = < | |
244 | 0x030 0x2 /* eMMC_CMD/eMMC_CLK (IOMG12) */ | |
245 | 0x018 0x0 /* NAND_CS3_N (IOMG6) */ | |
246 | 0x024 0x0 /* NAND_BUSY2_N (IOMG8) */ | |
247 | 0x028 0x0 /* NAND_BUSY3_N (IOMG9) */ | |
248 | 0x02c 0x2 /* eMMC_DATA[0:7] (IOMG10) */ | |
249 | >; | |
250 | }; | |
251 | emmc_pmx_idle: emmc_pmx_idle { | |
252 | pinctrl-single,pins = < | |
253 | 0x030 0x0 /* GPIO (IOMG12) */ | |
254 | 0x018 0x1 /* GPIO (IOMG6) */ | |
255 | 0x024 0x1 /* GPIO (IOMG8) */ | |
256 | 0x028 0x1 /* GPIO (IOMG9) */ | |
257 | 0x02c 0x1 /* GPIO (IOMG10) */ | |
258 | >; | |
259 | }; | |
260 | sd_pmx_func: sd_pmx_func { | |
261 | pinctrl-single,pins = < | |
262 | 0x0bc 0x0 /* SD_CLK/SD_CMD/SD_DATA0/SD_DATA1/SD_DATA2 (IOMG47) */ | |
263 | 0x0c0 0x0 /* SD_DATA3 (IOMG48) */ | |
264 | >; | |
265 | }; | |
266 | sd_pmx_idle: sd_pmx_idle { | |
267 | pinctrl-single,pins = < | |
268 | 0x0bc 0x1 /* GPIO (IOMG47) */ | |
269 | 0x0c0 0x1 /* GPIO (IOMG48) */ | |
270 | >; | |
271 | }; | |
272 | nand_pmx_func: nand_pmx_func { | |
273 | pinctrl-single,pins = < | |
274 | 0x00c 0x0 /* NAND_ALE/NAND_CLE/.../NAND_DATA[0:7] (IOMG3) */ | |
275 | 0x010 0x0 /* NAND_CS1_N (IOMG4) */ | |
276 | 0x014 0x0 /* NAND_CS2_N (IOMG5) */ | |
277 | 0x018 0x0 /* NAND_CS3_N (IOMG6) */ | |
278 | 0x01c 0x0 /* NAND_BUSY0_N (IOMG94) */ | |
279 | 0x020 0x0 /* NAND_BUSY1_N (IOMG7) */ | |
280 | 0x024 0x0 /* NAND_BUSY2_N (IOMG8) */ | |
281 | 0x028 0x0 /* NAND_BUSY3_N (IOMG9) */ | |
282 | 0x02c 0x0 /* NAND_DATA[8:15] (IOMG10) */ | |
283 | >; | |
284 | }; | |
285 | nand_pmx_idle: nand_pmx_idle { | |
286 | pinctrl-single,pins = < | |
287 | 0x00c 0x1 /* GPIO (IOMG3) */ | |
288 | 0x010 0x1 /* GPIO (IOMG4) */ | |
289 | 0x014 0x1 /* GPIO (IOMG5) */ | |
290 | 0x018 0x1 /* GPIO (IOMG6) */ | |
291 | 0x01c 0x1 /* GPIO (IOMG94) */ | |
292 | 0x020 0x1 /* GPIO (IOMG7) */ | |
293 | 0x024 0x1 /* GPIO (IOMG8) */ | |
294 | 0x028 0x1 /* GPIO (IOMG9) */ | |
295 | 0x02c 0x1 /* GPIO (IOMG10) */ | |
296 | >; | |
297 | }; | |
298 | sdio_pmx_func: sdio_pmx_func { | |
299 | pinctrl-single,pins = < | |
300 | 0x0c4 0x0 /* SDIO_CLK/SDIO_CMD/SDIO_DATA[0:3] (IOMG49) */ | |
301 | >; | |
302 | }; | |
303 | sdio_pmx_idle: sdio_pmx_idle { | |
304 | pinctrl-single,pins = < | |
305 | 0x0c4 0x1 /* GPIO (IOMG49) */ | |
306 | >; | |
307 | }; | |
308 | audio_out_pmx_func: audio_out_pmx_func { | |
309 | pinctrl-single,pins = < | |
310 | 0x0f0 0x1 /* GPIO (IOMG59), audio spk & earphone */ | |
311 | >; | |
312 | }; | |
313 | }; | |
314 | ||
315 | pmx1: pinmux@803800 { | |
316 | pinctrl-names = "default"; | |
317 | pinctrl-0 = < &board_pu_pins &board_pd_pins &board_pd_ps_pins | |
318 | &board_np_pins &board_ps_pins &kpc_cfg_func | |
319 | &audio_out_cfg_func>; | |
320 | board_pu_pins: board_pu_pins { | |
321 | pinctrl-single,pins = < | |
322 | 0x014 0 /* GPIO_158 (IOCFG2) */ | |
323 | 0x018 0 /* GPIO_159 (IOCFG3) */ | |
324 | 0x01c 0 /* BOOT_MODE0 (IOCFG4) */ | |
325 | 0x020 0 /* BOOT_MODE1 (IOCFG5) */ | |
326 | >; | |
327 | pinctrl-single,bias-pulldown = <0 2 0 2>; | |
328 | pinctrl-single,bias-pullup = <1 1 0 1>; | |
329 | }; | |
330 | board_pd_pins: board_pd_pins { | |
331 | pinctrl-single,pins = < | |
332 | 0x038 0 /* eFUSE_DOUT (IOCFG11) */ | |
333 | 0x150 0 /* ISP_GPIO8 (IOCFG93) */ | |
334 | 0x154 0 /* ISP_GPIO9 (IOCFG94) */ | |
335 | >; | |
336 | pinctrl-single,bias-pulldown = <2 2 0 2>; | |
337 | pinctrl-single,bias-pullup = <0 1 0 1>; | |
338 | }; | |
339 | board_pd_ps_pins: board_pd_ps_pins { | |
340 | pinctrl-single,pins = < | |
341 | 0x2d8 0 /* CLK_OUT0 (IOCFG190) */ | |
342 | 0x004 0 /* PMU_SPI_DATA (IOCFG192) */ | |
343 | >; | |
344 | pinctrl-single,bias-pulldown = <2 2 0 2>; | |
345 | pinctrl-single,bias-pullup = <0 1 0 1>; | |
346 | pinctrl-single,drive-strength = <0x30 0xf0>; | |
347 | }; | |
348 | board_np_pins: board_np_pins { | |
349 | pinctrl-single,pins = < | |
350 | 0x24c 0 /* KEYPAD_OUT7 (IOCFG155) */ | |
351 | >; | |
352 | pinctrl-single,bias-pulldown = <0 2 0 2>; | |
353 | pinctrl-single,bias-pullup = <0 1 0 1>; | |
354 | }; | |
355 | board_ps_pins: board_ps_pins { | |
356 | pinctrl-single,pins = < | |
357 | 0x000 0 /* PMU_SPI_CLK (IOCFG191) */ | |
358 | 0x008 0 /* PMU_SPI_CS_N (IOCFG193) */ | |
359 | >; | |
360 | pinctrl-single,drive-strength = <0x30 0xf0>; | |
361 | }; | |
362 | uart0_cfg_func: uart0_cfg_func { | |
363 | pinctrl-single,pins = < | |
364 | 0x208 0 /* UART0_RXD (IOCFG138) */ | |
365 | 0x20c 0 /* UART0_TXD (IOCFG139) */ | |
366 | >; | |
367 | pinctrl-single,bias-pulldown = <0 2 0 2>; | |
368 | pinctrl-single,bias-pullup = <0 1 0 1>; | |
369 | }; | |
370 | uart0_cfg_idle: uart0_cfg_idle { | |
371 | pinctrl-single,pins = < | |
372 | 0x208 0 /* UART0_RXD (IOCFG138) */ | |
373 | 0x20c 0 /* UART0_TXD (IOCFG139) */ | |
374 | >; | |
375 | pinctrl-single,bias-pulldown = <2 2 0 2>; | |
376 | pinctrl-single,bias-pullup = <0 1 0 1>; | |
377 | }; | |
378 | uart1_cfg_func: uart1_cfg_func { | |
379 | pinctrl-single,pins = < | |
380 | 0x210 0 /* UART1_CTS (IOCFG140) */ | |
381 | 0x214 0 /* UART1_RTS (IOCFG141) */ | |
382 | 0x218 0 /* UART1_RXD (IOCFG142) */ | |
383 | 0x21c 0 /* UART1_TXD (IOCFG143) */ | |
384 | >; | |
385 | pinctrl-single,bias-pulldown = <0 2 0 2>; | |
386 | pinctrl-single,bias-pullup = <0 1 0 1>; | |
387 | }; | |
388 | uart1_cfg_idle: uart1_cfg_idle { | |
389 | pinctrl-single,pins = < | |
390 | 0x210 0 /* UART1_CTS (IOCFG140) */ | |
391 | 0x214 0 /* UART1_RTS (IOCFG141) */ | |
392 | 0x218 0 /* UART1_RXD (IOCFG142) */ | |
393 | 0x21c 0 /* UART1_TXD (IOCFG143) */ | |
394 | >; | |
395 | pinctrl-single,bias-pulldown = <2 2 0 2>; | |
396 | pinctrl-single,bias-pullup = <0 1 0 1>; | |
397 | }; | |
398 | uart2_cfg_func: uart2_cfg_func { | |
399 | pinctrl-single,pins = < | |
400 | 0x220 0 /* UART2_CTS (IOCFG144) */ | |
401 | 0x224 0 /* UART2_RTS (IOCFG145) */ | |
402 | 0x228 0 /* UART2_RXD (IOCFG146) */ | |
403 | 0x22c 0 /* UART2_TXD (IOCFG147) */ | |
404 | >; | |
405 | pinctrl-single,bias-pulldown = <0 2 0 2>; | |
406 | pinctrl-single,bias-pullup = <0 1 0 1>; | |
407 | }; | |
408 | uart2_cfg_idle: uart2_cfg_idle { | |
409 | pinctrl-single,pins = < | |
410 | 0x220 0 /* GPIO (IOCFG144) */ | |
411 | 0x224 0 /* GPIO (IOCFG145) */ | |
412 | 0x228 0 /* GPIO (IOCFG146) */ | |
413 | 0x22c 0 /* GPIO (IOCFG147) */ | |
414 | >; | |
415 | pinctrl-single,bias-pulldown = <2 2 0 2>; | |
416 | pinctrl-single,bias-pullup = <0 1 0 1>; | |
417 | }; | |
418 | uart3_cfg_func: uart3_cfg_func { | |
419 | pinctrl-single,pins = < | |
420 | 0x294 0 /* UART3_CTS (IOCFG173) */ | |
421 | 0x298 0 /* UART3_RTS (IOCFG174) */ | |
422 | 0x29c 0 /* UART3_RXD (IOCFG175) */ | |
423 | 0x2a0 0 /* UART3_TXD (IOCFG176) */ | |
424 | >; | |
425 | pinctrl-single,bias-pulldown = <0 2 0 2>; | |
426 | pinctrl-single,bias-pullup = <0 1 0 1>; | |
427 | }; | |
428 | uart3_cfg_idle: uart3_cfg_idle { | |
429 | pinctrl-single,pins = < | |
430 | 0x294 0 /* UART3_CTS (IOCFG173) */ | |
431 | 0x298 0 /* UART3_RTS (IOCFG174) */ | |
432 | 0x29c 0 /* UART3_RXD (IOCFG175) */ | |
433 | 0x2a0 0 /* UART3_TXD (IOCFG176) */ | |
434 | >; | |
435 | pinctrl-single,bias-pulldown = <2 2 0 2>; | |
436 | pinctrl-single,bias-pullup = <0 1 0 1>; | |
437 | }; | |
438 | uart4_cfg_func: uart4_cfg_func { | |
439 | pinctrl-single,pins = < | |
440 | 0x2a4 0 /* UART4_CTS (IOCFG177) */ | |
441 | 0x2a8 0 /* UART4_RTS (IOCFG178) */ | |
442 | 0x2ac 0 /* UART4_RXD (IOCFG179) */ | |
443 | 0x2b0 0 /* UART4_TXD (IOCFG180) */ | |
444 | >; | |
445 | pinctrl-single,bias-pulldown = <0 2 0 2>; | |
446 | pinctrl-single,bias-pullup = <0 1 0 1>; | |
447 | }; | |
448 | i2c0_cfg_func: i2c0_cfg_func { | |
449 | pinctrl-single,pins = < | |
450 | 0x17c 0 /* I2C0_SCL (IOCFG103) */ | |
451 | 0x180 0 /* I2C0_SDA (IOCFG104) */ | |
452 | >; | |
453 | pinctrl-single,bias-pulldown = <0 2 0 2>; | |
454 | pinctrl-single,bias-pullup = <0 1 0 1>; | |
455 | pinctrl-single,drive-strength = <0x30 0xf0>; | |
456 | }; | |
457 | i2c1_cfg_func: i2c1_cfg_func { | |
458 | pinctrl-single,pins = < | |
459 | 0x184 0 /* I2C1_SCL (IOCFG105) */ | |
460 | 0x188 0 /* I2C1_SDA (IOCFG106) */ | |
461 | >; | |
462 | pinctrl-single,bias-pulldown = <0 2 0 2>; | |
463 | pinctrl-single,bias-pullup = <0 1 0 1>; | |
464 | pinctrl-single,drive-strength = <0x30 0xf0>; | |
465 | }; | |
466 | i2c2_cfg_func: i2c2_cfg_func { | |
467 | pinctrl-single,pins = < | |
468 | 0x118 0 /* I2C2_SCL (IOCFG79) */ | |
469 | 0x11c 0 /* I2C2_SDA (IOCFG80) */ | |
470 | >; | |
471 | pinctrl-single,bias-pulldown = <0 2 0 2>; | |
472 | pinctrl-single,bias-pullup = <0 1 0 1>; | |
473 | pinctrl-single,drive-strength = <0x30 0xf0>; | |
474 | }; | |
475 | i2c3_cfg_func: i2c3_cfg_func { | |
476 | pinctrl-single,pins = < | |
477 | 0x100 0 /* I2C3_SCL (IOCFG73) */ | |
478 | 0x104 0 /* I2C3_SDA (IOCFG74) */ | |
479 | >; | |
480 | pinctrl-single,bias-pulldown = <0 2 0 2>; | |
481 | pinctrl-single,bias-pullup = <0 1 0 1>; | |
482 | pinctrl-single,drive-strength = <0x30 0xf0>; | |
483 | }; | |
484 | spi0_cfg_func1: spi0_cfg_func1 { | |
485 | pinctrl-single,pins = < | |
486 | 0x1d4 0 /* SPI0_CLK (IOCFG125) */ | |
487 | 0x1d8 0 /* SPI0_DI (IOCFG126) */ | |
488 | 0x1dc 0 /* SPI0_DO (IOCFG127) */ | |
489 | >; | |
490 | pinctrl-single,bias-pulldown = <2 2 0 2>; | |
491 | pinctrl-single,bias-pullup = <0 1 0 1>; | |
492 | pinctrl-single,drive-strength = <0x30 0xf0>; | |
493 | }; | |
494 | spi0_cfg_func2: spi0_cfg_func2 { | |
495 | pinctrl-single,pins = < | |
496 | 0x1e0 0 /* SPI0_CS0 (IOCFG128) */ | |
497 | 0x1e4 0 /* SPI0_CS1 (IOCFG129) */ | |
498 | 0x1e8 0 /* SPI0_CS2 (IOCFG130 */ | |
499 | 0x1ec 0 /* SPI0_CS3 (IOCFG131) */ | |
500 | >; | |
501 | pinctrl-single,bias-pulldown = <0 2 0 2>; | |
502 | pinctrl-single,bias-pullup = <1 1 0 1>; | |
503 | pinctrl-single,drive-strength = <0x30 0xf0>; | |
504 | }; | |
505 | spi1_cfg_func1: spi1_cfg_func1 { | |
506 | pinctrl-single,pins = < | |
507 | 0x1f0 0 /* SPI1_CLK (IOCFG132) */ | |
508 | 0x1f4 0 /* SPI1_DI (IOCFG133) */ | |
509 | 0x1f8 0 /* SPI1_DO (IOCFG134) */ | |
510 | >; | |
511 | pinctrl-single,bias-pulldown = <2 2 0 2>; | |
512 | pinctrl-single,bias-pullup = <0 1 0 1>; | |
513 | pinctrl-single,drive-strength = <0x30 0xf0>; | |
514 | }; | |
515 | spi1_cfg_func2: spi1_cfg_func2 { | |
516 | pinctrl-single,pins = < | |
517 | 0x1fc 0 /* SPI1_CS (IOCFG135) */ | |
518 | >; | |
519 | pinctrl-single,bias-pulldown = <0 2 0 2>; | |
520 | pinctrl-single,bias-pullup = <1 1 0 1>; | |
521 | pinctrl-single,drive-strength = <0x30 0xf0>; | |
522 | }; | |
523 | kpc_cfg_func: kpc_cfg_func { | |
524 | pinctrl-single,pins = < | |
525 | 0x250 0 /* KEY_IN0 (IOCFG156) */ | |
526 | 0x254 0 /* KEY_IN1 (IOCFG157) */ | |
527 | 0x258 0 /* KEY_IN2 (IOCFG158) */ | |
528 | 0x230 0 /* KEY_OUT0 (IOCFG148) */ | |
529 | 0x234 0 /* KEY_OUT1 (IOCFG149) */ | |
530 | 0x238 0 /* KEY_OUT2 (IOCFG150) */ | |
531 | >; | |
532 | pinctrl-single,bias-pulldown = <2 2 0 2>; | |
533 | pinctrl-single,bias-pullup = <0 1 0 1>; | |
534 | }; | |
535 | emmc_cfg_func: emmc_cfg_func { | |
536 | pinctrl-single,pins = < | |
537 | 0x0ac 0 /* eMMC_CMD (IOCFG40) */ | |
538 | 0x0b0 0 /* eMMC_CLK (IOCFG41) */ | |
539 | 0x058 0 /* NAND_CS3_N (IOCFG19) */ | |
540 | 0x064 0 /* NAND_BUSY2_N (IOCFG22) */ | |
541 | 0x068 0 /* NAND_BUSY3_N (IOCFG23) */ | |
542 | 0x08c 0 /* NAND_DATA8 (IOCFG32) */ | |
543 | 0x090 0 /* NAND_DATA9 (IOCFG33) */ | |
544 | 0x094 0 /* NAND_DATA10 (IOCFG34) */ | |
545 | 0x098 0 /* NAND_DATA11 (IOCFG35) */ | |
546 | 0x09c 0 /* NAND_DATA12 (IOCFG36) */ | |
547 | 0x0a0 0 /* NAND_DATA13 (IOCFG37) */ | |
548 | 0x0a4 0 /* NAND_DATA14 (IOCFG38) */ | |
549 | 0x0a8 0 /* NAND_DATA15 (IOCFG39) */ | |
550 | >; | |
551 | pinctrl-single,bias-pulldown = <0 2 0 2>; | |
552 | pinctrl-single,bias-pullup = <1 1 0 1>; | |
553 | pinctrl-single,drive-strength = <0x30 0xf0>; | |
554 | }; | |
555 | sd_cfg_func1: sd_cfg_func1 { | |
556 | pinctrl-single,pins = < | |
557 | 0x18c 0 /* SD_CLK (IOCFG107) */ | |
558 | 0x190 0 /* SD_CMD (IOCFG108) */ | |
559 | >; | |
560 | pinctrl-single,bias-pulldown = <2 2 0 2>; | |
561 | pinctrl-single,bias-pullup = <0 1 0 1>; | |
562 | pinctrl-single,drive-strength = <0x30 0xf0>; | |
563 | }; | |
564 | sd_cfg_func2: sd_cfg_func2 { | |
565 | pinctrl-single,pins = < | |
566 | 0x194 0 /* SD_DATA0 (IOCFG109) */ | |
567 | 0x198 0 /* SD_DATA1 (IOCFG110) */ | |
568 | 0x19c 0 /* SD_DATA2 (IOCFG111) */ | |
569 | 0x1a0 0 /* SD_DATA3 (IOCFG112) */ | |
570 | >; | |
571 | pinctrl-single,bias-pulldown = <2 2 0 2>; | |
572 | pinctrl-single,bias-pullup = <0 1 0 1>; | |
573 | pinctrl-single,drive-strength = <0x70 0xf0>; | |
574 | }; | |
575 | nand_cfg_func1: nand_cfg_func1 { | |
576 | pinctrl-single,pins = < | |
577 | 0x03c 0 /* NAND_ALE (IOCFG12) */ | |
578 | 0x040 0 /* NAND_CLE (IOCFG13) */ | |
579 | 0x06c 0 /* NAND_DATA0 (IOCFG24) */ | |
580 | 0x070 0 /* NAND_DATA1 (IOCFG25) */ | |
581 | 0x074 0 /* NAND_DATA2 (IOCFG26) */ | |
582 | 0x078 0 /* NAND_DATA3 (IOCFG27) */ | |
583 | 0x07c 0 /* NAND_DATA4 (IOCFG28) */ | |
584 | 0x080 0 /* NAND_DATA5 (IOCFG29) */ | |
585 | 0x084 0 /* NAND_DATA6 (IOCFG30) */ | |
586 | 0x088 0 /* NAND_DATA7 (IOCFG31) */ | |
587 | 0x08c 0 /* NAND_DATA8 (IOCFG32) */ | |
588 | 0x090 0 /* NAND_DATA9 (IOCFG33) */ | |
589 | 0x094 0 /* NAND_DATA10 (IOCFG34) */ | |
590 | 0x098 0 /* NAND_DATA11 (IOCFG35) */ | |
591 | 0x09c 0 /* NAND_DATA12 (IOCFG36) */ | |
592 | 0x0a0 0 /* NAND_DATA13 (IOCFG37) */ | |
593 | 0x0a4 0 /* NAND_DATA14 (IOCFG38) */ | |
594 | 0x0a8 0 /* NAND_DATA15 (IOCFG39) */ | |
595 | >; | |
596 | pinctrl-single,bias-pulldown = <2 2 0 2>; | |
597 | pinctrl-single,bias-pullup = <0 1 0 1>; | |
598 | pinctrl-single,drive-strength = <0x30 0xf0>; | |
599 | }; | |
600 | nand_cfg_func2: nand_cfg_func2 { | |
601 | pinctrl-single,pins = < | |
602 | 0x044 0 /* NAND_RE_N (IOCFG14) */ | |
603 | 0x048 0 /* NAND_WE_N (IOCFG15) */ | |
604 | 0x04c 0 /* NAND_CS0_N (IOCFG16) */ | |
605 | 0x050 0 /* NAND_CS1_N (IOCFG17) */ | |
606 | 0x054 0 /* NAND_CS2_N (IOCFG18) */ | |
607 | 0x058 0 /* NAND_CS3_N (IOCFG19) */ | |
608 | 0x05c 0 /* NAND_BUSY0_N (IOCFG20) */ | |
609 | 0x060 0 /* NAND_BUSY1_N (IOCFG21) */ | |
610 | 0x064 0 /* NAND_BUSY2_N (IOCFG22) */ | |
611 | 0x068 0 /* NAND_BUSY3_N (IOCFG23) */ | |
612 | >; | |
613 | pinctrl-single,bias-pulldown = <0 2 0 2>; | |
614 | pinctrl-single,bias-pullup = <1 1 0 1>; | |
615 | pinctrl-single,drive-strength = <0x30 0xf0>; | |
616 | }; | |
617 | sdio_cfg_func: sdio_cfg_func { | |
618 | pinctrl-single,pins = < | |
619 | 0x1a4 0 /* SDIO0_CLK (IOCG113) */ | |
620 | 0x1a8 0 /* SDIO0_CMD (IOCG114) */ | |
621 | 0x1ac 0 /* SDIO0_DATA0 (IOCG115) */ | |
622 | 0x1b0 0 /* SDIO0_DATA1 (IOCG116) */ | |
623 | 0x1b4 0 /* SDIO0_DATA2 (IOCG117) */ | |
624 | 0x1b8 0 /* SDIO0_DATA3 (IOCG118) */ | |
625 | >; | |
626 | pinctrl-single,bias-pulldown = <2 2 0 2>; | |
627 | pinctrl-single,bias-pullup = <0 1 0 1>; | |
628 | pinctrl-single,drive-strength = <0x30 0xf0>; | |
629 | }; | |
630 | audio_out_cfg_func: audio_out_cfg_func { | |
631 | pinctrl-single,pins = < | |
632 | 0x200 0 /* GPIO (IOCFG136) */ | |
633 | 0x204 0 /* GPIO (IOCFG137) */ | |
634 | >; | |
635 | pinctrl-single,bias-pulldown = <2 2 0 2>; | |
636 | pinctrl-single,bias-pullup = <0 1 0 1>; | |
637 | }; | |
638 | }; | |
639 | }; | |
640 | ||
641 | gpio-keys { | |
642 | compatible = "gpio-keys"; | |
643 | ||
644 | call { | |
645 | label = "call"; | |
646 | gpios = <&gpio17 2 0>; | |
647 | linux,code = <169>; /* KEY_PHONE */ | |
648 | }; | |
649 | }; | |
650 | }; |