[mirror_ubuntu-bionic-kernel.git] / arch / arm / boot / dts / imx25.dtsi

/*
 * Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
 *
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

#include "skeleton.dtsi"
#include "imx25-pinfunc.h"

/ {
	aliases {
		ethernet0 = &fec;
		gpio0 = &gpio1;
		gpio1 = &gpio2;
		gpio2 = &gpio3;
		gpio3 = &gpio4;
		i2c0 = &i2c1;
		i2c1 = &i2c2;
		i2c2 = &i2c3;
		serial0 = &uart1;
		serial1 = &uart2;
		serial2 = &uart3;
		serial3 = &uart4;
		serial4 = &uart5;
		spi0 = &spi1;
		spi1 = &spi2;
		spi2 = &spi3;
		usb0 = &usbotg;
		usb1 = &usbhost1;
	};

	cpus {
		#address-cells = <0>;
		#size-cells = <0>;

		cpu {
			compatible = "arm,arm926ej-s";
			device_type = "cpu";
		};
	};

	asic: asic-interrupt-controller@68000000 {
		compatible = "fsl,imx25-asic", "fsl,avic";
		interrupt-controller;
		#interrupt-cells = <1>;
		reg = <0x68000000 0x8000000>;
	};

	clocks {
		#address-cells = <1>;
		#size-cells = <0>;

		osc {
			compatible = "fsl,imx-osc", "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <24000000>;
		};
	};

	soc {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "simple-bus";
		interrupt-parent = <&asic>;
		ranges;

		aips@43f00000 { /* AIPS1 */
			compatible = "fsl,aips-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x43f00000 0x100000>;
			ranges;

			i2c1: i2c@43f80000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
				reg = <0x43f80000 0x4000>;
				clocks = <&clks 48>;
				clock-names = "";
				interrupts = <3>;
				status = "disabled";
			};

			i2c3: i2c@43f84000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
				reg = <0x43f84000 0x4000>;
				clocks = <&clks 48>;
				clock-names = "";
				interrupts = <10>;
				status = "disabled";
			};

			can1: can@43f88000 {
				compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
				reg = <0x43f88000 0x4000>;
				interrupts = <43>;
				clocks = <&clks 75>, <&clks 75>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			can2: can@43f8c000 {
				compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
				reg = <0x43f8c000 0x4000>;
				interrupts = <44>;
				clocks = <&clks 76>, <&clks 76>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			uart1: serial@43f90000 {
				compatible = "fsl,imx25-uart", "fsl,imx21-uart";
				reg = <0x43f90000 0x4000>;
				interrupts = <45>;
				clocks = <&clks 120>, <&clks 57>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			uart2: serial@43f94000 {
				compatible = "fsl,imx25-uart", "fsl,imx21-uart";
				reg = <0x43f94000 0x4000>;
				interrupts = <32>;
				clocks = <&clks 121>, <&clks 57>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			i2c2: i2c@43f98000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
				reg = <0x43f98000 0x4000>;
				clocks = <&clks 48>;
				clock-names = "";
				interrupts = <4>;
				status = "disabled";
			};

			owire@43f9c000 {
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <0x43f9c000 0x4000>;
				clocks = <&clks 51>;
				clock-names = "";
				interrupts = <2>;
				status = "disabled";
			};

			spi1: cspi@43fa4000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
				reg = <0x43fa4000 0x4000>;
				clocks = <&clks 62>, <&clks 62>;
				clock-names = "ipg", "per";
				interrupts = <14>;
				status = "disabled";
			};

			kpp@43fa8000 {
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <0x43fa8000 0x4000>;
				clocks = <&clks 102>;
				clock-names = "";
				interrupts = <24>;
				status = "disabled";
			};

			iomuxc: iomuxc@43fac000 {
				compatible = "fsl,imx25-iomuxc";
				reg = <0x43fac000 0x4000>;
			};

			audmux: audmux@43fb0000 {
				compatible = "fsl,imx25-audmux", "fsl,imx31-audmux";
				reg = <0x43fb0000 0x4000>;
				status = "disabled";
			};
		};

		spba@50000000 {
			compatible = "fsl,spba-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x50000000 0x40000>;
			ranges;

			spi3: cspi@50004000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
				reg = <0x50004000 0x4000>;
				interrupts = <0>;
				clocks = <&clks 80>, <&clks 80>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			uart4: serial@50008000 {
				compatible = "fsl,imx25-uart", "fsl,imx21-uart";
				reg = <0x50008000 0x4000>;
				interrupts = <5>;
				clocks = <&clks 123>, <&clks 57>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			uart3: serial@5000c000 {
				compatible = "fsl,imx25-uart", "fsl,imx21-uart";
				reg = <0x5000c000 0x4000>;
				interrupts = <18>;
				clocks = <&clks 122>, <&clks 57>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			spi2: cspi@50010000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
				reg = <0x50010000 0x4000>;
				clocks = <&clks 79>, <&clks 79>;
				clock-names = "ipg", "per";
				interrupts = <13>;
				status = "disabled";
			};

			ssi2: ssi@50014000 {
				compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
				reg = <0x50014000 0x4000>;
				interrupts = <11>;
				clocks = <&clks 118>;
				clock-names = "ipg";
				dmas = <&sdma 24 1 0>,
				       <&sdma 25 1 0>;
				dma-names = "rx", "tx";
				status = "disabled";
			};

			esai@50018000 {
				reg = <0x50018000 0x4000>;
				interrupts = <7>;
			};

			uart5: serial@5002c000 {
				compatible = "fsl,imx25-uart", "fsl,imx21-uart";
				reg = <0x5002c000 0x4000>;
				interrupts = <40>;
				clocks = <&clks 124>, <&clks 57>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			tsc: tsc@50030000 {
				compatible = "fsl,imx25-adc", "fsl,imx21-tsc";
				reg = <0x50030000 0x4000>;
				interrupts = <46>;
				clocks = <&clks 119>;
				clock-names = "ipg";
				status = "disabled";
			};

			ssi1: ssi@50034000 {
				compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
				reg = <0x50034000 0x4000>;
				interrupts = <12>;
				clocks = <&clks 117>;
				clock-names = "ipg";
				dmas = <&sdma 28 1 0>,
				       <&sdma 29 1 0>;
				dma-names = "rx", "tx";
				status = "disabled";
			};

			fec: ethernet@50038000 {
				compatible = "fsl,imx25-fec";
				reg = <0x50038000 0x4000>;
				interrupts = <57>;
				clocks = <&clks 88>, <&clks 65>;
				clock-names = "ipg", "ahb";
				status = "disabled";
			};
		};

		aips@53f00000 { /* AIPS2 */
			compatible = "fsl,aips-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x53f00000 0x100000>;
			ranges;

			clks: ccm@53f80000 {
				compatible = "fsl,imx25-ccm";
				reg = <0x53f80000 0x4000>;
				interrupts = <31>;
				#clock-cells = <1>;
			};

			gpt4: timer@53f84000 {
				compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
				reg = <0x53f84000 0x4000>;
				clocks = <&clks 9>, <&clks 45>;
				clock-names = "ipg", "per";
				interrupts = <1>;
			};

			gpt3: timer@53f88000 {
				compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
				reg = <0x53f88000 0x4000>;
				clocks = <&clks 9>, <&clks 47>;
				clock-names = "ipg", "per";
				interrupts = <29>;
			};

			gpt2: timer@53f8c000 {
				compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
				reg = <0x53f8c000 0x4000>;
				clocks = <&clks 9>, <&clks 47>;
				clock-names = "ipg", "per";
				interrupts = <53>;
			};

			gpt1: timer@53f90000 {
				compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
				reg = <0x53f90000 0x4000>;
				clocks = <&clks 9>, <&clks 47>;
				clock-names = "ipg", "per";
				interrupts = <54>;
			};

			epit1: timer@53f94000 {
				compatible = "fsl,imx25-epit";
				reg = <0x53f94000 0x4000>;
				interrupts = <28>;
			};

			epit2: timer@53f98000 {
				compatible = "fsl,imx25-epit";
				reg = <0x53f98000 0x4000>;
				interrupts = <27>;
			};

			gpio4: gpio@53f9c000 {
				compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
				reg = <0x53f9c000 0x4000>;
				interrupts = <23>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
			};

			pwm2: pwm@53fa0000 {
				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
				#pwm-cells = <2>;
				reg = <0x53fa0000 0x4000>;
				clocks = <&clks 106>, <&clks 36>;
				clock-names = "ipg", "per";
				interrupts = <36>;
			};

			gpio3: gpio@53fa4000 {
				compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
				reg = <0x53fa4000 0x4000>;
				interrupts = <16>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
			};

			pwm3: pwm@53fa8000 {
				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
				#pwm-cells = <2>;
				reg = <0x53fa8000 0x4000>;
				clocks = <&clks 107>, <&clks 36>;
				clock-names = "ipg", "per";
				interrupts = <41>;
			};

			esdhc1: esdhc@53fb4000 {
				compatible = "fsl,imx25-esdhc";
				reg = <0x53fb4000 0x4000>;
				interrupts = <9>;
				clocks = <&clks 86>, <&clks 63>, <&clks 45>;
				clock-names = "ipg", "ahb", "per";
				status = "disabled";
			};

			esdhc2: esdhc@53fb8000 {
				compatible = "fsl,imx25-esdhc";
				reg = <0x53fb8000 0x4000>;
				interrupts = <8>;
				clocks = <&clks 87>, <&clks 64>, <&clks 46>;
				clock-names = "ipg", "ahb", "per";
				status = "disabled";
			};

			lcdc: lcdc@53fbc000 {
				compatible = "fsl,imx25-fb", "fsl,imx21-fb";
				reg = <0x53fbc000 0x4000>;
				interrupts = <39>;
				clocks = <&clks 103>, <&clks 66>, <&clks 49>;
				clock-names = "ipg", "ahb", "per";
				status = "disabled";
			};

			slcdc@53fc0000 {
				reg = <0x53fc0000 0x4000>;
				interrupts = <38>;
				status = "disabled";
			};

			pwm4: pwm@53fc8000 {
				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
				reg = <0x53fc8000 0x4000>;
				clocks = <&clks 108>, <&clks 36>;
				clock-names = "ipg", "per";
				interrupts = <42>;
			};

			gpio1: gpio@53fcc000 {
				compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
				reg = <0x53fcc000 0x4000>;
				interrupts = <52>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
			};

			gpio2: gpio@53fd0000 {
				compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
				reg = <0x53fd0000 0x4000>;
				interrupts = <51>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
			};

			sdma: sdma@53fd4000 {
				compatible = "fsl,imx25-sdma", "fsl,imx35-sdma";
				reg = <0x53fd4000 0x4000>;
				clocks = <&clks 112>, <&clks 68>;
				clock-names = "ipg", "ahb";
				#dma-cells = <3>;
				interrupts = <34>;
				fsl,sdma-ram-script-name = "imx/sdma/sdma-imx25.bin";
			};

			wdog@53fdc000 {
				compatible = "fsl,imx25-wdt", "fsl,imx21-wdt";
				reg = <0x53fdc000 0x4000>;
				clocks = <&clks 126>;
				clock-names = "";
				interrupts = <55>;
			};

			pwm1: pwm@53fe0000 {
				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
				#pwm-cells = <2>;
				reg = <0x53fe0000 0x4000>;
				clocks = <&clks 105>, <&clks 36>;
				clock-names = "ipg", "per";
				interrupts = <26>;
			};

			iim: iim@53ff0000 {
				compatible = "fsl,imx25-iim", "fsl,imx27-iim";
				reg = <0x53ff0000 0x4000>;
				interrupts = <19>;
				clocks = <&clks 99>;
			};

			usbphy1: usbphy@1 {
				compatible = "nop-usbphy";
				status = "disabled";
			};

			usbphy2: usbphy@2 {
				compatible = "nop-usbphy";
				status = "disabled";
			};

			usbotg: usb@53ff4000 {
				compatible = "fsl,imx25-usb", "fsl,imx27-usb";
				reg = <0x53ff4000 0x0200>;
				interrupts = <37>;
				clocks = <&clks 70>;
				fsl,usbmisc = <&usbmisc 0>;
				status = "disabled";
			};

			usbhost1: usb@53ff4400 {
				compatible = "fsl,imx25-usb", "fsl,imx27-usb";
				reg = <0x53ff4400 0x0200>;
				interrupts = <35>;
				clocks = <&clks 70>;
				fsl,usbmisc = <&usbmisc 1>;
				status = "disabled";
			};

			usbmisc: usbmisc@53ff4600 {
				#index-cells = <1>;
				compatible = "fsl,imx25-usbmisc";
				clocks = <&clks 9>, <&clks 70>, <&clks 8>;
				clock-names = "ipg", "ahb", "per";
				reg = <0x53ff4600 0x00f>;
				status = "disabled";
			};

			dryice@53ffc000 {
				compatible = "fsl,imx25-dryice", "fsl,imx25-rtc";
				reg = <0x53ffc000 0x4000>;
				clocks = <&clks 81>;
				clock-names = "ipg";
				interrupts = <25>;
			};
		};

		emi@80000000 {
			compatible = "fsl,emi-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x80000000 0x3b002000>;
			ranges;

			nfc: nand@bb000000 {
				#address-cells = <1>;
				#size-cells = <1>;

				compatible = "fsl,imx25-nand";
				reg = <0xbb000000 0x2000>;
				clocks = <&clks 50>;
				clock-names = "";
				interrupts = <33>;
				status = "disabled";
			};
		};
	};
};
Commit	Line	Data
5658a68f SH	1	/*
	2	* Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
	3	*
	4	* The code contained herein is licensed under the GNU General Public
	5	* License. You may obtain a copy of the GNU General Public License
	6	* Version 2 or later at the following locations:
	7	*
	8	* http://www.opensource.org/licenses/gpl-license.html
	9	* http://www.gnu.org/copyleft/gpl.html
	10	*/
	11
36dffd8f	12	#include "skeleton.dtsi"
f4db4bc5	13	#include "imx25-pinfunc.h"
5658a68f SH	14
	15	/ {
	16	aliases {
22970070	17	ethernet0 = &fec;
6ed1a0e5 SH	18	gpio0 = &gpio1;
	19	gpio1 = &gpio2;
	20	gpio2 = &gpio3;
	21	gpio3 = &gpio4;
	22	i2c0 = &i2c1;
	23	i2c1 = &i2c2;
	24	i2c2 = &i2c3;
5658a68f SH	25	serial0 = &uart1;
	26	serial1 = &uart2;
	27	serial2 = &uart3;
	28	serial3 = &uart4;
	29	serial4 = &uart5;
6ed1a0e5 SH	30	spi0 = &spi1;
	31	spi1 = &spi2;
	32	spi2 = &spi3;
5658a68f SH	33	usb0 = &usbotg;
	34	usb1 = &usbhost1;
	35	};
	36
070bd7e4 FE	37	cpus {
	38	#address-cells = <0>;
	39	#size-cells = <0>;
	40
	41	cpu {
	42	compatible = "arm,arm926ej-s";
	43	device_type = "cpu";
	44	};
	45	};
	46
5658a68f SH	47	asic: asic-interrupt-controller@68000000 {
	48	compatible = "fsl,imx25-asic", "fsl,avic";
	49	interrupt-controller;
	50	#interrupt-cells = <1>;
	51	reg = <0x68000000 0x8000000>;
	52	};
	53
	54	clocks {
	55	#address-cells = <1>;
	56	#size-cells = <0>;
	57
	58	osc {
	59	compatible = "fsl,imx-osc", "fixed-clock";
4b2b4043	60	#clock-cells = <0>;
5658a68f SH	61	clock-frequency = <24000000>;
	62	};
	63	};
	64
	65	soc {
	66	#address-cells = <1>;
	67	#size-cells = <1>;
	68	compatible = "simple-bus";
	69	interrupt-parent = <&asic>;
	70	ranges;
	71
	72	aips@43f00000 { /* AIPS1 */
	73	compatible = "fsl,aips-bus", "simple-bus";
	74	#address-cells = <1>;
	75	#size-cells = <1>;
	76	reg = <0x43f00000 0x100000>;
	77	ranges;
	78
	79	i2c1: i2c@43f80000 {
	80	#address-cells = <1>;
	81	#size-cells = <0>;
	82	compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
	83	reg = <0x43f80000 0x4000>;
	84	clocks = <&clks 48>;
	85	clock-names = "";
	86	interrupts = <3>;
	87	status = "disabled";
	88	};
	89
	90	i2c3: i2c@43f84000 {
	91	#address-cells = <1>;
	92	#size-cells = <0>;
	93	compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
	94	reg = <0x43f84000 0x4000>;
	95	clocks = <&clks 48>;
	96	clock-names = "";
	97	interrupts = <10>;
	98	status = "disabled";
	99	};
	100
	101	can1: can@43f88000 {
	102	compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
	103	reg = <0x43f88000 0x4000>;
	104	interrupts = <43>;
	105	clocks = <&clks 75>, <&clks 75>;
	106	clock-names = "ipg", "per";
	107	status = "disabled";
	108	};
	109
	110	can2: can@43f8c000 {
	111	compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
	112	reg = <0x43f8c000 0x4000>;
	113	interrupts = <44>;
	114	clocks = <&clks 76>, <&clks 76>;
	115	clock-names = "ipg", "per";
	116	status = "disabled";
	117	};
	118
	119	uart1: serial@43f90000 {
	120	compatible = "fsl,imx25-uart", "fsl,imx21-uart";
	121	reg = <0x43f90000 0x4000>;
	122	interrupts = <45>;
	123	clocks = <&clks 120>, <&clks 57>;
	124	clock-names = "ipg", "per";
125	status = "disabled";
126	};
127
128	uart2: serial@43f94000 {
129	compatible = "fsl,imx25-uart", "fsl,imx21-uart";
130	reg = <0x43f94000 0x4000>;
131	interrupts = <32>;
132	clocks = <&clks 121>, <&clks 57>;
133	clock-names = "ipg", "per";
134	status = "disabled";
135	};
136
137	i2c2: i2c@43f98000 {
138	#address-cells = <1>;
139	#size-cells = <0>;
140	compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
141	reg = <0x43f98000 0x4000>;
142	clocks = <&clks 48>;
143	clock-names = "";
144	interrupts = <4>;
145	status = "disabled";
146	};
147
148	owire@43f9c000 {
149	#address-cells = <1>;
150	#size-cells = <0>;
151	reg = <0x43f9c000 0x4000>;
152	clocks = <&clks 51>;
153	clock-names = "";
154	interrupts = <2>;
155	status = "disabled";
156	};
157
158	spi1: cspi@43fa4000 {
159	#address-cells = <1>;
160	#size-cells = <0>;
161	compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
162	reg = <0x43fa4000 0x4000>;
37523dc5 JA	163	clocks = <&clks 62>, <&clks 62>;
37523dc5 JA	164	clock-names = "ipg", "per";
5658a68f SH	165	interrupts = <14>;
	166	status = "disabled";
	167	};
	168
	169	kpp@43fa8000 {
	170	#address-cells = <1>;
	171	#size-cells = <0>;
	172	reg = <0x43fa8000 0x4000>;
	173	clocks = <&clks 102>;
	174	clock-names = "";
	175	interrupts = <24>;
	176	status = "disabled";
	177	};
	178
53110aa0	179	iomuxc: iomuxc@43fac000 {
5658a68f SH	180	compatible = "fsl,imx25-iomuxc";
	181	reg = <0x43fac000 0x4000>;
	182	};
	183
ec2ea8c1	184	audmux: audmux@43fb0000 {
5658a68f SH	185	compatible = "fsl,imx25-audmux", "fsl,imx31-audmux";
	186	reg = <0x43fb0000 0x4000>;
	187	status = "disabled";
	188	};
	189	};
	190
	191	spba@50000000 {
	192	compatible = "fsl,spba-bus", "simple-bus";
	193	#address-cells = <1>;
	194	#size-cells = <1>;
	195	reg = <0x50000000 0x40000>;
	196	ranges;
	197
	198	spi3: cspi@50004000 {
	199	#address-cells = <1>;
	200	#size-cells = <0>;
	201	compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
	202	reg = <0x50004000 0x4000>;
	203	interrupts = <0>;
37523dc5 JA	204	clocks = <&clks 80>, <&clks 80>;
37523dc5 JA	205	clock-names = "ipg", "per";
5658a68f SH	206	status = "disabled";
	207	};
	208
	209	uart4: serial@50008000 {
	210	compatible = "fsl,imx25-uart", "fsl,imx21-uart";
	211	reg = <0x50008000 0x4000>;
	212	interrupts = <5>;
	213	clocks = <&clks 123>, <&clks 57>;
	214	clock-names = "ipg", "per";
	215	status = "disabled";
	216	};
	217
	218	uart3: serial@5000c000 {
	219	compatible = "fsl,imx25-uart", "fsl,imx21-uart";
	220	reg = <0x5000c000 0x4000>;
	221	interrupts = <18>;
	222	clocks = <&clks 122>, <&clks 57>;
	223	clock-names = "ipg", "per";
	224	status = "disabled";
	225	};
	226
	227	spi2: cspi@50010000 {
	228	#address-cells = <1>;
	229	#size-cells = <0>;
	230	compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
	231	reg = <0x50010000 0x4000>;
37523dc5 JA	232	clocks = <&clks 79>, <&clks 79>;
37523dc5 JA	233	clock-names = "ipg", "per";
5658a68f SH	234	interrupts = <13>;
	235	status = "disabled";
	236	};
	237
	238	ssi2: ssi@50014000 {
	239	compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
	240	reg = <0x50014000 0x4000>;
	241	interrupts = <11>;
7803c620 DC	242	clocks = <&clks 118>;
	243	clock-names = "ipg";
	244	dmas = <&sdma 24 1 0>,
	245	<&sdma 25 1 0>;
	246	dma-names = "rx", "tx";
5658a68f SH	247	status = "disabled";
	248	};
	249
	250	esai@50018000 {
	251	reg = <0x50018000 0x4000>;
	252	interrupts = <7>;
	253	};
	254
	255	uart5: serial@5002c000 {
	256	compatible = "fsl,imx25-uart", "fsl,imx21-uart";
	257	reg = <0x5002c000 0x4000>;
	258	interrupts = <40>;
	259	clocks = <&clks 124>, <&clks 57>;
	260	clock-names = "ipg", "per";
	261	status = "disabled";
	262	};
	263
	264	tsc: tsc@50030000 {
	265	compatible = "fsl,imx25-adc", "fsl,imx21-tsc";
	266	reg = <0x50030000 0x4000>;
	267	interrupts = <46>;
	268	clocks = <&clks 119>;
	269	clock-names = "ipg";
	270	status = "disabled";
	271	};
	272
	273	ssi1: ssi@50034000 {
	274	compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
	275	reg = <0x50034000 0x4000>;
	276	interrupts = <12>;
7803c620 DC	277	clocks = <&clks 117>;
	278	clock-names = "ipg";
	279	dmas = <&sdma 28 1 0>,
	280	<&sdma 29 1 0>;
	281	dma-names = "rx", "tx";
5658a68f SH	282	status = "disabled";
	283	};
	284
	285	fec: ethernet@50038000 {
	286	compatible = "fsl,imx25-fec";
	287	reg = <0x50038000 0x4000>;
	288	interrupts = <57>;
	289	clocks = <&clks 88>, <&clks 65>;
	290	clock-names = "ipg", "ahb";
	291	status = "disabled";
	292	};
	293	};
	294
	295	aips@53f00000 { /* AIPS2 */
	296	compatible = "fsl,aips-bus", "simple-bus";
	297	#address-cells = <1>;
	298	#size-cells = <1>;
	299	reg = <0x53f00000 0x100000>;
	300	ranges;
	301
	302	clks: ccm@53f80000 {
	303	compatible = "fsl,imx25-ccm";
	304	reg = <0x53f80000 0x4000>;
	305	interrupts = <31>;
	306	#clock-cells = <1>;
	307	};
	308
	309	gpt4: timer@53f84000 {
	310	compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
	311	reg = <0x53f84000 0x4000>;
	312	clocks = <&clks 9>, <&clks 45>;
	313	clock-names = "ipg", "per";
	314	interrupts = <1>;
	315	};
	316
	317	gpt3: timer@53f88000 {
	318	compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
	319	reg = <0x53f88000 0x4000>;
	320	clocks = <&clks 9>, <&clks 47>;
	321	clock-names = "ipg", "per";
	322	interrupts = <29>;
	323	};
	324
	325	gpt2: timer@53f8c000 {
	326	compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
	327	reg = <0x53f8c000 0x4000>;
	328	clocks = <&clks 9>, <&clks 47>;
	329	clock-names = "ipg", "per";
	330	interrupts = <53>;
	331	};
	332
	333	gpt1: timer@53f90000 {
	334	compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
	335	reg = <0x53f90000 0x4000>;
	336	clocks = <&clks 9>, <&clks 47>;
	337	clock-names = "ipg", "per";
	338	interrupts = <54>;
	339	};
	340
	341	epit1: timer@53f94000 {
	342	compatible = "fsl,imx25-epit";
	343	reg = <0x53f94000 0x4000>;
	344	interrupts = <28>;
	345	};
346
347	epit2: timer@53f98000 {
348	compatible = "fsl,imx25-epit";
349	reg = <0x53f98000 0x4000>;
350	interrupts = <27>;
351	};
352
353	gpio4: gpio@53f9c000 {
354	compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
355	reg = <0x53f9c000 0x4000>;
356	interrupts = <23>;
357	gpio-controller;
358	#gpio-cells = <2>;
359	interrupt-controller;
360	#interrupt-cells = <2>;
361	};
362
363	pwm2: pwm@53fa0000 {
364	compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
365	#pwm-cells = <2>;
366	reg = <0x53fa0000 0x4000>;
367	clocks = <&clks 106>, <&clks 36>;
368	clock-names = "ipg", "per";
369	interrupts = <36>;
370	};
371
372	gpio3: gpio@53fa4000 {
373	compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
374	reg = <0x53fa4000 0x4000>;
375	interrupts = <16>;
376	gpio-controller;
377	#gpio-cells = <2>;
378	interrupt-controller;
379	#interrupt-cells = <2>;
380	};
381
382	pwm3: pwm@53fa8000 {
383	compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
384	#pwm-cells = <2>;
385	reg = <0x53fa8000 0x4000>;
386	clocks = <&clks 107>, <&clks 36>;
387	clock-names = "ipg", "per";
388	interrupts = <41>;
389	};
390
391	esdhc1: esdhc@53fb4000 {
392	compatible = "fsl,imx25-esdhc";
393	reg = <0x53fb4000 0x4000>;
394	interrupts = <9>;
395	clocks = <&clks 86>, <&clks 63>, <&clks 45>;
396	clock-names = "ipg", "ahb", "per";
397	status = "disabled";
398	};
399
400	esdhc2: esdhc@53fb8000 {
401	compatible = "fsl,imx25-esdhc";
402	reg = <0x53fb8000 0x4000>;
403	interrupts = <8>;
404	clocks = <&clks 87>, <&clks 64>, <&clks 46>;
405	clock-names = "ipg", "ahb", "per";
406	status = "disabled";
407	};
408
c770f7c0 MW	409	lcdc: lcdc@53fbc000 {
c770f7c0 MW	410	compatible = "fsl,imx25-fb", "fsl,imx21-fb";
5658a68f SH	411	reg = <0x53fbc000 0x4000>;
	412	interrupts = <39>;
	413	clocks = <&clks 103>, <&clks 66>, <&clks 49>;
	414	clock-names = "ipg", "ahb", "per";
	415	status = "disabled";
	416	};
	417
	418	slcdc@53fc0000 {
	419	reg = <0x53fc0000 0x4000>;
	420	interrupts = <38>;
	421	status = "disabled";
	422	};
	423
	424	pwm4: pwm@53fc8000 {
	425	compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
	426	reg = <0x53fc8000 0x4000>;
	427	clocks = <&clks 108>, <&clks 36>;
	428	clock-names = "ipg", "per";
	429	interrupts = <42>;
	430	};
	431
	432	gpio1: gpio@53fcc000 {
	433	compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
	434	reg = <0x53fcc000 0x4000>;
	435	interrupts = <52>;
	436	gpio-controller;
	437	#gpio-cells = <2>;
	438	interrupt-controller;
	439	#interrupt-cells = <2>;
	440	};
	441
	442	gpio2: gpio@53fd0000 {
	443	compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
	444	reg = <0x53fd0000 0x4000>;
	445	interrupts = <51>;
	446	gpio-controller;
	447	#gpio-cells = <2>;
	448	interrupt-controller;
	449	#interrupt-cells = <2>;
	450	};
	451
7803c620	452	sdma: sdma@53fd4000 {
5658a68f SH	453	compatible = "fsl,imx25-sdma", "fsl,imx35-sdma";
	454	reg = <0x53fd4000 0x4000>;
	455	clocks = <&clks 112>, <&clks 68>;
	456	clock-names = "ipg", "ahb";
fb72bb21	457	#dma-cells = <3>;
5658a68f	458	interrupts = <34>;
cabd1b29	459	fsl,sdma-ram-script-name = "imx/sdma/sdma-imx25.bin";
5658a68f SH	460	};
	461
	462	wdog@53fdc000 {
	463	compatible = "fsl,imx25-wdt", "fsl,imx21-wdt";
	464	reg = <0x53fdc000 0x4000>;
	465	clocks = <&clks 126>;
	466	clock-names = "";
	467	interrupts = <55>;
	468	};
	469
	470	pwm1: pwm@53fe0000 {
	471	compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
	472	#pwm-cells = <2>;
	473	reg = <0x53fe0000 0x4000>;
	474	clocks = <&clks 105>, <&clks 36>;
	475	clock-names = "ipg", "per";
	476	interrupts = <26>;
	477	};
	478
684f6a23 SH	479	iim: iim@53ff0000 {
	480	compatible = "fsl,imx25-iim", "fsl,imx27-iim";
	481	reg = <0x53ff0000 0x4000>;
	482	interrupts = <19>;
	483	clocks = <&clks 99>;
	484	};
	485
5658a68f SH	486	usbphy1: usbphy@1 {
	487	compatible = "nop-usbphy";
	488	status = "disabled";
	489	};
	490
	491	usbphy2: usbphy@2 {
	492	compatible = "nop-usbphy";
	493	status = "disabled";
	494	};
	495
	496	usbotg: usb@53ff4000 {
	497	compatible = "fsl,imx25-usb", "fsl,imx27-usb";
	498	reg = <0x53ff4000 0x0200>;
	499	interrupts = <37>;
3937f66b	500	clocks = <&clks 70>;
5658a68f SH	501	fsl,usbmisc = <&usbmisc 0>;
	502	status = "disabled";
	503	};
	504
	505	usbhost1: usb@53ff4400 {
	506	compatible = "fsl,imx25-usb", "fsl,imx27-usb";
	507	reg = <0x53ff4400 0x0200>;
	508	interrupts = <35>;
3937f66b	509	clocks = <&clks 70>;
5658a68f SH	510	fsl,usbmisc = <&usbmisc 1>;
	511	status = "disabled";
	512	};
	513
	514	usbmisc: usbmisc@53ff4600 {
	515	#index-cells = <1>;
	516	compatible = "fsl,imx25-usbmisc";
	517	clocks = <&clks 9>, <&clks 70>, <&clks 8>;
	518	clock-names = "ipg", "ahb", "per";
	519	reg = <0x53ff4600 0x00f>;
	520	status = "disabled";
	521	};
	522
	523	dryice@53ffc000 {
	524	compatible = "fsl,imx25-dryice", "fsl,imx25-rtc";
	525	reg = <0x53ffc000 0x4000>;
	526	clocks = <&clks 81>;
	527	clock-names = "ipg";
	528	interrupts = <25>;
	529	};
	530	};
	531
	532	emi@80000000 {
	533	compatible = "fsl,emi-bus", "simple-bus";
	534	#address-cells = <1>;
	535	#size-cells = <1>;
	536	reg = <0x80000000 0x3b002000>;
	537	ranges;
	538
be4ccfce	539	nfc: nand@bb000000 {
5658a68f SH	540	#address-cells = <1>;
	541	#size-cells = <1>;
	542
	543	compatible = "fsl,imx25-nand";
	544	reg = <0xbb000000 0x2000>;
	545	clocks = <&clks 50>;
	546	clock-names = "";
	547	interrupts = <33>;
	548	status = "disabled";
	549	};
	550	};
	551	};
	552	};