[mirror_ubuntu-focal-kernel.git] / arch / arm / boot / dts / imx25.dtsi

/*
 * Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
 *
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

#include "skeleton.dtsi"
#include "imx25-pinfunc.h"

/ {
	aliases {
		gpio0 = &gpio1;
		gpio1 = &gpio2;
		gpio2 = &gpio3;
		gpio3 = &gpio4;
		i2c0 = &i2c1;
		i2c1 = &i2c2;
		i2c2 = &i2c3;
		serial0 = &uart1;
		serial1 = &uart2;
		serial2 = &uart3;
		serial3 = &uart4;
		serial4 = &uart5;
		spi0 = &spi1;
		spi1 = &spi2;
		spi2 = &spi3;
		usb0 = &usbotg;
		usb1 = &usbhost1;
	};

	cpus {
		#address-cells = <0>;
		#size-cells = <0>;

		cpu {
			compatible = "arm,arm926ej-s";
			device_type = "cpu";
		};
	};

	asic: asic-interrupt-controller@68000000 {
		compatible = "fsl,imx25-asic", "fsl,avic";
		interrupt-controller;
		#interrupt-cells = <1>;
		reg = <0x68000000 0x8000000>;
	};

	clocks {
		#address-cells = <1>;
		#size-cells = <0>;

		osc {
			compatible = "fsl,imx-osc", "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <24000000>;
		};
	};

	soc {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "simple-bus";
		interrupt-parent = <&asic>;
		ranges;

		aips@43f00000 { /* AIPS1 */
			compatible = "fsl,aips-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x43f00000 0x100000>;
			ranges;

			i2c1: i2c@43f80000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
				reg = <0x43f80000 0x4000>;
				clocks = <&clks 48>;
				clock-names = "";
				interrupts = <3>;
				status = "disabled";
			};

			i2c3: i2c@43f84000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
				reg = <0x43f84000 0x4000>;
				clocks = <&clks 48>;
				clock-names = "";
				interrupts = <10>;
				status = "disabled";
			};

			can1: can@43f88000 {
				compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
				reg = <0x43f88000 0x4000>;
				interrupts = <43>;
				clocks = <&clks 75>, <&clks 75>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			can2: can@43f8c000 {
				compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
				reg = <0x43f8c000 0x4000>;
				interrupts = <44>;
				clocks = <&clks 76>, <&clks 76>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			uart1: serial@43f90000 {
				compatible = "fsl,imx25-uart", "fsl,imx21-uart";
				reg = <0x43f90000 0x4000>;
				interrupts = <45>;
				clocks = <&clks 120>, <&clks 57>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			uart2: serial@43f94000 {
				compatible = "fsl,imx25-uart", "fsl,imx21-uart";
				reg = <0x43f94000 0x4000>;
				interrupts = <32>;
				clocks = <&clks 121>, <&clks 57>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			i2c2: i2c@43f98000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
				reg = <0x43f98000 0x4000>;
				clocks = <&clks 48>;
				clock-names = "";
				interrupts = <4>;
				status = "disabled";
			};

			owire@43f9c000 {
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <0x43f9c000 0x4000>;
				clocks = <&clks 51>;
				clock-names = "";
				interrupts = <2>;
				status = "disabled";
			};

			spi1: cspi@43fa4000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
				reg = <0x43fa4000 0x4000>;
				clocks = <&clks 62>, <&clks 62>;
				clock-names = "ipg", "per";
				interrupts = <14>;
				status = "disabled";
			};

			kpp@43fa8000 {
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <0x43fa8000 0x4000>;
				clocks = <&clks 102>;
				clock-names = "";
				interrupts = <24>;
				status = "disabled";
			};

			iomuxc: iomuxc@43fac000 {
				compatible = "fsl,imx25-iomuxc";
				reg = <0x43fac000 0x4000>;
			};

			audmux: audmux@43fb0000 {
				compatible = "fsl,imx25-audmux", "fsl,imx31-audmux";
				reg = <0x43fb0000 0x4000>;
				status = "disabled";
			};
		};

		spba@50000000 {
			compatible = "fsl,spba-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x50000000 0x40000>;
			ranges;

			spi3: cspi@50004000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
				reg = <0x50004000 0x4000>;
				interrupts = <0>;
				clocks = <&clks 80>, <&clks 80>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			uart4: serial@50008000 {
				compatible = "fsl,imx25-uart", "fsl,imx21-uart";
				reg = <0x50008000 0x4000>;
				interrupts = <5>;
				clocks = <&clks 123>, <&clks 57>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			uart3: serial@5000c000 {
				compatible = "fsl,imx25-uart", "fsl,imx21-uart";
				reg = <0x5000c000 0x4000>;
				interrupts = <18>;
				clocks = <&clks 122>, <&clks 57>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			spi2: cspi@50010000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
				reg = <0x50010000 0x4000>;
				clocks = <&clks 79>, <&clks 79>;
				clock-names = "ipg", "per";
				interrupts = <13>;
				status = "disabled";
			};

			ssi2: ssi@50014000 {
				compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
				reg = <0x50014000 0x4000>;
				interrupts = <11>;
				clocks = <&clks 118>;
				clock-names = "ipg";
				dmas = <&sdma 24 1 0>,
				       <&sdma 25 1 0>;
				dma-names = "rx", "tx";
				status = "disabled";
			};

			esai@50018000 {
				reg = <0x50018000 0x4000>;
				interrupts = <7>;
			};

			uart5: serial@5002c000 {
				compatible = "fsl,imx25-uart", "fsl,imx21-uart";
				reg = <0x5002c000 0x4000>;
				interrupts = <40>;
				clocks = <&clks 124>, <&clks 57>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			tsc: tsc@50030000 {
				compatible = "fsl,imx25-adc", "fsl,imx21-tsc";
				reg = <0x50030000 0x4000>;
				interrupts = <46>;
				clocks = <&clks 119>;
				clock-names = "ipg";
				status = "disabled";
			};

			ssi1: ssi@50034000 {
				compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
				reg = <0x50034000 0x4000>;
				interrupts = <12>;
				clocks = <&clks 117>;
				clock-names = "ipg";
				dmas = <&sdma 28 1 0>,
				       <&sdma 29 1 0>;
				dma-names = "rx", "tx";
				status = "disabled";
			};

			fec: ethernet@50038000 {
				compatible = "fsl,imx25-fec";
				reg = <0x50038000 0x4000>;
				interrupts = <57>;
				clocks = <&clks 88>, <&clks 65>;
				clock-names = "ipg", "ahb";
				status = "disabled";
			};
		};

		aips@53f00000 { /* AIPS2 */
			compatible = "fsl,aips-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x53f00000 0x100000>;
			ranges;

			clks: ccm@53f80000 {
				compatible = "fsl,imx25-ccm";
				reg = <0x53f80000 0x4000>;
				interrupts = <31>;
				#clock-cells = <1>;
			};

			gpt4: timer@53f84000 {
				compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
				reg = <0x53f84000 0x4000>;
				clocks = <&clks 9>, <&clks 45>;
				clock-names = "ipg", "per";
				interrupts = <1>;
			};

			gpt3: timer@53f88000 {
				compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
				reg = <0x53f88000 0x4000>;
				clocks = <&clks 9>, <&clks 47>;
				clock-names = "ipg", "per";
				interrupts = <29>;
			};

			gpt2: timer@53f8c000 {
				compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
				reg = <0x53f8c000 0x4000>;
				clocks = <&clks 9>, <&clks 47>;
				clock-names = "ipg", "per";
				interrupts = <53>;
			};

			gpt1: timer@53f90000 {
				compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
				reg = <0x53f90000 0x4000>;
				clocks = <&clks 9>, <&clks 47>;
				clock-names = "ipg", "per";
				interrupts = <54>;
			};

			epit1: timer@53f94000 {
				compatible = "fsl,imx25-epit";
				reg = <0x53f94000 0x4000>;
				interrupts = <28>;
			};

			epit2: timer@53f98000 {
				compatible = "fsl,imx25-epit";
				reg = <0x53f98000 0x4000>;
				interrupts = <27>;
			};

			gpio4: gpio@53f9c000 {
				compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
				reg = <0x53f9c000 0x4000>;
				interrupts = <23>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
			};

			pwm2: pwm@53fa0000 {
				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
				#pwm-cells = <2>;
				reg = <0x53fa0000 0x4000>;
				clocks = <&clks 106>, <&clks 36>;
				clock-names = "ipg", "per";
				interrupts = <36>;
			};

			gpio3: gpio@53fa4000 {
				compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
				reg = <0x53fa4000 0x4000>;
				interrupts = <16>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
			};

			pwm3: pwm@53fa8000 {
				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
				#pwm-cells = <2>;
				reg = <0x53fa8000 0x4000>;
				clocks = <&clks 107>, <&clks 36>;
				clock-names = "ipg", "per";
				interrupts = <41>;
			};

			esdhc1: esdhc@53fb4000 {
				compatible = "fsl,imx25-esdhc";
				reg = <0x53fb4000 0x4000>;
				interrupts = <9>;
				clocks = <&clks 86>, <&clks 63>, <&clks 45>;
				clock-names = "ipg", "ahb", "per";
				status = "disabled";
			};

			esdhc2: esdhc@53fb8000 {
				compatible = "fsl,imx25-esdhc";
				reg = <0x53fb8000 0x4000>;
				interrupts = <8>;
				clocks = <&clks 87>, <&clks 64>, <&clks 46>;
				clock-names = "ipg", "ahb", "per";
				status = "disabled";
			};

			lcdc: lcdc@53fbc000 {
				compatible = "fsl,imx25-fb", "fsl,imx21-fb";
				reg = <0x53fbc000 0x4000>;
				interrupts = <39>;
				clocks = <&clks 103>, <&clks 66>, <&clks 49>;
				clock-names = "ipg", "ahb", "per";
				status = "disabled";
			};

			slcdc@53fc0000 {
				reg = <0x53fc0000 0x4000>;
				interrupts = <38>;
				status = "disabled";
			};

			pwm4: pwm@53fc8000 {
				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
				reg = <0x53fc8000 0x4000>;
				clocks = <&clks 108>, <&clks 36>;
				clock-names = "ipg", "per";
				interrupts = <42>;
			};

			gpio1: gpio@53fcc000 {
				compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
				reg = <0x53fcc000 0x4000>;
				interrupts = <52>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
			};

			gpio2: gpio@53fd0000 {
				compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
				reg = <0x53fd0000 0x4000>;
				interrupts = <51>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
			};

			sdma: sdma@53fd4000 {
				compatible = "fsl,imx25-sdma", "fsl,imx35-sdma";
				reg = <0x53fd4000 0x4000>;
				clocks = <&clks 112>, <&clks 68>;
				clock-names = "ipg", "ahb";
				#dma-cells = <3>;
				interrupts = <34>;
				fsl,sdma-ram-script-name = "imx/sdma/sdma-imx25.bin";
			};

			wdog@53fdc000 {
				compatible = "fsl,imx25-wdt", "fsl,imx21-wdt";
				reg = <0x53fdc000 0x4000>;
				clocks = <&clks 126>;
				clock-names = "";
				interrupts = <55>;
			};

			pwm1: pwm@53fe0000 {
				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
				#pwm-cells = <2>;
				reg = <0x53fe0000 0x4000>;
				clocks = <&clks 105>, <&clks 36>;
				clock-names = "ipg", "per";
				interrupts = <26>;
			};

			iim: iim@53ff0000 {
				compatible = "fsl,imx25-iim", "fsl,imx27-iim";
				reg = <0x53ff0000 0x4000>;
				interrupts = <19>;
				clocks = <&clks 99>;
			};

			usbphy1: usbphy@1 {
				compatible = "nop-usbphy";
				status = "disabled";
			};

			usbphy2: usbphy@2 {
				compatible = "nop-usbphy";
				status = "disabled";
			};

			usbotg: usb@53ff4000 {
				compatible = "fsl,imx25-usb", "fsl,imx27-usb";
				reg = <0x53ff4000 0x0200>;
				interrupts = <37>;
				clocks = <&clks 9>, <&clks 70>, <&clks 8>;
				clock-names = "ipg", "ahb", "per";
				fsl,usbmisc = <&usbmisc 0>;
				status = "disabled";
			};

			usbhost1: usb@53ff4400 {
				compatible = "fsl,imx25-usb", "fsl,imx27-usb";
				reg = <0x53ff4400 0x0200>;
				interrupts = <35>;
				clocks = <&clks 9>, <&clks 70>, <&clks 8>;
				clock-names = "ipg", "ahb", "per";
				fsl,usbmisc = <&usbmisc 1>;
				status = "disabled";
			};

			usbmisc: usbmisc@53ff4600 {
				#index-cells = <1>;
				compatible = "fsl,imx25-usbmisc";
				clocks = <&clks 9>, <&clks 70>, <&clks 8>;
				clock-names = "ipg", "ahb", "per";
				reg = <0x53ff4600 0x00f>;
				status = "disabled";
			};

			dryice@53ffc000 {
				compatible = "fsl,imx25-dryice", "fsl,imx25-rtc";
				reg = <0x53ffc000 0x4000>;
				clocks = <&clks 81>;
				clock-names = "ipg";
				interrupts = <25>;
			};
		};

		emi@80000000 {
			compatible = "fsl,emi-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x80000000 0x3b002000>;
			ranges;

			nfc: nand@bb000000 {
				#address-cells = <1>;
				#size-cells = <1>;

				compatible = "fsl,imx25-nand";
				reg = <0xbb000000 0x2000>;
				clocks = <&clks 50>;
				clock-names = "";
				interrupts = <33>;
				status = "disabled";
			};
		};
	};
};
Commit	Line	Data
5658a68f SH	1	/*
	2	* Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
	3	*
	4	* The code contained herein is licensed under the GNU General Public
	5	* License. You may obtain a copy of the GNU General Public License
	6	* Version 2 or later at the following locations:
	7	*
	8	* http://www.opensource.org/licenses/gpl-license.html
	9	* http://www.gnu.org/copyleft/gpl.html
	10	*/
	11
36dffd8f	12	#include "skeleton.dtsi"
f4db4bc5	13	#include "imx25-pinfunc.h"
5658a68f SH	14
	15	/ {
	16	aliases {
6ed1a0e5 SH	17	gpio0 = &gpio1;
	18	gpio1 = &gpio2;
	19	gpio2 = &gpio3;
	20	gpio3 = &gpio4;
	21	i2c0 = &i2c1;
	22	i2c1 = &i2c2;
	23	i2c2 = &i2c3;
5658a68f SH	24	serial0 = &uart1;
	25	serial1 = &uart2;
	26	serial2 = &uart3;
	27	serial3 = &uart4;
	28	serial4 = &uart5;
6ed1a0e5 SH	29	spi0 = &spi1;
	30	spi1 = &spi2;
	31	spi2 = &spi3;
5658a68f SH	32	usb0 = &usbotg;
	33	usb1 = &usbhost1;
	34	};
	35
070bd7e4 FE	36	cpus {
	37	#address-cells = <0>;
	38	#size-cells = <0>;
	39
	40	cpu {
	41	compatible = "arm,arm926ej-s";
	42	device_type = "cpu";
	43	};
	44	};
	45
5658a68f SH	46	asic: asic-interrupt-controller@68000000 {
	47	compatible = "fsl,imx25-asic", "fsl,avic";
	48	interrupt-controller;
	49	#interrupt-cells = <1>;
	50	reg = <0x68000000 0x8000000>;
	51	};
	52
	53	clocks {
	54	#address-cells = <1>;
	55	#size-cells = <0>;
	56
	57	osc {
	58	compatible = "fsl,imx-osc", "fixed-clock";
4b2b4043	59	#clock-cells = <0>;
5658a68f SH	60	clock-frequency = <24000000>;
	61	};
	62	};
	63
	64	soc {
	65	#address-cells = <1>;
	66	#size-cells = <1>;
	67	compatible = "simple-bus";
	68	interrupt-parent = <&asic>;
	69	ranges;
	70
	71	aips@43f00000 { /* AIPS1 */
	72	compatible = "fsl,aips-bus", "simple-bus";
	73	#address-cells = <1>;
	74	#size-cells = <1>;
	75	reg = <0x43f00000 0x100000>;
	76	ranges;
	77
	78	i2c1: i2c@43f80000 {
	79	#address-cells = <1>;
	80	#size-cells = <0>;
	81	compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
	82	reg = <0x43f80000 0x4000>;
	83	clocks = <&clks 48>;
	84	clock-names = "";
	85	interrupts = <3>;
	86	status = "disabled";
	87	};
	88
	89	i2c3: i2c@43f84000 {
	90	#address-cells = <1>;
	91	#size-cells = <0>;
	92	compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
	93	reg = <0x43f84000 0x4000>;
	94	clocks = <&clks 48>;
	95	clock-names = "";
	96	interrupts = <10>;
	97	status = "disabled";
	98	};
	99
	100	can1: can@43f88000 {
	101	compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
	102	reg = <0x43f88000 0x4000>;
	103	interrupts = <43>;
	104	clocks = <&clks 75>, <&clks 75>;
	105	clock-names = "ipg", "per";
	106	status = "disabled";
	107	};
	108
	109	can2: can@43f8c000 {
	110	compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
	111	reg = <0x43f8c000 0x4000>;
	112	interrupts = <44>;
	113	clocks = <&clks 76>, <&clks 76>;
	114	clock-names = "ipg", "per";
	115	status = "disabled";
	116	};
	117
	118	uart1: serial@43f90000 {
	119	compatible = "fsl,imx25-uart", "fsl,imx21-uart";
	120	reg = <0x43f90000 0x4000>;
	121	interrupts = <45>;
	122	clocks = <&clks 120>, <&clks 57>;
	123	clock-names = "ipg", "per";
124	status = "disabled";
125	};
126
127	uart2: serial@43f94000 {
128	compatible = "fsl,imx25-uart", "fsl,imx21-uart";
129	reg = <0x43f94000 0x4000>;
130	interrupts = <32>;
131	clocks = <&clks 121>, <&clks 57>;
132	clock-names = "ipg", "per";
133	status = "disabled";
134	};
135
136	i2c2: i2c@43f98000 {
137	#address-cells = <1>;
138	#size-cells = <0>;
139	compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
140	reg = <0x43f98000 0x4000>;
141	clocks = <&clks 48>;
142	clock-names = "";
143	interrupts = <4>;
144	status = "disabled";
145	};
146
147	owire@43f9c000 {
148	#address-cells = <1>;
149	#size-cells = <0>;
150	reg = <0x43f9c000 0x4000>;
151	clocks = <&clks 51>;
152	clock-names = "";
153	interrupts = <2>;
154	status = "disabled";
155	};
156
157	spi1: cspi@43fa4000 {
158	#address-cells = <1>;
159	#size-cells = <0>;
160	compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
161	reg = <0x43fa4000 0x4000>;
37523dc5 JA	162	clocks = <&clks 62>, <&clks 62>;
37523dc5 JA	163	clock-names = "ipg", "per";
5658a68f SH	164	interrupts = <14>;
	165	status = "disabled";
	166	};
	167
	168	kpp@43fa8000 {
	169	#address-cells = <1>;
	170	#size-cells = <0>;
	171	reg = <0x43fa8000 0x4000>;
	172	clocks = <&clks 102>;
	173	clock-names = "";
	174	interrupts = <24>;
	175	status = "disabled";
	176	};
	177
53110aa0	178	iomuxc: iomuxc@43fac000 {
5658a68f SH	179	compatible = "fsl,imx25-iomuxc";
	180	reg = <0x43fac000 0x4000>;
	181	};
	182
ec2ea8c1	183	audmux: audmux@43fb0000 {
5658a68f SH	184	compatible = "fsl,imx25-audmux", "fsl,imx31-audmux";
	185	reg = <0x43fb0000 0x4000>;
	186	status = "disabled";
	187	};
	188	};
	189
	190	spba@50000000 {
	191	compatible = "fsl,spba-bus", "simple-bus";
	192	#address-cells = <1>;
	193	#size-cells = <1>;
	194	reg = <0x50000000 0x40000>;
	195	ranges;
	196
	197	spi3: cspi@50004000 {
	198	#address-cells = <1>;
	199	#size-cells = <0>;
	200	compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
	201	reg = <0x50004000 0x4000>;
	202	interrupts = <0>;
37523dc5 JA	203	clocks = <&clks 80>, <&clks 80>;
37523dc5 JA	204	clock-names = "ipg", "per";
5658a68f SH	205	status = "disabled";
	206	};
	207
	208	uart4: serial@50008000 {
	209	compatible = "fsl,imx25-uart", "fsl,imx21-uart";
	210	reg = <0x50008000 0x4000>;
	211	interrupts = <5>;
	212	clocks = <&clks 123>, <&clks 57>;
	213	clock-names = "ipg", "per";
	214	status = "disabled";
	215	};
	216
	217	uart3: serial@5000c000 {
	218	compatible = "fsl,imx25-uart", "fsl,imx21-uart";
	219	reg = <0x5000c000 0x4000>;
	220	interrupts = <18>;
	221	clocks = <&clks 122>, <&clks 57>;
	222	clock-names = "ipg", "per";
	223	status = "disabled";
	224	};
	225
	226	spi2: cspi@50010000 {
	227	#address-cells = <1>;
	228	#size-cells = <0>;
	229	compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
	230	reg = <0x50010000 0x4000>;
37523dc5 JA	231	clocks = <&clks 79>, <&clks 79>;
37523dc5 JA	232	clock-names = "ipg", "per";
5658a68f SH	233	interrupts = <13>;
	234	status = "disabled";
	235	};
	236
	237	ssi2: ssi@50014000 {
	238	compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
	239	reg = <0x50014000 0x4000>;
	240	interrupts = <11>;
7803c620 DC	241	clocks = <&clks 118>;
	242	clock-names = "ipg";
	243	dmas = <&sdma 24 1 0>,
	244	<&sdma 25 1 0>;
	245	dma-names = "rx", "tx";
5658a68f SH	246	status = "disabled";
	247	};
	248
	249	esai@50018000 {
	250	reg = <0x50018000 0x4000>;
	251	interrupts = <7>;
	252	};
	253
	254	uart5: serial@5002c000 {
	255	compatible = "fsl,imx25-uart", "fsl,imx21-uart";
	256	reg = <0x5002c000 0x4000>;
	257	interrupts = <40>;
	258	clocks = <&clks 124>, <&clks 57>;
	259	clock-names = "ipg", "per";
	260	status = "disabled";
	261	};
	262
	263	tsc: tsc@50030000 {
	264	compatible = "fsl,imx25-adc", "fsl,imx21-tsc";
	265	reg = <0x50030000 0x4000>;
	266	interrupts = <46>;
	267	clocks = <&clks 119>;
	268	clock-names = "ipg";
	269	status = "disabled";
	270	};
	271
	272	ssi1: ssi@50034000 {
	273	compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
	274	reg = <0x50034000 0x4000>;
	275	interrupts = <12>;
7803c620 DC	276	clocks = <&clks 117>;
	277	clock-names = "ipg";
	278	dmas = <&sdma 28 1 0>,
	279	<&sdma 29 1 0>;
	280	dma-names = "rx", "tx";
5658a68f SH	281	status = "disabled";
	282	};
	283
	284	fec: ethernet@50038000 {
	285	compatible = "fsl,imx25-fec";
	286	reg = <0x50038000 0x4000>;
	287	interrupts = <57>;
	288	clocks = <&clks 88>, <&clks 65>;
	289	clock-names = "ipg", "ahb";
	290	status = "disabled";
	291	};
	292	};
	293
	294	aips@53f00000 { /* AIPS2 */
	295	compatible = "fsl,aips-bus", "simple-bus";
	296	#address-cells = <1>;
	297	#size-cells = <1>;
	298	reg = <0x53f00000 0x100000>;
	299	ranges;
	300
	301	clks: ccm@53f80000 {
	302	compatible = "fsl,imx25-ccm";
	303	reg = <0x53f80000 0x4000>;
	304	interrupts = <31>;
	305	#clock-cells = <1>;
	306	};
	307
	308	gpt4: timer@53f84000 {
	309	compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
	310	reg = <0x53f84000 0x4000>;
	311	clocks = <&clks 9>, <&clks 45>;
	312	clock-names = "ipg", "per";
	313	interrupts = <1>;
	314	};
	315
	316	gpt3: timer@53f88000 {
	317	compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
	318	reg = <0x53f88000 0x4000>;
	319	clocks = <&clks 9>, <&clks 47>;
	320	clock-names = "ipg", "per";
	321	interrupts = <29>;
	322	};
	323
	324	gpt2: timer@53f8c000 {
	325	compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
	326	reg = <0x53f8c000 0x4000>;
	327	clocks = <&clks 9>, <&clks 47>;
	328	clock-names = "ipg", "per";
	329	interrupts = <53>;
	330	};
	331
	332	gpt1: timer@53f90000 {
	333	compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
	334	reg = <0x53f90000 0x4000>;
	335	clocks = <&clks 9>, <&clks 47>;
	336	clock-names = "ipg", "per";
	337	interrupts = <54>;
	338	};
	339
	340	epit1: timer@53f94000 {
	341	compatible = "fsl,imx25-epit";
	342	reg = <0x53f94000 0x4000>;
	343	interrupts = <28>;
	344	};
345
346	epit2: timer@53f98000 {
347	compatible = "fsl,imx25-epit";
348	reg = <0x53f98000 0x4000>;
349	interrupts = <27>;
350	};
351
352	gpio4: gpio@53f9c000 {
353	compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
354	reg = <0x53f9c000 0x4000>;
355	interrupts = <23>;
356	gpio-controller;
357	#gpio-cells = <2>;
358	interrupt-controller;
359	#interrupt-cells = <2>;
360	};
361
362	pwm2: pwm@53fa0000 {
363	compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
364	#pwm-cells = <2>;
365	reg = <0x53fa0000 0x4000>;
366	clocks = <&clks 106>, <&clks 36>;
367	clock-names = "ipg", "per";
368	interrupts = <36>;
369	};
370
371	gpio3: gpio@53fa4000 {
372	compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
373	reg = <0x53fa4000 0x4000>;
374	interrupts = <16>;
375	gpio-controller;
376	#gpio-cells = <2>;
377	interrupt-controller;
378	#interrupt-cells = <2>;
379	};
380
381	pwm3: pwm@53fa8000 {
382	compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
383	#pwm-cells = <2>;
384	reg = <0x53fa8000 0x4000>;
385	clocks = <&clks 107>, <&clks 36>;
386	clock-names = "ipg", "per";
387	interrupts = <41>;
388	};
389
390	esdhc1: esdhc@53fb4000 {
391	compatible = "fsl,imx25-esdhc";
392	reg = <0x53fb4000 0x4000>;
393	interrupts = <9>;
394	clocks = <&clks 86>, <&clks 63>, <&clks 45>;
395	clock-names = "ipg", "ahb", "per";
396	status = "disabled";
397	};
398
399	esdhc2: esdhc@53fb8000 {
400	compatible = "fsl,imx25-esdhc";
401	reg = <0x53fb8000 0x4000>;
402	interrupts = <8>;
403	clocks = <&clks 87>, <&clks 64>, <&clks 46>;
404	clock-names = "ipg", "ahb", "per";
405	status = "disabled";
406	};
407
c770f7c0 MW	408	lcdc: lcdc@53fbc000 {
c770f7c0 MW	409	compatible = "fsl,imx25-fb", "fsl,imx21-fb";
5658a68f SH	410	reg = <0x53fbc000 0x4000>;
	411	interrupts = <39>;
	412	clocks = <&clks 103>, <&clks 66>, <&clks 49>;
	413	clock-names = "ipg", "ahb", "per";
	414	status = "disabled";
	415	};
	416
	417	slcdc@53fc0000 {
	418	reg = <0x53fc0000 0x4000>;
	419	interrupts = <38>;
	420	status = "disabled";
	421	};
	422
	423	pwm4: pwm@53fc8000 {
	424	compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
	425	reg = <0x53fc8000 0x4000>;
	426	clocks = <&clks 108>, <&clks 36>;
	427	clock-names = "ipg", "per";
	428	interrupts = <42>;
	429	};
	430
	431	gpio1: gpio@53fcc000 {
	432	compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
	433	reg = <0x53fcc000 0x4000>;
	434	interrupts = <52>;
	435	gpio-controller;
	436	#gpio-cells = <2>;
	437	interrupt-controller;
	438	#interrupt-cells = <2>;
	439	};
	440
	441	gpio2: gpio@53fd0000 {
	442	compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
	443	reg = <0x53fd0000 0x4000>;
	444	interrupts = <51>;
	445	gpio-controller;
	446	#gpio-cells = <2>;
	447	interrupt-controller;
	448	#interrupt-cells = <2>;
	449	};
	450
7803c620	451	sdma: sdma@53fd4000 {
5658a68f SH	452	compatible = "fsl,imx25-sdma", "fsl,imx35-sdma";
	453	reg = <0x53fd4000 0x4000>;
	454	clocks = <&clks 112>, <&clks 68>;
	455	clock-names = "ipg", "ahb";
fb72bb21	456	#dma-cells = <3>;
5658a68f	457	interrupts = <34>;
cabd1b29	458	fsl,sdma-ram-script-name = "imx/sdma/sdma-imx25.bin";
5658a68f SH	459	};
	460
	461	wdog@53fdc000 {
	462	compatible = "fsl,imx25-wdt", "fsl,imx21-wdt";
	463	reg = <0x53fdc000 0x4000>;
	464	clocks = <&clks 126>;
	465	clock-names = "";
	466	interrupts = <55>;
	467	};
	468
	469	pwm1: pwm@53fe0000 {
	470	compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
	471	#pwm-cells = <2>;
	472	reg = <0x53fe0000 0x4000>;
	473	clocks = <&clks 105>, <&clks 36>;
	474	clock-names = "ipg", "per";
	475	interrupts = <26>;
	476	};
	477
684f6a23 SH	478	iim: iim@53ff0000 {
	479	compatible = "fsl,imx25-iim", "fsl,imx27-iim";
	480	reg = <0x53ff0000 0x4000>;
	481	interrupts = <19>;
	482	clocks = <&clks 99>;
	483	};
	484
5658a68f SH	485	usbphy1: usbphy@1 {
	486	compatible = "nop-usbphy";
	487	status = "disabled";
	488	};
	489
	490	usbphy2: usbphy@2 {
	491	compatible = "nop-usbphy";
	492	status = "disabled";
	493	};
	494
	495	usbotg: usb@53ff4000 {
	496	compatible = "fsl,imx25-usb", "fsl,imx27-usb";
	497	reg = <0x53ff4000 0x0200>;
	498	interrupts = <37>;
	499	clocks = <&clks 9>, <&clks 70>, <&clks 8>;
	500	clock-names = "ipg", "ahb", "per";
	501	fsl,usbmisc = <&usbmisc 0>;
	502	status = "disabled";
	503	};
	504
	505	usbhost1: usb@53ff4400 {
	506	compatible = "fsl,imx25-usb", "fsl,imx27-usb";
	507	reg = <0x53ff4400 0x0200>;
	508	interrupts = <35>;
	509	clocks = <&clks 9>, <&clks 70>, <&clks 8>;
	510	clock-names = "ipg", "ahb", "per";
	511	fsl,usbmisc = <&usbmisc 1>;
	512	status = "disabled";
	513	};
	514
	515	usbmisc: usbmisc@53ff4600 {
	516	#index-cells = <1>;
	517	compatible = "fsl,imx25-usbmisc";
	518	clocks = <&clks 9>, <&clks 70>, <&clks 8>;
	519	clock-names = "ipg", "ahb", "per";
	520	reg = <0x53ff4600 0x00f>;
	521	status = "disabled";
	522	};
	523
	524	dryice@53ffc000 {
	525	compatible = "fsl,imx25-dryice", "fsl,imx25-rtc";
	526	reg = <0x53ffc000 0x4000>;
	527	clocks = <&clks 81>;
	528	clock-names = "ipg";
	529	interrupts = <25>;
	530	};
	531	};
	532
	533	emi@80000000 {
	534	compatible = "fsl,emi-bus", "simple-bus";
	535	#address-cells = <1>;
	536	#size-cells = <1>;
	537	reg = <0x80000000 0x3b002000>;
	538	ranges;
	539
be4ccfce	540	nfc: nand@bb000000 {
5658a68f SH	541	#address-cells = <1>;
	542	#size-cells = <1>;
	543
	544	compatible = "fsl,imx25-nand";
	545	reg = <0xbb000000 0x2000>;
	546	clocks = <&clks 50>;
	547	clock-names = "";
	548	interrupts = <33>;
	549	status = "disabled";
	550	};
	551	};
	552	};
	553	};