[mirror_ubuntu-bionic-kernel.git] / arch / arm / boot / dts / imx25.dtsi

/*
 * Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
 *
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

#include "skeleton.dtsi"

/ {
	aliases {
		gpio0 = &gpio1;
		gpio1 = &gpio2;
		gpio2 = &gpio3;
		gpio3 = &gpio4;
		i2c0 = &i2c1;
		i2c1 = &i2c2;
		i2c2 = &i2c3;
		serial0 = &uart1;
		serial1 = &uart2;
		serial2 = &uart3;
		serial3 = &uart4;
		serial4 = &uart5;
		spi0 = &spi1;
		spi1 = &spi2;
		spi2 = &spi3;
		usb0 = &usbotg;
		usb1 = &usbhost1;
	};

	cpus {
		#address-cells = <0>;
		#size-cells = <0>;

		cpu {
			compatible = "arm,arm926ej-s";
			device_type = "cpu";
		};
	};

	asic: asic-interrupt-controller@68000000 {
		compatible = "fsl,imx25-asic", "fsl,avic";
		interrupt-controller;
		#interrupt-cells = <1>;
		reg = <0x68000000 0x8000000>;
	};

	clocks {
		#address-cells = <1>;
		#size-cells = <0>;

		osc {
			compatible = "fsl,imx-osc", "fixed-clock";
			clock-frequency = <24000000>;
		};
	};

	soc {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "simple-bus";
		interrupt-parent = <&asic>;
		ranges;

		aips@43f00000 { /* AIPS1 */
			compatible = "fsl,aips-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x43f00000 0x100000>;
			ranges;

			i2c1: i2c@43f80000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
				reg = <0x43f80000 0x4000>;
				clocks = <&clks 48>;
				clock-names = "";
				interrupts = <3>;
				status = "disabled";
			};

			i2c3: i2c@43f84000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
				reg = <0x43f84000 0x4000>;
				clocks = <&clks 48>;
				clock-names = "";
				interrupts = <10>;
				status = "disabled";
			};

			can1: can@43f88000 {
				compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
				reg = <0x43f88000 0x4000>;
				interrupts = <43>;
				clocks = <&clks 75>, <&clks 75>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			can2: can@43f8c000 {
				compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
				reg = <0x43f8c000 0x4000>;
				interrupts = <44>;
				clocks = <&clks 76>, <&clks 76>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			uart1: serial@43f90000 {
				compatible = "fsl,imx25-uart", "fsl,imx21-uart";
				reg = <0x43f90000 0x4000>;
				interrupts = <45>;
				clocks = <&clks 120>, <&clks 57>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			uart2: serial@43f94000 {
				compatible = "fsl,imx25-uart", "fsl,imx21-uart";
				reg = <0x43f94000 0x4000>;
				interrupts = <32>;
				clocks = <&clks 121>, <&clks 57>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			i2c2: i2c@43f98000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
				reg = <0x43f98000 0x4000>;
				clocks = <&clks 48>;
				clock-names = "";
				interrupts = <4>;
				status = "disabled";
			};

			owire@43f9c000 {
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <0x43f9c000 0x4000>;
				clocks = <&clks 51>;
				clock-names = "";
				interrupts = <2>;
				status = "disabled";
			};

			spi1: cspi@43fa4000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
				reg = <0x43fa4000 0x4000>;
				clocks = <&clks 62>, <&clks 62>;
				clock-names = "ipg", "per";
				interrupts = <14>;
				status = "disabled";
			};

			kpp@43fa8000 {
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <0x43fa8000 0x4000>;
				clocks = <&clks 102>;
				clock-names = "";
				interrupts = <24>;
				status = "disabled";
			};

			iomuxc@43fac000{
				compatible = "fsl,imx25-iomuxc";
				reg = <0x43fac000 0x4000>;
			};

			audmux@43fb0000 {
				compatible = "fsl,imx25-audmux", "fsl,imx31-audmux";
				reg = <0x43fb0000 0x4000>;
				status = "disabled";
			};
		};

		spba@50000000 {
			compatible = "fsl,spba-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x50000000 0x40000>;
			ranges;

			spi3: cspi@50004000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
				reg = <0x50004000 0x4000>;
				interrupts = <0>;
				clocks = <&clks 80>, <&clks 80>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			uart4: serial@50008000 {
				compatible = "fsl,imx25-uart", "fsl,imx21-uart";
				reg = <0x50008000 0x4000>;
				interrupts = <5>;
				clocks = <&clks 123>, <&clks 57>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			uart3: serial@5000c000 {
				compatible = "fsl,imx25-uart", "fsl,imx21-uart";
				reg = <0x5000c000 0x4000>;
				interrupts = <18>;
				clocks = <&clks 122>, <&clks 57>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			spi2: cspi@50010000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
				reg = <0x50010000 0x4000>;
				clocks = <&clks 79>, <&clks 79>;
				clock-names = "ipg", "per";
				interrupts = <13>;
				status = "disabled";
			};

			ssi2: ssi@50014000 {
				compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
				reg = <0x50014000 0x4000>;
				interrupts = <11>;
				clocks = <&clks 118>;
				clock-names = "ipg";
				dmas = <&sdma 24 1 0>,
				       <&sdma 25 1 0>;
				dma-names = "rx", "tx";
				status = "disabled";
			};

			esai@50018000 {
				reg = <0x50018000 0x4000>;
				interrupts = <7>;
			};

			uart5: serial@5002c000 {
				compatible = "fsl,imx25-uart", "fsl,imx21-uart";
				reg = <0x5002c000 0x4000>;
				interrupts = <40>;
				clocks = <&clks 124>, <&clks 57>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			tsc: tsc@50030000 {
				compatible = "fsl,imx25-adc", "fsl,imx21-tsc";
				reg = <0x50030000 0x4000>;
				interrupts = <46>;
				clocks = <&clks 119>;
				clock-names = "ipg";
				status = "disabled";
			};

			ssi1: ssi@50034000 {
				compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
				reg = <0x50034000 0x4000>;
				interrupts = <12>;
				clocks = <&clks 117>;
				clock-names = "ipg";
				dmas = <&sdma 28 1 0>,
				       <&sdma 29 1 0>;
				dma-names = "rx", "tx";
				status = "disabled";
			};

			fec: ethernet@50038000 {
				compatible = "fsl,imx25-fec";
				reg = <0x50038000 0x4000>;
				interrupts = <57>;
				clocks = <&clks 88>, <&clks 65>;
				clock-names = "ipg", "ahb";
				status = "disabled";
			};
		};

		aips@53f00000 { /* AIPS2 */
			compatible = "fsl,aips-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x53f00000 0x100000>;
			ranges;

			clks: ccm@53f80000 {
				compatible = "fsl,imx25-ccm";
				reg = <0x53f80000 0x4000>;
				interrupts = <31>;
				#clock-cells = <1>;
			};

			gpt4: timer@53f84000 {
				compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
				reg = <0x53f84000 0x4000>;
				clocks = <&clks 9>, <&clks 45>;
				clock-names = "ipg", "per";
				interrupts = <1>;
			};

			gpt3: timer@53f88000 {
				compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
				reg = <0x53f88000 0x4000>;
				clocks = <&clks 9>, <&clks 47>;
				clock-names = "ipg", "per";
				interrupts = <29>;
			};

			gpt2: timer@53f8c000 {
				compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
				reg = <0x53f8c000 0x4000>;
				clocks = <&clks 9>, <&clks 47>;
				clock-names = "ipg", "per";
				interrupts = <53>;
			};

			gpt1: timer@53f90000 {
				compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
				reg = <0x53f90000 0x4000>;
				clocks = <&clks 9>, <&clks 47>;
				clock-names = "ipg", "per";
				interrupts = <54>;
			};

			epit1: timer@53f94000 {
				compatible = "fsl,imx25-epit";
				reg = <0x53f94000 0x4000>;
				interrupts = <28>;
			};

			epit2: timer@53f98000 {
				compatible = "fsl,imx25-epit";
				reg = <0x53f98000 0x4000>;
				interrupts = <27>;
			};

			gpio4: gpio@53f9c000 {
				compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
				reg = <0x53f9c000 0x4000>;
				interrupts = <23>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
			};

			pwm2: pwm@53fa0000 {
				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
				#pwm-cells = <2>;
				reg = <0x53fa0000 0x4000>;
				clocks = <&clks 106>, <&clks 36>;
				clock-names = "ipg", "per";
				interrupts = <36>;
			};

			gpio3: gpio@53fa4000 {
				compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
				reg = <0x53fa4000 0x4000>;
				interrupts = <16>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
			};

			pwm3: pwm@53fa8000 {
				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
				#pwm-cells = <2>;
				reg = <0x53fa8000 0x4000>;
				clocks = <&clks 107>, <&clks 36>;
				clock-names = "ipg", "per";
				interrupts = <41>;
			};

			esdhc1: esdhc@53fb4000 {
				compatible = "fsl,imx25-esdhc";
				reg = <0x53fb4000 0x4000>;
				interrupts = <9>;
				clocks = <&clks 86>, <&clks 63>, <&clks 45>;
				clock-names = "ipg", "ahb", "per";
				status = "disabled";
			};

			esdhc2: esdhc@53fb8000 {
				compatible = "fsl,imx25-esdhc";
				reg = <0x53fb8000 0x4000>;
				interrupts = <8>;
				clocks = <&clks 87>, <&clks 64>, <&clks 46>;
				clock-names = "ipg", "ahb", "per";
				status = "disabled";
			};

			lcdc: lcdc@53fbc000 {
				compatible = "fsl,imx25-fb", "fsl,imx21-fb";
				reg = <0x53fbc000 0x4000>;
				interrupts = <39>;
				clocks = <&clks 103>, <&clks 66>, <&clks 49>;
				clock-names = "ipg", "ahb", "per";
				status = "disabled";
			};

			slcdc@53fc0000 {
				reg = <0x53fc0000 0x4000>;
				interrupts = <38>;
				status = "disabled";
			};

			pwm4: pwm@53fc8000 {
				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
				reg = <0x53fc8000 0x4000>;
				clocks = <&clks 108>, <&clks 36>;
				clock-names = "ipg", "per";
				interrupts = <42>;
			};

			gpio1: gpio@53fcc000 {
				compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
				reg = <0x53fcc000 0x4000>;
				interrupts = <52>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
			};

			gpio2: gpio@53fd0000 {
				compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
				reg = <0x53fd0000 0x4000>;
				interrupts = <51>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
			};

			sdma: sdma@53fd4000 {
				compatible = "fsl,imx25-sdma", "fsl,imx35-sdma";
				reg = <0x53fd4000 0x4000>;
				clocks = <&clks 112>, <&clks 68>;
				clock-names = "ipg", "ahb";
				#dma-cells = <3>;
				interrupts = <34>;
			};

			wdog@53fdc000 {
				compatible = "fsl,imx25-wdt", "fsl,imx21-wdt";
				reg = <0x53fdc000 0x4000>;
				clocks = <&clks 126>;
				clock-names = "";
				interrupts = <55>;
			};

			pwm1: pwm@53fe0000 {
				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
				#pwm-cells = <2>;
				reg = <0x53fe0000 0x4000>;
				clocks = <&clks 105>, <&clks 36>;
				clock-names = "ipg", "per";
				interrupts = <26>;
			};

			iim: iim@53ff0000 {
				compatible = "fsl,imx25-iim", "fsl,imx27-iim";
				reg = <0x53ff0000 0x4000>;
				interrupts = <19>;
				clocks = <&clks 99>;
			};

			usbphy1: usbphy@1 {
				compatible = "nop-usbphy";
				status = "disabled";
			};

			usbphy2: usbphy@2 {
				compatible = "nop-usbphy";
				status = "disabled";
			};

			usbotg: usb@53ff4000 {
				compatible = "fsl,imx25-usb", "fsl,imx27-usb";
				reg = <0x53ff4000 0x0200>;
				interrupts = <37>;
				clocks = <&clks 9>, <&clks 70>, <&clks 8>;
				clock-names = "ipg", "ahb", "per";
				fsl,usbmisc = <&usbmisc 0>;
				status = "disabled";
			};

			usbhost1: usb@53ff4400 {
				compatible = "fsl,imx25-usb", "fsl,imx27-usb";
				reg = <0x53ff4400 0x0200>;
				interrupts = <35>;
				clocks = <&clks 9>, <&clks 70>, <&clks 8>;
				clock-names = "ipg", "ahb", "per";
				fsl,usbmisc = <&usbmisc 1>;
				status = "disabled";
			};

			usbmisc: usbmisc@53ff4600 {
				#index-cells = <1>;
				compatible = "fsl,imx25-usbmisc";
				clocks = <&clks 9>, <&clks 70>, <&clks 8>;
				clock-names = "ipg", "ahb", "per";
				reg = <0x53ff4600 0x00f>;
				status = "disabled";
			};

			dryice@53ffc000 {
				compatible = "fsl,imx25-dryice", "fsl,imx25-rtc";
				reg = <0x53ffc000 0x4000>;
				clocks = <&clks 81>;
				clock-names = "ipg";
				interrupts = <25>;
			};
		};

		emi@80000000 {
			compatible = "fsl,emi-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x80000000 0x3b002000>;
			ranges;

			nfc: nand@bb000000 {
				#address-cells = <1>;
				#size-cells = <1>;

				compatible = "fsl,imx25-nand";
				reg = <0xbb000000 0x2000>;
				clocks = <&clks 50>;
				clock-names = "";
				interrupts = <33>;
				status = "disabled";
			};
		};
	};
};
Commit	Line	Data
5658a68f SH	1	/*
	2	* Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
	3	*
	4	* The code contained herein is licensed under the GNU General Public
	5	* License. You may obtain a copy of the GNU General Public License
	6	* Version 2 or later at the following locations:
	7	*
	8	* http://www.opensource.org/licenses/gpl-license.html
	9	* http://www.gnu.org/copyleft/gpl.html
	10	*/
	11
36dffd8f	12	#include "skeleton.dtsi"
5658a68f SH	13
	14	/ {
	15	aliases {
6ed1a0e5 SH	16	gpio0 = &gpio1;
	17	gpio1 = &gpio2;
	18	gpio2 = &gpio3;
	19	gpio3 = &gpio4;
	20	i2c0 = &i2c1;
	21	i2c1 = &i2c2;
	22	i2c2 = &i2c3;
5658a68f SH	23	serial0 = &uart1;
	24	serial1 = &uart2;
	25	serial2 = &uart3;
	26	serial3 = &uart4;
	27	serial4 = &uart5;
6ed1a0e5 SH	28	spi0 = &spi1;
	29	spi1 = &spi2;
	30	spi2 = &spi3;
5658a68f SH	31	usb0 = &usbotg;
	32	usb1 = &usbhost1;
	33	};
	34
070bd7e4 FE	35	cpus {
	36	#address-cells = <0>;
	37	#size-cells = <0>;
	38
	39	cpu {
	40	compatible = "arm,arm926ej-s";
	41	device_type = "cpu";
	42	};
	43	};
	44
5658a68f SH	45	asic: asic-interrupt-controller@68000000 {
	46	compatible = "fsl,imx25-asic", "fsl,avic";
	47	interrupt-controller;
	48	#interrupt-cells = <1>;
	49	reg = <0x68000000 0x8000000>;
	50	};
	51
	52	clocks {
	53	#address-cells = <1>;
	54	#size-cells = <0>;
	55
	56	osc {
	57	compatible = "fsl,imx-osc", "fixed-clock";
	58	clock-frequency = <24000000>;
	59	};
	60	};
	61
	62	soc {
	63	#address-cells = <1>;
	64	#size-cells = <1>;
	65	compatible = "simple-bus";
	66	interrupt-parent = <&asic>;
	67	ranges;
	68
	69	aips@43f00000 { /* AIPS1 */
	70	compatible = "fsl,aips-bus", "simple-bus";
	71	#address-cells = <1>;
	72	#size-cells = <1>;
	73	reg = <0x43f00000 0x100000>;
	74	ranges;
	75
	76	i2c1: i2c@43f80000 {
	77	#address-cells = <1>;
	78	#size-cells = <0>;
	79	compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
	80	reg = <0x43f80000 0x4000>;
	81	clocks = <&clks 48>;
	82	clock-names = "";
	83	interrupts = <3>;
	84	status = "disabled";
	85	};
	86
	87	i2c3: i2c@43f84000 {
	88	#address-cells = <1>;
	89	#size-cells = <0>;
	90	compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
	91	reg = <0x43f84000 0x4000>;
	92	clocks = <&clks 48>;
	93	clock-names = "";
	94	interrupts = <10>;
	95	status = "disabled";
	96	};
	97
	98	can1: can@43f88000 {
	99	compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
	100	reg = <0x43f88000 0x4000>;
	101	interrupts = <43>;
	102	clocks = <&clks 75>, <&clks 75>;
	103	clock-names = "ipg", "per";
	104	status = "disabled";
	105	};
	106
	107	can2: can@43f8c000 {
	108	compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
109	reg = <0x43f8c000 0x4000>;
110	interrupts = <44>;
111	clocks = <&clks 76>, <&clks 76>;
112	clock-names = "ipg", "per";
113	status = "disabled";
114	};
115
116	uart1: serial@43f90000 {
117	compatible = "fsl,imx25-uart", "fsl,imx21-uart";
118	reg = <0x43f90000 0x4000>;
119	interrupts = <45>;
120	clocks = <&clks 120>, <&clks 57>;
121	clock-names = "ipg", "per";
122	status = "disabled";
123	};
124
125	uart2: serial@43f94000 {
126	compatible = "fsl,imx25-uart", "fsl,imx21-uart";
127	reg = <0x43f94000 0x4000>;
128	interrupts = <32>;
129	clocks = <&clks 121>, <&clks 57>;
130	clock-names = "ipg", "per";
131	status = "disabled";
132	};
133
134	i2c2: i2c@43f98000 {
135	#address-cells = <1>;
136	#size-cells = <0>;
137	compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
138	reg = <0x43f98000 0x4000>;
139	clocks = <&clks 48>;
140	clock-names = "";
141	interrupts = <4>;
142	status = "disabled";
143	};
144
145	owire@43f9c000 {
146	#address-cells = <1>;
147	#size-cells = <0>;
148	reg = <0x43f9c000 0x4000>;
149	clocks = <&clks 51>;
150	clock-names = "";
151	interrupts = <2>;
152	status = "disabled";
153	};
154
155	spi1: cspi@43fa4000 {
156	#address-cells = <1>;
157	#size-cells = <0>;
158	compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
159	reg = <0x43fa4000 0x4000>;
37523dc5 JA	160	clocks = <&clks 62>, <&clks 62>;
37523dc5 JA	161	clock-names = "ipg", "per";
5658a68f SH	162	interrupts = <14>;
	163	status = "disabled";
	164	};
	165
	166	kpp@43fa8000 {
	167	#address-cells = <1>;
	168	#size-cells = <0>;
	169	reg = <0x43fa8000 0x4000>;
	170	clocks = <&clks 102>;
	171	clock-names = "";
	172	interrupts = <24>;
	173	status = "disabled";
	174	};
	175
	176	iomuxc@43fac000{
	177	compatible = "fsl,imx25-iomuxc";
	178	reg = <0x43fac000 0x4000>;
	179	};
	180
	181	audmux@43fb0000 {
	182	compatible = "fsl,imx25-audmux", "fsl,imx31-audmux";
	183	reg = <0x43fb0000 0x4000>;
	184	status = "disabled";
	185	};
	186	};
	187
	188	spba@50000000 {
	189	compatible = "fsl,spba-bus", "simple-bus";
	190	#address-cells = <1>;
	191	#size-cells = <1>;
	192	reg = <0x50000000 0x40000>;
	193	ranges;
	194
	195	spi3: cspi@50004000 {
	196	#address-cells = <1>;
	197	#size-cells = <0>;
	198	compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
	199	reg = <0x50004000 0x4000>;
	200	interrupts = <0>;
37523dc5 JA	201	clocks = <&clks 80>, <&clks 80>;
37523dc5 JA	202	clock-names = "ipg", "per";
5658a68f SH	203	status = "disabled";
	204	};
	205
	206	uart4: serial@50008000 {
	207	compatible = "fsl,imx25-uart", "fsl,imx21-uart";
	208	reg = <0x50008000 0x4000>;
	209	interrupts = <5>;
	210	clocks = <&clks 123>, <&clks 57>;
	211	clock-names = "ipg", "per";
	212	status = "disabled";
	213	};
	214
	215	uart3: serial@5000c000 {
	216	compatible = "fsl,imx25-uart", "fsl,imx21-uart";
	217	reg = <0x5000c000 0x4000>;
	218	interrupts = <18>;
	219	clocks = <&clks 122>, <&clks 57>;
	220	clock-names = "ipg", "per";
	221	status = "disabled";
	222	};
	223
	224	spi2: cspi@50010000 {
	225	#address-cells = <1>;
	226	#size-cells = <0>;
	227	compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
	228	reg = <0x50010000 0x4000>;
37523dc5 JA	229	clocks = <&clks 79>, <&clks 79>;
37523dc5 JA	230	clock-names = "ipg", "per";
5658a68f SH	231	interrupts = <13>;
	232	status = "disabled";
	233	};
	234
	235	ssi2: ssi@50014000 {
	236	compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
	237	reg = <0x50014000 0x4000>;
	238	interrupts = <11>;
7803c620 DC	239	clocks = <&clks 118>;
	240	clock-names = "ipg";
	241	dmas = <&sdma 24 1 0>,
	242	<&sdma 25 1 0>;
	243	dma-names = "rx", "tx";
5658a68f SH	244	status = "disabled";
	245	};
	246
	247	esai@50018000 {
	248	reg = <0x50018000 0x4000>;
	249	interrupts = <7>;
	250	};
	251
	252	uart5: serial@5002c000 {
	253	compatible = "fsl,imx25-uart", "fsl,imx21-uart";
	254	reg = <0x5002c000 0x4000>;
	255	interrupts = <40>;
	256	clocks = <&clks 124>, <&clks 57>;
	257	clock-names = "ipg", "per";
	258	status = "disabled";
	259	};
	260
	261	tsc: tsc@50030000 {
	262	compatible = "fsl,imx25-adc", "fsl,imx21-tsc";
	263	reg = <0x50030000 0x4000>;
	264	interrupts = <46>;
	265	clocks = <&clks 119>;
	266	clock-names = "ipg";
	267	status = "disabled";
	268	};
	269
	270	ssi1: ssi@50034000 {
	271	compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
	272	reg = <0x50034000 0x4000>;
	273	interrupts = <12>;
7803c620 DC	274	clocks = <&clks 117>;
	275	clock-names = "ipg";
	276	dmas = <&sdma 28 1 0>,
	277	<&sdma 29 1 0>;
	278	dma-names = "rx", "tx";
5658a68f SH	279	status = "disabled";
	280	};
	281
	282	fec: ethernet@50038000 {
	283	compatible = "fsl,imx25-fec";
	284	reg = <0x50038000 0x4000>;
	285	interrupts = <57>;
	286	clocks = <&clks 88>, <&clks 65>;
	287	clock-names = "ipg", "ahb";
	288	status = "disabled";
	289	};
	290	};
	291
	292	aips@53f00000 { /* AIPS2 */
	293	compatible = "fsl,aips-bus", "simple-bus";
	294	#address-cells = <1>;
	295	#size-cells = <1>;
	296	reg = <0x53f00000 0x100000>;
	297	ranges;
	298
	299	clks: ccm@53f80000 {
	300	compatible = "fsl,imx25-ccm";
	301	reg = <0x53f80000 0x4000>;
	302	interrupts = <31>;
	303	#clock-cells = <1>;
	304	};
	305
	306	gpt4: timer@53f84000 {
	307	compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
	308	reg = <0x53f84000 0x4000>;
	309	clocks = <&clks 9>, <&clks 45>;
	310	clock-names = "ipg", "per";
	311	interrupts = <1>;
	312	};
	313
	314	gpt3: timer@53f88000 {
	315	compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
	316	reg = <0x53f88000 0x4000>;
	317	clocks = <&clks 9>, <&clks 47>;
	318	clock-names = "ipg", "per";
	319	interrupts = <29>;
	320	};
	321
	322	gpt2: timer@53f8c000 {
	323	compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
	324	reg = <0x53f8c000 0x4000>;
	325	clocks = <&clks 9>, <&clks 47>;
	326	clock-names = "ipg", "per";
	327	interrupts = <53>;
	328	};
	329
	330	gpt1: timer@53f90000 {
	331	compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
	332	reg = <0x53f90000 0x4000>;
	333	clocks = <&clks 9>, <&clks 47>;
	334	clock-names = "ipg", "per";
	335	interrupts = <54>;
	336	};
	337
	338	epit1: timer@53f94000 {
	339	compatible = "fsl,imx25-epit";
	340	reg = <0x53f94000 0x4000>;
	341	interrupts = <28>;
	342	};
343
344	epit2: timer@53f98000 {
345	compatible = "fsl,imx25-epit";
346	reg = <0x53f98000 0x4000>;
347	interrupts = <27>;
348	};
349
350	gpio4: gpio@53f9c000 {
351	compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
352	reg = <0x53f9c000 0x4000>;
353	interrupts = <23>;
354	gpio-controller;
355	#gpio-cells = <2>;
356	interrupt-controller;
357	#interrupt-cells = <2>;
358	};
359
360	pwm2: pwm@53fa0000 {
361	compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
362	#pwm-cells = <2>;
363	reg = <0x53fa0000 0x4000>;
364	clocks = <&clks 106>, <&clks 36>;
365	clock-names = "ipg", "per";
366	interrupts = <36>;
367	};
368
369	gpio3: gpio@53fa4000 {
370	compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
371	reg = <0x53fa4000 0x4000>;
372	interrupts = <16>;
373	gpio-controller;
374	#gpio-cells = <2>;
375	interrupt-controller;
376	#interrupt-cells = <2>;
377	};
378
379	pwm3: pwm@53fa8000 {
380	compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
381	#pwm-cells = <2>;
382	reg = <0x53fa8000 0x4000>;
383	clocks = <&clks 107>, <&clks 36>;
384	clock-names = "ipg", "per";
385	interrupts = <41>;
386	};
387
388	esdhc1: esdhc@53fb4000 {
389	compatible = "fsl,imx25-esdhc";
390	reg = <0x53fb4000 0x4000>;
391	interrupts = <9>;
392	clocks = <&clks 86>, <&clks 63>, <&clks 45>;
393	clock-names = "ipg", "ahb", "per";
394	status = "disabled";
395	};
396
397	esdhc2: esdhc@53fb8000 {
398	compatible = "fsl,imx25-esdhc";
399	reg = <0x53fb8000 0x4000>;
400	interrupts = <8>;
401	clocks = <&clks 87>, <&clks 64>, <&clks 46>;
402	clock-names = "ipg", "ahb", "per";
403	status = "disabled";
404	};
405
c770f7c0 MW	406	lcdc: lcdc@53fbc000 {
c770f7c0 MW	407	compatible = "fsl,imx25-fb", "fsl,imx21-fb";
5658a68f SH	408	reg = <0x53fbc000 0x4000>;
	409	interrupts = <39>;
	410	clocks = <&clks 103>, <&clks 66>, <&clks 49>;
	411	clock-names = "ipg", "ahb", "per";
	412	status = "disabled";
	413	};
	414
	415	slcdc@53fc0000 {
	416	reg = <0x53fc0000 0x4000>;
	417	interrupts = <38>;
	418	status = "disabled";
	419	};
	420
	421	pwm4: pwm@53fc8000 {
	422	compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
	423	reg = <0x53fc8000 0x4000>;
	424	clocks = <&clks 108>, <&clks 36>;
	425	clock-names = "ipg", "per";
	426	interrupts = <42>;
	427	};
	428
	429	gpio1: gpio@53fcc000 {
	430	compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
	431	reg = <0x53fcc000 0x4000>;
	432	interrupts = <52>;
	433	gpio-controller;
	434	#gpio-cells = <2>;
	435	interrupt-controller;
	436	#interrupt-cells = <2>;
	437	};
	438
	439	gpio2: gpio@53fd0000 {
	440	compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
	441	reg = <0x53fd0000 0x4000>;
	442	interrupts = <51>;
	443	gpio-controller;
	444	#gpio-cells = <2>;
	445	interrupt-controller;
	446	#interrupt-cells = <2>;
	447	};
	448
7803c620	449	sdma: sdma@53fd4000 {
5658a68f SH	450	compatible = "fsl,imx25-sdma", "fsl,imx35-sdma";
	451	reg = <0x53fd4000 0x4000>;
	452	clocks = <&clks 112>, <&clks 68>;
	453	clock-names = "ipg", "ahb";
fb72bb21	454	#dma-cells = <3>;
5658a68f SH	455	interrupts = <34>;
	456	};
	457
	458	wdog@53fdc000 {
	459	compatible = "fsl,imx25-wdt", "fsl,imx21-wdt";
	460	reg = <0x53fdc000 0x4000>;
	461	clocks = <&clks 126>;
	462	clock-names = "";
	463	interrupts = <55>;
	464	};
	465
	466	pwm1: pwm@53fe0000 {
	467	compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
	468	#pwm-cells = <2>;
	469	reg = <0x53fe0000 0x4000>;
	470	clocks = <&clks 105>, <&clks 36>;
	471	clock-names = "ipg", "per";
	472	interrupts = <26>;
	473	};
	474
684f6a23 SH	475	iim: iim@53ff0000 {
	476	compatible = "fsl,imx25-iim", "fsl,imx27-iim";
	477	reg = <0x53ff0000 0x4000>;
	478	interrupts = <19>;
	479	clocks = <&clks 99>;
	480	};
	481
5658a68f SH	482	usbphy1: usbphy@1 {
	483	compatible = "nop-usbphy";
	484	status = "disabled";
	485	};
	486
	487	usbphy2: usbphy@2 {
	488	compatible = "nop-usbphy";
	489	status = "disabled";
	490	};
	491
	492	usbotg: usb@53ff4000 {
	493	compatible = "fsl,imx25-usb", "fsl,imx27-usb";
	494	reg = <0x53ff4000 0x0200>;
	495	interrupts = <37>;
	496	clocks = <&clks 9>, <&clks 70>, <&clks 8>;
	497	clock-names = "ipg", "ahb", "per";
	498	fsl,usbmisc = <&usbmisc 0>;
	499	status = "disabled";
	500	};
	501
	502	usbhost1: usb@53ff4400 {
	503	compatible = "fsl,imx25-usb", "fsl,imx27-usb";
	504	reg = <0x53ff4400 0x0200>;
	505	interrupts = <35>;
	506	clocks = <&clks 9>, <&clks 70>, <&clks 8>;
	507	clock-names = "ipg", "ahb", "per";
	508	fsl,usbmisc = <&usbmisc 1>;
	509	status = "disabled";
	510	};
	511
	512	usbmisc: usbmisc@53ff4600 {
	513	#index-cells = <1>;
	514	compatible = "fsl,imx25-usbmisc";
	515	clocks = <&clks 9>, <&clks 70>, <&clks 8>;
	516	clock-names = "ipg", "ahb", "per";
	517	reg = <0x53ff4600 0x00f>;
	518	status = "disabled";
	519	};
	520
	521	dryice@53ffc000 {
	522	compatible = "fsl,imx25-dryice", "fsl,imx25-rtc";
	523	reg = <0x53ffc000 0x4000>;
	524	clocks = <&clks 81>;
	525	clock-names = "ipg";
	526	interrupts = <25>;
	527	};
	528	};
	529
	530	emi@80000000 {
	531	compatible = "fsl,emi-bus", "simple-bus";
	532	#address-cells = <1>;
	533	#size-cells = <1>;
	534	reg = <0x80000000 0x3b002000>;
	535	ranges;
	536
be4ccfce	537	nfc: nand@bb000000 {
5658a68f SH	538	#address-cells = <1>;
	539	#size-cells = <1>;
	540
	541	compatible = "fsl,imx25-nand";
	542	reg = <0xbb000000 0x2000>;
	543	clocks = <&clks 50>;
	544	clock-names = "";
	545	interrupts = <33>;
	546	status = "disabled";
	547	};
	548	};
	549	};
	550	};