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5658a68f SH |
1 | /* |
2 | * Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de> | |
3 | * | |
4 | * The code contained herein is licensed under the GNU General Public | |
5 | * License. You may obtain a copy of the GNU General Public License | |
6 | * Version 2 or later at the following locations: | |
7 | * | |
8 | * http://www.opensource.org/licenses/gpl-license.html | |
9 | * http://www.gnu.org/copyleft/gpl.html | |
10 | */ | |
11 | ||
36dffd8f | 12 | #include "skeleton.dtsi" |
5658a68f SH |
13 | |
14 | / { | |
15 | aliases { | |
6ed1a0e5 SH |
16 | gpio0 = &gpio1; |
17 | gpio1 = &gpio2; | |
18 | gpio2 = &gpio3; | |
19 | gpio3 = &gpio4; | |
20 | i2c0 = &i2c1; | |
21 | i2c1 = &i2c2; | |
22 | i2c2 = &i2c3; | |
5658a68f SH |
23 | serial0 = &uart1; |
24 | serial1 = &uart2; | |
25 | serial2 = &uart3; | |
26 | serial3 = &uart4; | |
27 | serial4 = &uart5; | |
6ed1a0e5 SH |
28 | spi0 = &spi1; |
29 | spi1 = &spi2; | |
30 | spi2 = &spi3; | |
5658a68f SH |
31 | usb0 = &usbotg; |
32 | usb1 = &usbhost1; | |
33 | }; | |
34 | ||
35 | asic: asic-interrupt-controller@68000000 { | |
36 | compatible = "fsl,imx25-asic", "fsl,avic"; | |
37 | interrupt-controller; | |
38 | #interrupt-cells = <1>; | |
39 | reg = <0x68000000 0x8000000>; | |
40 | }; | |
41 | ||
42 | clocks { | |
43 | #address-cells = <1>; | |
44 | #size-cells = <0>; | |
45 | ||
46 | osc { | |
47 | compatible = "fsl,imx-osc", "fixed-clock"; | |
48 | clock-frequency = <24000000>; | |
49 | }; | |
50 | }; | |
51 | ||
52 | soc { | |
53 | #address-cells = <1>; | |
54 | #size-cells = <1>; | |
55 | compatible = "simple-bus"; | |
56 | interrupt-parent = <&asic>; | |
57 | ranges; | |
58 | ||
59 | aips@43f00000 { /* AIPS1 */ | |
60 | compatible = "fsl,aips-bus", "simple-bus"; | |
61 | #address-cells = <1>; | |
62 | #size-cells = <1>; | |
63 | reg = <0x43f00000 0x100000>; | |
64 | ranges; | |
65 | ||
66 | i2c1: i2c@43f80000 { | |
67 | #address-cells = <1>; | |
68 | #size-cells = <0>; | |
69 | compatible = "fsl,imx25-i2c", "fsl,imx21-i2c"; | |
70 | reg = <0x43f80000 0x4000>; | |
71 | clocks = <&clks 48>; | |
72 | clock-names = ""; | |
73 | interrupts = <3>; | |
74 | status = "disabled"; | |
75 | }; | |
76 | ||
77 | i2c3: i2c@43f84000 { | |
78 | #address-cells = <1>; | |
79 | #size-cells = <0>; | |
80 | compatible = "fsl,imx25-i2c", "fsl,imx21-i2c"; | |
81 | reg = <0x43f84000 0x4000>; | |
82 | clocks = <&clks 48>; | |
83 | clock-names = ""; | |
84 | interrupts = <10>; | |
85 | status = "disabled"; | |
86 | }; | |
87 | ||
88 | can1: can@43f88000 { | |
89 | compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan"; | |
90 | reg = <0x43f88000 0x4000>; | |
91 | interrupts = <43>; | |
92 | clocks = <&clks 75>, <&clks 75>; | |
93 | clock-names = "ipg", "per"; | |
94 | status = "disabled"; | |
95 | }; | |
96 | ||
97 | can2: can@43f8c000 { | |
98 | compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan"; | |
99 | reg = <0x43f8c000 0x4000>; | |
100 | interrupts = <44>; | |
101 | clocks = <&clks 76>, <&clks 76>; | |
102 | clock-names = "ipg", "per"; | |
103 | status = "disabled"; | |
104 | }; | |
105 | ||
106 | uart1: serial@43f90000 { | |
107 | compatible = "fsl,imx25-uart", "fsl,imx21-uart"; | |
108 | reg = <0x43f90000 0x4000>; | |
109 | interrupts = <45>; | |
110 | clocks = <&clks 120>, <&clks 57>; | |
111 | clock-names = "ipg", "per"; | |
112 | status = "disabled"; | |
113 | }; | |
114 | ||
115 | uart2: serial@43f94000 { | |
116 | compatible = "fsl,imx25-uart", "fsl,imx21-uart"; | |
117 | reg = <0x43f94000 0x4000>; | |
118 | interrupts = <32>; | |
119 | clocks = <&clks 121>, <&clks 57>; | |
120 | clock-names = "ipg", "per"; | |
121 | status = "disabled"; | |
122 | }; | |
123 | ||
124 | i2c2: i2c@43f98000 { | |
125 | #address-cells = <1>; | |
126 | #size-cells = <0>; | |
127 | compatible = "fsl,imx25-i2c", "fsl,imx21-i2c"; | |
128 | reg = <0x43f98000 0x4000>; | |
129 | clocks = <&clks 48>; | |
130 | clock-names = ""; | |
131 | interrupts = <4>; | |
132 | status = "disabled"; | |
133 | }; | |
134 | ||
135 | owire@43f9c000 { | |
136 | #address-cells = <1>; | |
137 | #size-cells = <0>; | |
138 | reg = <0x43f9c000 0x4000>; | |
139 | clocks = <&clks 51>; | |
140 | clock-names = ""; | |
141 | interrupts = <2>; | |
142 | status = "disabled"; | |
143 | }; | |
144 | ||
145 | spi1: cspi@43fa4000 { | |
146 | #address-cells = <1>; | |
147 | #size-cells = <0>; | |
148 | compatible = "fsl,imx25-cspi", "fsl,imx35-cspi"; | |
149 | reg = <0x43fa4000 0x4000>; | |
37523dc5 JA |
150 | clocks = <&clks 62>, <&clks 62>; |
151 | clock-names = "ipg", "per"; | |
5658a68f SH |
152 | interrupts = <14>; |
153 | status = "disabled"; | |
154 | }; | |
155 | ||
156 | kpp@43fa8000 { | |
157 | #address-cells = <1>; | |
158 | #size-cells = <0>; | |
159 | reg = <0x43fa8000 0x4000>; | |
160 | clocks = <&clks 102>; | |
161 | clock-names = ""; | |
162 | interrupts = <24>; | |
163 | status = "disabled"; | |
164 | }; | |
165 | ||
166 | iomuxc@43fac000{ | |
167 | compatible = "fsl,imx25-iomuxc"; | |
168 | reg = <0x43fac000 0x4000>; | |
169 | }; | |
170 | ||
171 | audmux@43fb0000 { | |
172 | compatible = "fsl,imx25-audmux", "fsl,imx31-audmux"; | |
173 | reg = <0x43fb0000 0x4000>; | |
174 | status = "disabled"; | |
175 | }; | |
176 | }; | |
177 | ||
178 | spba@50000000 { | |
179 | compatible = "fsl,spba-bus", "simple-bus"; | |
180 | #address-cells = <1>; | |
181 | #size-cells = <1>; | |
182 | reg = <0x50000000 0x40000>; | |
183 | ranges; | |
184 | ||
185 | spi3: cspi@50004000 { | |
186 | #address-cells = <1>; | |
187 | #size-cells = <0>; | |
188 | compatible = "fsl,imx25-cspi", "fsl,imx35-cspi"; | |
189 | reg = <0x50004000 0x4000>; | |
190 | interrupts = <0>; | |
37523dc5 JA |
191 | clocks = <&clks 80>, <&clks 80>; |
192 | clock-names = "ipg", "per"; | |
5658a68f SH |
193 | status = "disabled"; |
194 | }; | |
195 | ||
196 | uart4: serial@50008000 { | |
197 | compatible = "fsl,imx25-uart", "fsl,imx21-uart"; | |
198 | reg = <0x50008000 0x4000>; | |
199 | interrupts = <5>; | |
200 | clocks = <&clks 123>, <&clks 57>; | |
201 | clock-names = "ipg", "per"; | |
202 | status = "disabled"; | |
203 | }; | |
204 | ||
205 | uart3: serial@5000c000 { | |
206 | compatible = "fsl,imx25-uart", "fsl,imx21-uart"; | |
207 | reg = <0x5000c000 0x4000>; | |
208 | interrupts = <18>; | |
209 | clocks = <&clks 122>, <&clks 57>; | |
210 | clock-names = "ipg", "per"; | |
211 | status = "disabled"; | |
212 | }; | |
213 | ||
214 | spi2: cspi@50010000 { | |
215 | #address-cells = <1>; | |
216 | #size-cells = <0>; | |
217 | compatible = "fsl,imx25-cspi", "fsl,imx35-cspi"; | |
218 | reg = <0x50010000 0x4000>; | |
37523dc5 JA |
219 | clocks = <&clks 79>, <&clks 79>; |
220 | clock-names = "ipg", "per"; | |
5658a68f SH |
221 | interrupts = <13>; |
222 | status = "disabled"; | |
223 | }; | |
224 | ||
225 | ssi2: ssi@50014000 { | |
226 | compatible = "fsl,imx25-ssi", "fsl,imx21-ssi"; | |
227 | reg = <0x50014000 0x4000>; | |
228 | interrupts = <11>; | |
229 | status = "disabled"; | |
230 | }; | |
231 | ||
232 | esai@50018000 { | |
233 | reg = <0x50018000 0x4000>; | |
234 | interrupts = <7>; | |
235 | }; | |
236 | ||
237 | uart5: serial@5002c000 { | |
238 | compatible = "fsl,imx25-uart", "fsl,imx21-uart"; | |
239 | reg = <0x5002c000 0x4000>; | |
240 | interrupts = <40>; | |
241 | clocks = <&clks 124>, <&clks 57>; | |
242 | clock-names = "ipg", "per"; | |
243 | status = "disabled"; | |
244 | }; | |
245 | ||
246 | tsc: tsc@50030000 { | |
247 | compatible = "fsl,imx25-adc", "fsl,imx21-tsc"; | |
248 | reg = <0x50030000 0x4000>; | |
249 | interrupts = <46>; | |
250 | clocks = <&clks 119>; | |
251 | clock-names = "ipg"; | |
252 | status = "disabled"; | |
253 | }; | |
254 | ||
255 | ssi1: ssi@50034000 { | |
256 | compatible = "fsl,imx25-ssi", "fsl,imx21-ssi"; | |
257 | reg = <0x50034000 0x4000>; | |
258 | interrupts = <12>; | |
259 | status = "disabled"; | |
260 | }; | |
261 | ||
262 | fec: ethernet@50038000 { | |
263 | compatible = "fsl,imx25-fec"; | |
264 | reg = <0x50038000 0x4000>; | |
265 | interrupts = <57>; | |
266 | clocks = <&clks 88>, <&clks 65>; | |
267 | clock-names = "ipg", "ahb"; | |
268 | status = "disabled"; | |
269 | }; | |
270 | }; | |
271 | ||
272 | aips@53f00000 { /* AIPS2 */ | |
273 | compatible = "fsl,aips-bus", "simple-bus"; | |
274 | #address-cells = <1>; | |
275 | #size-cells = <1>; | |
276 | reg = <0x53f00000 0x100000>; | |
277 | ranges; | |
278 | ||
279 | clks: ccm@53f80000 { | |
280 | compatible = "fsl,imx25-ccm"; | |
281 | reg = <0x53f80000 0x4000>; | |
282 | interrupts = <31>; | |
283 | #clock-cells = <1>; | |
284 | }; | |
285 | ||
286 | gpt4: timer@53f84000 { | |
287 | compatible = "fsl,imx25-gpt", "fsl,imx31-gpt"; | |
288 | reg = <0x53f84000 0x4000>; | |
289 | clocks = <&clks 9>, <&clks 45>; | |
290 | clock-names = "ipg", "per"; | |
291 | interrupts = <1>; | |
292 | }; | |
293 | ||
294 | gpt3: timer@53f88000 { | |
295 | compatible = "fsl,imx25-gpt", "fsl,imx31-gpt"; | |
296 | reg = <0x53f88000 0x4000>; | |
297 | clocks = <&clks 9>, <&clks 47>; | |
298 | clock-names = "ipg", "per"; | |
299 | interrupts = <29>; | |
300 | }; | |
301 | ||
302 | gpt2: timer@53f8c000 { | |
303 | compatible = "fsl,imx25-gpt", "fsl,imx31-gpt"; | |
304 | reg = <0x53f8c000 0x4000>; | |
305 | clocks = <&clks 9>, <&clks 47>; | |
306 | clock-names = "ipg", "per"; | |
307 | interrupts = <53>; | |
308 | }; | |
309 | ||
310 | gpt1: timer@53f90000 { | |
311 | compatible = "fsl,imx25-gpt", "fsl,imx31-gpt"; | |
312 | reg = <0x53f90000 0x4000>; | |
313 | clocks = <&clks 9>, <&clks 47>; | |
314 | clock-names = "ipg", "per"; | |
315 | interrupts = <54>; | |
316 | }; | |
317 | ||
318 | epit1: timer@53f94000 { | |
319 | compatible = "fsl,imx25-epit"; | |
320 | reg = <0x53f94000 0x4000>; | |
321 | interrupts = <28>; | |
322 | }; | |
323 | ||
324 | epit2: timer@53f98000 { | |
325 | compatible = "fsl,imx25-epit"; | |
326 | reg = <0x53f98000 0x4000>; | |
327 | interrupts = <27>; | |
328 | }; | |
329 | ||
330 | gpio4: gpio@53f9c000 { | |
331 | compatible = "fsl,imx25-gpio", "fsl,imx35-gpio"; | |
332 | reg = <0x53f9c000 0x4000>; | |
333 | interrupts = <23>; | |
334 | gpio-controller; | |
335 | #gpio-cells = <2>; | |
336 | interrupt-controller; | |
337 | #interrupt-cells = <2>; | |
338 | }; | |
339 | ||
340 | pwm2: pwm@53fa0000 { | |
341 | compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; | |
342 | #pwm-cells = <2>; | |
343 | reg = <0x53fa0000 0x4000>; | |
344 | clocks = <&clks 106>, <&clks 36>; | |
345 | clock-names = "ipg", "per"; | |
346 | interrupts = <36>; | |
347 | }; | |
348 | ||
349 | gpio3: gpio@53fa4000 { | |
350 | compatible = "fsl,imx25-gpio", "fsl,imx35-gpio"; | |
351 | reg = <0x53fa4000 0x4000>; | |
352 | interrupts = <16>; | |
353 | gpio-controller; | |
354 | #gpio-cells = <2>; | |
355 | interrupt-controller; | |
356 | #interrupt-cells = <2>; | |
357 | }; | |
358 | ||
359 | pwm3: pwm@53fa8000 { | |
360 | compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; | |
361 | #pwm-cells = <2>; | |
362 | reg = <0x53fa8000 0x4000>; | |
363 | clocks = <&clks 107>, <&clks 36>; | |
364 | clock-names = "ipg", "per"; | |
365 | interrupts = <41>; | |
366 | }; | |
367 | ||
368 | esdhc1: esdhc@53fb4000 { | |
369 | compatible = "fsl,imx25-esdhc"; | |
370 | reg = <0x53fb4000 0x4000>; | |
371 | interrupts = <9>; | |
372 | clocks = <&clks 86>, <&clks 63>, <&clks 45>; | |
373 | clock-names = "ipg", "ahb", "per"; | |
374 | status = "disabled"; | |
375 | }; | |
376 | ||
377 | esdhc2: esdhc@53fb8000 { | |
378 | compatible = "fsl,imx25-esdhc"; | |
379 | reg = <0x53fb8000 0x4000>; | |
380 | interrupts = <8>; | |
381 | clocks = <&clks 87>, <&clks 64>, <&clks 46>; | |
382 | clock-names = "ipg", "ahb", "per"; | |
383 | status = "disabled"; | |
384 | }; | |
385 | ||
386 | lcdc@53fbc000 { | |
387 | reg = <0x53fbc000 0x4000>; | |
388 | interrupts = <39>; | |
389 | clocks = <&clks 103>, <&clks 66>, <&clks 49>; | |
390 | clock-names = "ipg", "ahb", "per"; | |
391 | status = "disabled"; | |
392 | }; | |
393 | ||
394 | slcdc@53fc0000 { | |
395 | reg = <0x53fc0000 0x4000>; | |
396 | interrupts = <38>; | |
397 | status = "disabled"; | |
398 | }; | |
399 | ||
400 | pwm4: pwm@53fc8000 { | |
401 | compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; | |
402 | reg = <0x53fc8000 0x4000>; | |
403 | clocks = <&clks 108>, <&clks 36>; | |
404 | clock-names = "ipg", "per"; | |
405 | interrupts = <42>; | |
406 | }; | |
407 | ||
408 | gpio1: gpio@53fcc000 { | |
409 | compatible = "fsl,imx25-gpio", "fsl,imx35-gpio"; | |
410 | reg = <0x53fcc000 0x4000>; | |
411 | interrupts = <52>; | |
412 | gpio-controller; | |
413 | #gpio-cells = <2>; | |
414 | interrupt-controller; | |
415 | #interrupt-cells = <2>; | |
416 | }; | |
417 | ||
418 | gpio2: gpio@53fd0000 { | |
419 | compatible = "fsl,imx25-gpio", "fsl,imx35-gpio"; | |
420 | reg = <0x53fd0000 0x4000>; | |
421 | interrupts = <51>; | |
422 | gpio-controller; | |
423 | #gpio-cells = <2>; | |
424 | interrupt-controller; | |
425 | #interrupt-cells = <2>; | |
426 | }; | |
427 | ||
428 | sdma@53fd4000 { | |
429 | compatible = "fsl,imx25-sdma", "fsl,imx35-sdma"; | |
430 | reg = <0x53fd4000 0x4000>; | |
431 | clocks = <&clks 112>, <&clks 68>; | |
432 | clock-names = "ipg", "ahb"; | |
433 | interrupts = <34>; | |
434 | }; | |
435 | ||
436 | wdog@53fdc000 { | |
437 | compatible = "fsl,imx25-wdt", "fsl,imx21-wdt"; | |
438 | reg = <0x53fdc000 0x4000>; | |
439 | clocks = <&clks 126>; | |
440 | clock-names = ""; | |
441 | interrupts = <55>; | |
442 | }; | |
443 | ||
444 | pwm1: pwm@53fe0000 { | |
445 | compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; | |
446 | #pwm-cells = <2>; | |
447 | reg = <0x53fe0000 0x4000>; | |
448 | clocks = <&clks 105>, <&clks 36>; | |
449 | clock-names = "ipg", "per"; | |
450 | interrupts = <26>; | |
451 | }; | |
452 | ||
684f6a23 SH |
453 | iim: iim@53ff0000 { |
454 | compatible = "fsl,imx25-iim", "fsl,imx27-iim"; | |
455 | reg = <0x53ff0000 0x4000>; | |
456 | interrupts = <19>; | |
457 | clocks = <&clks 99>; | |
458 | }; | |
459 | ||
5658a68f SH |
460 | usbphy1: usbphy@1 { |
461 | compatible = "nop-usbphy"; | |
462 | status = "disabled"; | |
463 | }; | |
464 | ||
465 | usbphy2: usbphy@2 { | |
466 | compatible = "nop-usbphy"; | |
467 | status = "disabled"; | |
468 | }; | |
469 | ||
470 | usbotg: usb@53ff4000 { | |
471 | compatible = "fsl,imx25-usb", "fsl,imx27-usb"; | |
472 | reg = <0x53ff4000 0x0200>; | |
473 | interrupts = <37>; | |
474 | clocks = <&clks 9>, <&clks 70>, <&clks 8>; | |
475 | clock-names = "ipg", "ahb", "per"; | |
476 | fsl,usbmisc = <&usbmisc 0>; | |
477 | status = "disabled"; | |
478 | }; | |
479 | ||
480 | usbhost1: usb@53ff4400 { | |
481 | compatible = "fsl,imx25-usb", "fsl,imx27-usb"; | |
482 | reg = <0x53ff4400 0x0200>; | |
483 | interrupts = <35>; | |
484 | clocks = <&clks 9>, <&clks 70>, <&clks 8>; | |
485 | clock-names = "ipg", "ahb", "per"; | |
486 | fsl,usbmisc = <&usbmisc 1>; | |
487 | status = "disabled"; | |
488 | }; | |
489 | ||
490 | usbmisc: usbmisc@53ff4600 { | |
491 | #index-cells = <1>; | |
492 | compatible = "fsl,imx25-usbmisc"; | |
493 | clocks = <&clks 9>, <&clks 70>, <&clks 8>; | |
494 | clock-names = "ipg", "ahb", "per"; | |
495 | reg = <0x53ff4600 0x00f>; | |
496 | status = "disabled"; | |
497 | }; | |
498 | ||
499 | dryice@53ffc000 { | |
500 | compatible = "fsl,imx25-dryice", "fsl,imx25-rtc"; | |
501 | reg = <0x53ffc000 0x4000>; | |
502 | clocks = <&clks 81>; | |
503 | clock-names = "ipg"; | |
504 | interrupts = <25>; | |
505 | }; | |
506 | }; | |
507 | ||
508 | emi@80000000 { | |
509 | compatible = "fsl,emi-bus", "simple-bus"; | |
510 | #address-cells = <1>; | |
511 | #size-cells = <1>; | |
512 | reg = <0x80000000 0x3b002000>; | |
513 | ranges; | |
514 | ||
be4ccfce | 515 | nfc: nand@bb000000 { |
5658a68f SH |
516 | #address-cells = <1>; |
517 | #size-cells = <1>; | |
518 | ||
519 | compatible = "fsl,imx25-nand"; | |
520 | reg = <0xbb000000 0x2000>; | |
521 | clocks = <&clks 50>; | |
522 | clock-names = ""; | |
523 | interrupts = <33>; | |
524 | status = "disabled"; | |
525 | }; | |
526 | }; | |
527 | }; | |
528 | }; |