[mirror_ubuntu-focal-kernel.git] / arch / arm / boot / dts / imx25.dtsi

// SPDX-License-Identifier: GPL-2.0+
//
// Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>

#include <dt-bindings/gpio/gpio.h>
#include "imx25-pinfunc.h"

/ {
	#address-cells = <1>;
	#size-cells = <1>;
	/*
	 * The decompressor and also some bootloaders rely on a
	 * pre-existing /chosen node to be available to insert the
	 * command line and merge other ATAGS info.
	 * Also for U-Boot there must be a pre-existing /memory node.
	 */
	chosen {};
	memory { device_type = "memory"; };

	aliases {
		ethernet0 = &fec;
		gpio0 = &gpio1;
		gpio1 = &gpio2;
		gpio2 = &gpio3;
		gpio3 = &gpio4;
		i2c0 = &i2c1;
		i2c1 = &i2c2;
		i2c2 = &i2c3;
		mmc0 = &esdhc1;
		mmc1 = &esdhc2;
		pwm0 = &pwm1;
		pwm1 = &pwm2;
		pwm2 = &pwm3;
		pwm3 = &pwm4;
		serial0 = &uart1;
		serial1 = &uart2;
		serial2 = &uart3;
		serial3 = &uart4;
		serial4 = &uart5;
		spi0 = &spi1;
		spi1 = &spi2;
		spi2 = &spi3;
		usb0 = &usbotg;
		usb1 = &usbhost1;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			compatible = "arm,arm926ej-s";
			device_type = "cpu";
			reg = <0>;
		};
	};

	asic: asic-interrupt-controller@68000000 {
		compatible = "fsl,imx25-asic", "fsl,avic";
		interrupt-controller;
		#interrupt-cells = <1>;
		reg = <0x68000000 0x8000000>;
	};

	clocks {
		osc {
			compatible = "fsl,imx-osc", "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <24000000>;
		};
	};

	soc {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "simple-bus";
		interrupt-parent = <&asic>;
		ranges;

		aips@43f00000 { /* AIPS1 */
			compatible = "fsl,aips-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x43f00000 0x100000>;
			ranges;

			aips1: bridge@43f00000 {
				compatible = "fsl,imx25-aips";
				reg = <0x43f00000 0x4000>;
			};

			i2c1: i2c@43f80000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
				reg = <0x43f80000 0x4000>;
				clocks = <&clks 48>;
				clock-names = "";
				interrupts = <3>;
				status = "disabled";
			};

			i2c3: i2c@43f84000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
				reg = <0x43f84000 0x4000>;
				clocks = <&clks 48>;
				clock-names = "";
				interrupts = <10>;
				status = "disabled";
			};

			can1: can@43f88000 {
				compatible = "fsl,imx25-flexcan";
				reg = <0x43f88000 0x4000>;
				interrupts = <43>;
				clocks = <&clks 75>, <&clks 75>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			can2: can@43f8c000 {
				compatible = "fsl,imx25-flexcan";
				reg = <0x43f8c000 0x4000>;
				interrupts = <44>;
				clocks = <&clks 76>, <&clks 76>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			uart1: serial@43f90000 {
				compatible = "fsl,imx25-uart", "fsl,imx21-uart";
				reg = <0x43f90000 0x4000>;
				interrupts = <45>;
				clocks = <&clks 120>, <&clks 57>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			uart2: serial@43f94000 {
				compatible = "fsl,imx25-uart", "fsl,imx21-uart";
				reg = <0x43f94000 0x4000>;
				interrupts = <32>;
				clocks = <&clks 121>, <&clks 57>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			i2c2: i2c@43f98000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
				reg = <0x43f98000 0x4000>;
				clocks = <&clks 48>;
				clock-names = "";
				interrupts = <4>;
				status = "disabled";
			};

			owire@43f9c000 {
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <0x43f9c000 0x4000>;
				clocks = <&clks 51>;
				clock-names = "";
				interrupts = <2>;
				status = "disabled";
			};

			spi1: spi@43fa4000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
				reg = <0x43fa4000 0x4000>;
				clocks = <&clks 78>, <&clks 78>;
				clock-names = "ipg", "per";
				interrupts = <14>;
				status = "disabled";
			};

			kpp: kpp@43fa8000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx25-kpp", "fsl,imx21-kpp";
				reg = <0x43fa8000 0x4000>;
				clocks = <&clks 102>;
				clock-names = "";
				interrupts = <24>;
				status = "disabled";
			};

			iomuxc: iomuxc@43fac000 {
				compatible = "fsl,imx25-iomuxc";
				reg = <0x43fac000 0x4000>;
			};

			audmux: audmux@43fb0000 {
				compatible = "fsl,imx25-audmux", "fsl,imx31-audmux";
				reg = <0x43fb0000 0x4000>;
				status = "disabled";
			};
		};

		spba@50000000 {
			compatible = "fsl,spba-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x50000000 0x40000>;
			ranges;

			spi3: spi@50004000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
				reg = <0x50004000 0x4000>;
				interrupts = <0>;
				clocks = <&clks 80>, <&clks 80>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			uart4: serial@50008000 {
				compatible = "fsl,imx25-uart", "fsl,imx21-uart";
				reg = <0x50008000 0x4000>;
				interrupts = <5>;
				clocks = <&clks 123>, <&clks 57>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			uart3: serial@5000c000 {
				compatible = "fsl,imx25-uart", "fsl,imx21-uart";
				reg = <0x5000c000 0x4000>;
				interrupts = <18>;
				clocks = <&clks 122>, <&clks 57>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			spi2: spi@50010000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
				reg = <0x50010000 0x4000>;
				clocks = <&clks 79>, <&clks 79>;
				clock-names = "ipg", "per";
				interrupts = <13>;
				status = "disabled";
			};

			ssi2: ssi@50014000 {
				#sound-dai-cells = <0>;
				compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
				reg = <0x50014000 0x4000>;
				interrupts = <11>;
				clocks = <&clks 118>;
				clock-names = "ipg";
				dmas = <&sdma 24 1 0>,
				       <&sdma 25 1 0>;
				dma-names = "rx", "tx";
				fsl,fifo-depth = <15>;
				status = "disabled";
			};

			esai@50018000 {
				reg = <0x50018000 0x4000>;
				interrupts = <7>;
			};

			uart5: serial@5002c000 {
				compatible = "fsl,imx25-uart", "fsl,imx21-uart";
				reg = <0x5002c000 0x4000>;
				interrupts = <40>;
				clocks = <&clks 124>, <&clks 57>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			tscadc: tscadc@50030000 {
				compatible = "fsl,imx25-tsadc";
				reg = <0x50030000 0xc>;
				interrupts = <46>;
				clocks = <&clks 119>;
				clock-names = "ipg";
				interrupt-controller;
				#interrupt-cells = <1>;
				#address-cells = <1>;
				#size-cells = <1>;
				status = "disabled";
				ranges;

				adc: adc@50030800 {
					compatible = "fsl,imx25-gcq";
					reg = <0x50030800 0x60>;
					interrupt-parent = <&tscadc>;
					interrupts = <1>;
					#address-cells = <1>;
					#size-cells = <0>;
					status = "disabled";
				};

				tsc: tcq@50030400 {
					compatible = "fsl,imx25-tcq";
					reg = <0x50030400 0x60>;
					interrupt-parent = <&tscadc>;
					interrupts = <0>;
					fsl,wires = <4>;
					status = "disabled";
				};
			};

			ssi1: ssi@50034000 {
				#sound-dai-cells = <0>;
				compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
				reg = <0x50034000 0x4000>;
				interrupts = <12>;
				clocks = <&clks 117>;
				clock-names = "ipg";
				dmas = <&sdma 28 1 0>,
				       <&sdma 29 1 0>;
				dma-names = "rx", "tx";
				fsl,fifo-depth = <15>;
				status = "disabled";
			};

			fec: ethernet@50038000 {
				compatible = "fsl,imx25-fec";
				reg = <0x50038000 0x4000>;
				interrupts = <57>;
				clocks = <&clks 88>, <&clks 65>;
				clock-names = "ipg", "ahb";
				status = "disabled";
			};
		};

		aips@53f00000 { /* AIPS2 */
			compatible = "fsl,aips-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x53f00000 0x100000>;
			ranges;

			aips2: bridge@53f00000 {
				compatible = "fsl,imx25-aips";
				reg = <0x53f00000 0x4000>;
			};

			clks: ccm@53f80000 {
				compatible = "fsl,imx25-ccm";
				reg = <0x53f80000 0x4000>;
				interrupts = <31>;
				#clock-cells = <1>;
			};

			gpt4: timer@53f84000 {
				compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
				reg = <0x53f84000 0x4000>;
				clocks = <&clks 95>, <&clks 47>;
				clock-names = "ipg", "per";
				interrupts = <1>;
			};

			gpt3: timer@53f88000 {
				compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
				reg = <0x53f88000 0x4000>;
				clocks = <&clks 94>, <&clks 47>;
				clock-names = "ipg", "per";
				interrupts = <29>;
			};

			gpt2: timer@53f8c000 {
				compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
				reg = <0x53f8c000 0x4000>;
				clocks = <&clks 93>, <&clks 47>;
				clock-names = "ipg", "per";
				interrupts = <53>;
			};

			gpt1: timer@53f90000 {
				compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
				reg = <0x53f90000 0x4000>;
				clocks = <&clks 92>, <&clks 47>;
				clock-names = "ipg", "per";
				interrupts = <54>;
			};

			epit1: timer@53f94000 {
				compatible = "fsl,imx25-epit";
				reg = <0x53f94000 0x4000>;
				interrupts = <28>;
			};

			epit2: timer@53f98000 {
				compatible = "fsl,imx25-epit";
				reg = <0x53f98000 0x4000>;
				interrupts = <27>;
			};

			gpio4: gpio@53f9c000 {
				compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
				reg = <0x53f9c000 0x4000>;
				interrupts = <23>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
			};

			pwm2: pwm@53fa0000 {
				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
				#pwm-cells = <2>;
				reg = <0x53fa0000 0x4000>;
				clocks = <&clks 106>, <&clks 52>;
				clock-names = "ipg", "per";
				interrupts = <36>;
			};

			gpio3: gpio@53fa4000 {
				compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
				reg = <0x53fa4000 0x4000>;
				interrupts = <16>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
			};

			pwm3: pwm@53fa8000 {
				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
				#pwm-cells = <2>;
				reg = <0x53fa8000 0x4000>;
				clocks = <&clks 107>, <&clks 52>;
				clock-names = "ipg", "per";
				interrupts = <41>;
			};

			scc: crypto@53fac000 {
				compatible = "fsl,imx25-scc";
				reg = <0x53fac000 0x4000>;
				clocks = <&clks 111>;
				clock-names = "ipg";
				interrupts = <49>, <50>;
				interrupt-names = "scm", "smn";
			};

			rngb: rngb@53fb0000 {
				compatible = "fsl,imx25-rngb";
				reg = <0x53fb0000 0x4000>;
				clocks = <&clks 109>;
				interrupts = <22>;
			};

			esdhc1: esdhc@53fb4000 {
				compatible = "fsl,imx25-esdhc";
				reg = <0x53fb4000 0x4000>;
				interrupts = <9>;
				clocks = <&clks 86>, <&clks 63>, <&clks 45>;
				clock-names = "ipg", "ahb", "per";
				status = "disabled";
			};

			esdhc2: esdhc@53fb8000 {
				compatible = "fsl,imx25-esdhc";
				reg = <0x53fb8000 0x4000>;
				interrupts = <8>;
				clocks = <&clks 87>, <&clks 64>, <&clks 46>;
				clock-names = "ipg", "ahb", "per";
				status = "disabled";
			};

			lcdc: lcdc@53fbc000 {
				compatible = "fsl,imx25-fb", "fsl,imx21-fb";
				reg = <0x53fbc000 0x4000>;
				interrupts = <39>;
				clocks = <&clks 103>, <&clks 66>, <&clks 49>;
				clock-names = "ipg", "ahb", "per";
				status = "disabled";
			};

			slcdc@53fc0000 {
				reg = <0x53fc0000 0x4000>;
				interrupts = <38>;
				status = "disabled";
			};

			pwm4: pwm@53fc8000 {
				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
				#pwm-cells = <2>;
				reg = <0x53fc8000 0x4000>;
				clocks = <&clks 108>, <&clks 52>;
				clock-names = "ipg", "per";
				interrupts = <42>;
			};

			gpio1: gpio@53fcc000 {
				compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
				reg = <0x53fcc000 0x4000>;
				interrupts = <52>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
			};

			gpio2: gpio@53fd0000 {
				compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
				reg = <0x53fd0000 0x4000>;
				interrupts = <51>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
			};

			sdma: sdma@53fd4000 {
				compatible = "fsl,imx25-sdma";
				reg = <0x53fd4000 0x4000>;
				clocks = <&clks 112>, <&clks 68>;
				clock-names = "ipg", "ahb";
				#dma-cells = <3>;
				interrupts = <34>;
				fsl,sdma-ram-script-name = "imx/sdma/sdma-imx25.bin";
			};

			wdog@53fdc000 {
				compatible = "fsl,imx25-wdt", "fsl,imx21-wdt";
				reg = <0x53fdc000 0x4000>;
				clocks = <&clks 126>;
				clock-names = "";
				interrupts = <55>;
			};

			pwm1: pwm@53fe0000 {
				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
				#pwm-cells = <2>;
				reg = <0x53fe0000 0x4000>;
				clocks = <&clks 105>, <&clks 52>;
				clock-names = "ipg", "per";
				interrupts = <26>;
			};

			iim: iim@53ff0000 {
				compatible = "fsl,imx25-iim", "fsl,imx27-iim";
				reg = <0x53ff0000 0x4000>;
				interrupts = <19>;
				clocks = <&clks 99>;
			};

			usbotg: usb@53ff4000 {
				compatible = "fsl,imx25-usb", "fsl,imx27-usb";
				reg = <0x53ff4000 0x0200>;
				interrupts = <37>;
				clocks = <&clks 9>, <&clks 70>, <&clks 8>;
				clock-names = "ipg", "ahb", "per";
				fsl,usbmisc = <&usbmisc 0>;
				fsl,usbphy = <&usbphy0>;
				phy_type = "utmi";
				dr_mode = "otg";
				status = "disabled";
			};

			usbhost1: usb@53ff4400 {
				compatible = "fsl,imx25-usb", "fsl,imx27-usb";
				reg = <0x53ff4400 0x0200>;
				interrupts = <35>;
				clocks = <&clks 9>, <&clks 70>, <&clks 8>;
				clock-names = "ipg", "ahb", "per";
				fsl,usbmisc = <&usbmisc 1>;
				fsl,usbphy = <&usbphy1>;
				status = "disabled";
			};

			usbmisc: usbmisc@53ff4600 {
				#index-cells = <1>;
				compatible = "fsl,imx25-usbmisc";
				reg = <0x53ff4600 0x00f>;
			};

			dryice@53ffc000 {
				compatible = "fsl,imx25-dryice", "fsl,imx25-rtc";
				reg = <0x53ffc000 0x4000>;
				clocks = <&clks 81>;
				clock-names = "ipg";
				interrupts = <25 56>;
			};
		};

		iram: sram@78000000 {
			compatible = "mmio-sram";
			reg = <0x78000000 0x20000>;
		};

		emi@80000000 {
			compatible = "fsl,emi-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x80000000 0x3b002000>;
			ranges;

			nfc: nand@bb000000 {
				#address-cells = <1>;
				#size-cells = <1>;

				compatible = "fsl,imx25-nand";
				reg = <0xbb000000 0x2000>;
				clocks = <&clks 50>;
				clock-names = "";
				interrupts = <33>;
				status = "disabled";
			};
		};
	};

	usbphy {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		usbphy0: usb-phy@0 {
			reg = <0>;
			compatible = "usb-nop-xceiv";
			#phy-cells = <0>;
		};

		usbphy1: usb-phy@1 {
			reg = <1>;
			compatible = "usb-nop-xceiv";
			#phy-cells = <0>;
		};
	};
};
Commit	Line	Data
241f76b2 FE	1	// SPDX-License-Identifier: GPL-2.0+
	2	//
	3	// Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
5658a68f	4
12de44f5	5	#include <dt-bindings/gpio/gpio.h>
f4db4bc5	6	#include "imx25-pinfunc.h"
5658a68f SH	7
5658a68f SH	8	/ {
7f107887 FE	9	#address-cells = <1>;
7f107887 FE	10	#size-cells = <1>;
a971c554 FE	11	/*
	12	* The decompressor and also some bootloaders rely on a
	13	* pre-existing /chosen node to be available to insert the
	14	* command line and merge other ATAGS info.
	15	* Also for U-Boot there must be a pre-existing /memory node.
	16	*/
	17	chosen {};
7f08e6aa	18	memory { device_type = "memory"; };
7f107887	19
5658a68f	20	aliases {
22970070	21	ethernet0 = &fec;
6ed1a0e5 SH	22	gpio0 = &gpio1;
	23	gpio1 = &gpio2;
	24	gpio2 = &gpio3;
	25	gpio3 = &gpio4;
	26	i2c0 = &i2c1;
	27	i2c1 = &i2c2;
	28	i2c2 = &i2c3;
9e3a424b SH	29	mmc0 = &esdhc1;
9e3a424b SH	30	mmc1 = &esdhc2;
70f97128 MKB	31	pwm0 = &pwm1;
	32	pwm1 = &pwm2;
	33	pwm2 = &pwm3;
	34	pwm3 = &pwm4;
5658a68f SH	35	serial0 = &uart1;
	36	serial1 = &uart2;
	37	serial2 = &uart3;
	38	serial3 = &uart4;
	39	serial4 = &uart5;
6ed1a0e5 SH	40	spi0 = &spi1;
	41	spi1 = &spi2;
	42	spi2 = &spi3;
5658a68f SH	43	usb0 = &usbotg;
	44	usb1 = &usbhost1;
	45	};
	46
070bd7e4	47	cpus {
d447dd88	48	#address-cells = <1>;
070bd7e4 FE	49	#size-cells = <0>;
070bd7e4 FE	50
d447dd88	51	cpu@0 {
070bd7e4 FE	52	compatible = "arm,arm926ej-s";
070bd7e4 FE	53	device_type = "cpu";
d447dd88	54	reg = <0>;
070bd7e4 FE	55	};
	56	};
	57
5658a68f SH	58	asic: asic-interrupt-controller@68000000 {
	59	compatible = "fsl,imx25-asic", "fsl,avic";
	60	interrupt-controller;
	61	#interrupt-cells = <1>;
	62	reg = <0x68000000 0x8000000>;
	63	};
	64
	65	clocks {
5658a68f SH	66	osc {
5658a68f SH	67	compatible = "fsl,imx-osc", "fixed-clock";
4b2b4043	68	#clock-cells = <0>;
5658a68f SH	69	clock-frequency = <24000000>;
	70	};
	71	};
	72
	73	soc {
	74	#address-cells = <1>;
	75	#size-cells = <1>;
	76	compatible = "simple-bus";
	77	interrupt-parent = <&asic>;
	78	ranges;
	79
	80	aips@43f00000 { /* AIPS1 */
	81	compatible = "fsl,aips-bus", "simple-bus";
	82	#address-cells = <1>;
	83	#size-cells = <1>;
	84	reg = <0x43f00000 0x100000>;
	85	ranges;
	86
c33576cb MK	87	aips1: bridge@43f00000 {
	88	compatible = "fsl,imx25-aips";
	89	reg = <0x43f00000 0x4000>;
	90	};
	91
5658a68f SH	92	i2c1: i2c@43f80000 {
	93	#address-cells = <1>;
	94	#size-cells = <0>;
	95	compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
	96	reg = <0x43f80000 0x4000>;
	97	clocks = <&clks 48>;
	98	clock-names = "";
	99	interrupts = <3>;
	100	status = "disabled";
	101	};
	102
	103	i2c3: i2c@43f84000 {
	104	#address-cells = <1>;
	105	#size-cells = <0>;
	106	compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
	107	reg = <0x43f84000 0x4000>;
	108	clocks = <&clks 48>;
	109	clock-names = "";
	110	interrupts = <10>;
	111	status = "disabled";
	112	};
	113
	114	can1: can@43f88000 {
d50f4630	115	compatible = "fsl,imx25-flexcan";
5658a68f SH	116	reg = <0x43f88000 0x4000>;
	117	interrupts = <43>;
	118	clocks = <&clks 75>, <&clks 75>;
	119	clock-names = "ipg", "per";
	120	status = "disabled";
	121	};
	122
	123	can2: can@43f8c000 {
d50f4630	124	compatible = "fsl,imx25-flexcan";
5658a68f SH	125	reg = <0x43f8c000 0x4000>;
	126	interrupts = <44>;
	127	clocks = <&clks 76>, <&clks 76>;
	128	clock-names = "ipg", "per";
	129	status = "disabled";
	130	};
	131
	132	uart1: serial@43f90000 {
	133	compatible = "fsl,imx25-uart", "fsl,imx21-uart";
	134	reg = <0x43f90000 0x4000>;
	135	interrupts = <45>;
	136	clocks = <&clks 120>, <&clks 57>;
	137	clock-names = "ipg", "per";
	138	status = "disabled";
	139	};
	140
	141	uart2: serial@43f94000 {
	142	compatible = "fsl,imx25-uart", "fsl,imx21-uart";
	143	reg = <0x43f94000 0x4000>;
	144	interrupts = <32>;
	145	clocks = <&clks 121>, <&clks 57>;
	146	clock-names = "ipg", "per";
	147	status = "disabled";
	148	};
	149
	150	i2c2: i2c@43f98000 {
	151	#address-cells = <1>;
	152	#size-cells = <0>;
	153	compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
	154	reg = <0x43f98000 0x4000>;
	155	clocks = <&clks 48>;
	156	clock-names = "";
	157	interrupts = <4>;
	158	status = "disabled";
	159	};
	160
	161	owire@43f9c000 {
	162	#address-cells = <1>;
	163	#size-cells = <0>;
	164	reg = <0x43f9c000 0x4000>;
	165	clocks = <&clks 51>;
	166	clock-names = "";
	167	interrupts = <2>;
	168	status = "disabled";
	169	};
	170
5a2ecf0d	171	spi1: spi@43fa4000 {
5658a68f SH	172	#address-cells = <1>;
	173	#size-cells = <0>;
	174	compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
	175	reg = <0x43fa4000 0x4000>;
7a87e9cb	176	clocks = <&clks 78>, <&clks 78>;
37523dc5	177	clock-names = "ipg", "per";
5658a68f SH	178	interrupts = <14>;
	179	status = "disabled";
	180	};
	181
9223dd87	182	kpp: kpp@43fa8000 {
5658a68f SH	183	#address-cells = <1>;
5658a68f SH	184	#size-cells = <0>;
9223dd87	185	compatible = "fsl,imx25-kpp", "fsl,imx21-kpp";
5658a68f SH	186	reg = <0x43fa8000 0x4000>;
	187	clocks = <&clks 102>;
	188	clock-names = "";
	189	interrupts = <24>;
	190	status = "disabled";
	191	};
	192
53110aa0	193	iomuxc: iomuxc@43fac000 {
5658a68f SH	194	compatible = "fsl,imx25-iomuxc";
	195	reg = <0x43fac000 0x4000>;
	196	};
	197
ec2ea8c1	198	audmux: audmux@43fb0000 {
5658a68f SH	199	compatible = "fsl,imx25-audmux", "fsl,imx31-audmux";
	200	reg = <0x43fb0000 0x4000>;
	201	status = "disabled";
	202	};
	203	};
	204
	205	spba@50000000 {
	206	compatible = "fsl,spba-bus", "simple-bus";
	207	#address-cells = <1>;
	208	#size-cells = <1>;
	209	reg = <0x50000000 0x40000>;
	210	ranges;
	211
5a2ecf0d	212	spi3: spi@50004000 {
5658a68f SH	213	#address-cells = <1>;
	214	#size-cells = <0>;
	215	compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
	216	reg = <0x50004000 0x4000>;
	217	interrupts = <0>;
37523dc5 JA	218	clocks = <&clks 80>, <&clks 80>;
37523dc5 JA	219	clock-names = "ipg", "per";
5658a68f SH	220	status = "disabled";
	221	};
	222
	223	uart4: serial@50008000 {
	224	compatible = "fsl,imx25-uart", "fsl,imx21-uart";
	225	reg = <0x50008000 0x4000>;
	226	interrupts = <5>;
	227	clocks = <&clks 123>, <&clks 57>;
	228	clock-names = "ipg", "per";
	229	status = "disabled";
	230	};
	231
	232	uart3: serial@5000c000 {
	233	compatible = "fsl,imx25-uart", "fsl,imx21-uart";
	234	reg = <0x5000c000 0x4000>;
	235	interrupts = <18>;
	236	clocks = <&clks 122>, <&clks 57>;
	237	clock-names = "ipg", "per";
	238	status = "disabled";
	239	};
	240
5a2ecf0d	241	spi2: spi@50010000 {
5658a68f SH	242	#address-cells = <1>;
	243	#size-cells = <0>;
	244	compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
	245	reg = <0x50010000 0x4000>;
37523dc5 JA	246	clocks = <&clks 79>, <&clks 79>;
37523dc5 JA	247	clock-names = "ipg", "per";
5658a68f SH	248	interrupts = <13>;
	249	status = "disabled";
	250	};
	251
	252	ssi2: ssi@50014000 {
6ff7f51e	253	#sound-dai-cells = <0>;
5658a68f SH	254	compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
	255	reg = <0x50014000 0x4000>;
	256	interrupts = <11>;
7803c620 DC	257	clocks = <&clks 118>;
	258	clock-names = "ipg";
	259	dmas = <&sdma 24 1 0>,
	260	<&sdma 25 1 0>;
	261	dma-names = "rx", "tx";
f4be9b77	262	fsl,fifo-depth = <15>;
5658a68f SH	263	status = "disabled";
	264	};
	265
	266	esai@50018000 {
	267	reg = <0x50018000 0x4000>;
	268	interrupts = <7>;
	269	};
	270
	271	uart5: serial@5002c000 {
	272	compatible = "fsl,imx25-uart", "fsl,imx21-uart";
	273	reg = <0x5002c000 0x4000>;
	274	interrupts = <40>;
	275	clocks = <&clks 124>, <&clks 57>;
	276	clock-names = "ipg", "per";
	277	status = "disabled";
	278	};
	279
92f651f3 DC	280	tscadc: tscadc@50030000 {
	281	compatible = "fsl,imx25-tsadc";
	282	reg = <0x50030000 0xc>;
5658a68f SH	283	interrupts = <46>;
	284	clocks = <&clks 119>;
	285	clock-names = "ipg";
92f651f3 DC	286	interrupt-controller;
	287	#interrupt-cells = <1>;
	288	#address-cells = <1>;
	289	#size-cells = <1>;
5658a68f	290	status = "disabled";
83175620	291	ranges;
92f651f3 DC	292
	293	adc: adc@50030800 {
	294	compatible = "fsl,imx25-gcq";
	295	reg = <0x50030800 0x60>;
	296	interrupt-parent = <&tscadc>;
	297	interrupts = <1>;
	298	#address-cells = <1>;
	299	#size-cells = <0>;
	300	status = "disabled";
	301	};
	302
	303	tsc: tcq@50030400 {
	304	compatible = "fsl,imx25-tcq";
	305	reg = <0x50030400 0x60>;
	306	interrupt-parent = <&tscadc>;
	307	interrupts = <0>;
	308	fsl,wires = <4>;
	309	status = "disabled";
	310	};
5658a68f SH	311	};
	312
	313	ssi1: ssi@50034000 {
6ff7f51e	314	#sound-dai-cells = <0>;
5658a68f SH	315	compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
	316	reg = <0x50034000 0x4000>;
	317	interrupts = <12>;
7803c620 DC	318	clocks = <&clks 117>;
	319	clock-names = "ipg";
	320	dmas = <&sdma 28 1 0>,
	321	<&sdma 29 1 0>;
	322	dma-names = "rx", "tx";
f4be9b77	323	fsl,fifo-depth = <15>;
5658a68f SH	324	status = "disabled";
	325	};
	326
	327	fec: ethernet@50038000 {
	328	compatible = "fsl,imx25-fec";
	329	reg = <0x50038000 0x4000>;
	330	interrupts = <57>;
	331	clocks = <&clks 88>, <&clks 65>;
	332	clock-names = "ipg", "ahb";
	333	status = "disabled";
	334	};
	335	};
	336
	337	aips@53f00000 { /* AIPS2 */
	338	compatible = "fsl,aips-bus", "simple-bus";
	339	#address-cells = <1>;
	340	#size-cells = <1>;
	341	reg = <0x53f00000 0x100000>;
	342	ranges;
	343
c33576cb MK	344	aips2: bridge@53f00000 {
	345	compatible = "fsl,imx25-aips";
	346	reg = <0x53f00000 0x4000>;
	347	};
	348
5658a68f SH	349	clks: ccm@53f80000 {
	350	compatible = "fsl,imx25-ccm";
	351	reg = <0x53f80000 0x4000>;
	352	interrupts = <31>;
	353	#clock-cells = <1>;
	354	};
	355
	356	gpt4: timer@53f84000 {
	357	compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
	358	reg = <0x53f84000 0x4000>;
5363dcab	359	clocks = <&clks 95>, <&clks 47>;
5658a68f SH	360	clock-names = "ipg", "per";
	361	interrupts = <1>;
	362	};
	363
	364	gpt3: timer@53f88000 {
	365	compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
	366	reg = <0x53f88000 0x4000>;
5363dcab	367	clocks = <&clks 94>, <&clks 47>;
5658a68f SH	368	clock-names = "ipg", "per";
	369	interrupts = <29>;
	370	};
	371
	372	gpt2: timer@53f8c000 {
	373	compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
	374	reg = <0x53f8c000 0x4000>;
5363dcab	375	clocks = <&clks 93>, <&clks 47>;
5658a68f SH	376	clock-names = "ipg", "per";
	377	interrupts = <53>;
	378	};
	379
	380	gpt1: timer@53f90000 {
	381	compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
	382	reg = <0x53f90000 0x4000>;
5363dcab	383	clocks = <&clks 92>, <&clks 47>;
5658a68f SH	384	clock-names = "ipg", "per";
	385	interrupts = <54>;
	386	};
	387
	388	epit1: timer@53f94000 {
	389	compatible = "fsl,imx25-epit";
	390	reg = <0x53f94000 0x4000>;
	391	interrupts = <28>;
	392	};
	393
	394	epit2: timer@53f98000 {
	395	compatible = "fsl,imx25-epit";
	396	reg = <0x53f98000 0x4000>;
	397	interrupts = <27>;
	398	};
	399
	400	gpio4: gpio@53f9c000 {
	401	compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
	402	reg = <0x53f9c000 0x4000>;
	403	interrupts = <23>;
	404	gpio-controller;
	405	#gpio-cells = <2>;
	406	interrupt-controller;
	407	#interrupt-cells = <2>;
	408	};
	409
	410	pwm2: pwm@53fa0000 {
	411	compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
	412	#pwm-cells = <2>;
	413	reg = <0x53fa0000 0x4000>;
7ecd0bde	414	clocks = <&clks 106>, <&clks 52>;
5658a68f SH	415	clock-names = "ipg", "per";
	416	interrupts = <36>;
	417	};
	418
	419	gpio3: gpio@53fa4000 {
	420	compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
	421	reg = <0x53fa4000 0x4000>;
	422	interrupts = <16>;
	423	gpio-controller;
	424	#gpio-cells = <2>;
	425	interrupt-controller;
	426	#interrupt-cells = <2>;
	427	};
	428
	429	pwm3: pwm@53fa8000 {
	430	compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
	431	#pwm-cells = <2>;
	432	reg = <0x53fa8000 0x4000>;
7ecd0bde	433	clocks = <&clks 107>, <&clks 52>;
5658a68f SH	434	clock-names = "ipg", "per";
	435	interrupts = <41>;
	436	};
	437
ba97eed2 ST	438	scc: crypto@53fac000 {
	439	compatible = "fsl,imx25-scc";
	440	reg = <0x53fac000 0x4000>;
	441	clocks = <&clks 111>;
	442	clock-names = "ipg";
	443	interrupts = <49>, <50>;
	444	interrupt-names = "scm", "smn";
	445	};
	446
5fa01da7 ST	447	rngb: rngb@53fb0000 {
	448	compatible = "fsl,imx25-rngb";
	449	reg = <0x53fb0000 0x4000>;
	450	clocks = <&clks 109>;
	451	interrupts = <22>;
	452	};
	453
5658a68f SH	454	esdhc1: esdhc@53fb4000 {
	455	compatible = "fsl,imx25-esdhc";
	456	reg = <0x53fb4000 0x4000>;
	457	interrupts = <9>;
	458	clocks = <&clks 86>, <&clks 63>, <&clks 45>;
	459	clock-names = "ipg", "ahb", "per";
	460	status = "disabled";
	461	};
	462
	463	esdhc2: esdhc@53fb8000 {
	464	compatible = "fsl,imx25-esdhc";
	465	reg = <0x53fb8000 0x4000>;
	466	interrupts = <8>;
	467	clocks = <&clks 87>, <&clks 64>, <&clks 46>;
	468	clock-names = "ipg", "ahb", "per";
	469	status = "disabled";
	470	};
	471
c770f7c0 MW	472	lcdc: lcdc@53fbc000 {
c770f7c0 MW	473	compatible = "fsl,imx25-fb", "fsl,imx21-fb";
5658a68f SH	474	reg = <0x53fbc000 0x4000>;
	475	interrupts = <39>;
	476	clocks = <&clks 103>, <&clks 66>, <&clks 49>;
	477	clock-names = "ipg", "ahb", "per";
	478	status = "disabled";
	479	};
	480
	481	slcdc@53fc0000 {
	482	reg = <0x53fc0000 0x4000>;
	483	interrupts = <38>;
	484	status = "disabled";
	485	};
	486
	487	pwm4: pwm@53fc8000 {
	488	compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
f90d3f0d	489	#pwm-cells = <2>;
5658a68f	490	reg = <0x53fc8000 0x4000>;
7ecd0bde	491	clocks = <&clks 108>, <&clks 52>;
5658a68f SH	492	clock-names = "ipg", "per";
	493	interrupts = <42>;
	494	};
	495
	496	gpio1: gpio@53fcc000 {
	497	compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
	498	reg = <0x53fcc000 0x4000>;
	499	interrupts = <52>;
	500	gpio-controller;
	501	#gpio-cells = <2>;
	502	interrupt-controller;
	503	#interrupt-cells = <2>;
	504	};
	505
	506	gpio2: gpio@53fd0000 {
	507	compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
	508	reg = <0x53fd0000 0x4000>;
	509	interrupts = <51>;
	510	gpio-controller;
	511	#gpio-cells = <2>;
	512	interrupt-controller;
	513	#interrupt-cells = <2>;
	514	};
	515
7803c620	516	sdma: sdma@53fd4000 {
0f429057	517	compatible = "fsl,imx25-sdma";
5658a68f SH	518	reg = <0x53fd4000 0x4000>;
	519	clocks = <&clks 112>, <&clks 68>;
	520	clock-names = "ipg", "ahb";
fb72bb21	521	#dma-cells = <3>;
5658a68f	522	interrupts = <34>;
cabd1b29	523	fsl,sdma-ram-script-name = "imx/sdma/sdma-imx25.bin";
5658a68f SH	524	};
	525
	526	wdog@53fdc000 {
	527	compatible = "fsl,imx25-wdt", "fsl,imx21-wdt";
	528	reg = <0x53fdc000 0x4000>;
	529	clocks = <&clks 126>;
	530	clock-names = "";
	531	interrupts = <55>;
	532	};
	533
	534	pwm1: pwm@53fe0000 {
	535	compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
	536	#pwm-cells = <2>;
	537	reg = <0x53fe0000 0x4000>;
7ecd0bde	538	clocks = <&clks 105>, <&clks 52>;
5658a68f SH	539	clock-names = "ipg", "per";
	540	interrupts = <26>;
	541	};
	542
684f6a23 SH	543	iim: iim@53ff0000 {
	544	compatible = "fsl,imx25-iim", "fsl,imx27-iim";
	545	reg = <0x53ff0000 0x4000>;
	546	interrupts = <19>;
	547	clocks = <&clks 99>;
	548	};
	549
5658a68f SH	550	usbotg: usb@53ff4000 {
	551	compatible = "fsl,imx25-usb", "fsl,imx27-usb";
	552	reg = <0x53ff4000 0x0200>;
	553	interrupts = <37>;
1b8d1ea9 PC	554	clocks = <&clks 9>, <&clks 70>, <&clks 8>;
1b8d1ea9 PC	555	clock-names = "ipg", "ahb", "per";
5658a68f	556	fsl,usbmisc = <&usbmisc 0>;
f415153c	557	fsl,usbphy = <&usbphy0>;
10ad0dda UKK	558	phy_type = "utmi";
10ad0dda UKK	559	dr_mode = "otg";
5658a68f SH	560	status = "disabled";
	561	};
	562
	563	usbhost1: usb@53ff4400 {
	564	compatible = "fsl,imx25-usb", "fsl,imx27-usb";
	565	reg = <0x53ff4400 0x0200>;
	566	interrupts = <35>;
1b8d1ea9 PC	567	clocks = <&clks 9>, <&clks 70>, <&clks 8>;
1b8d1ea9 PC	568	clock-names = "ipg", "ahb", "per";
5658a68f	569	fsl,usbmisc = <&usbmisc 1>;
f415153c	570	fsl,usbphy = <&usbphy1>;
5658a68f SH	571	status = "disabled";
	572	};
	573
	574	usbmisc: usbmisc@53ff4600 {
	575	#index-cells = <1>;
	576	compatible = "fsl,imx25-usbmisc";
5658a68f	577	reg = <0x53ff4600 0x00f>;
5658a68f SH	578	};
	579
	580	dryice@53ffc000 {
	581	compatible = "fsl,imx25-dryice", "fsl,imx25-rtc";
	582	reg = <0x53ffc000 0x4000>;
	583	clocks = <&clks 81>;
	584	clock-names = "ipg";
f082bbff	585	interrupts = <25 56>;
5658a68f SH	586	};
	587	};
	588
41707314 SH	589	iram: sram@78000000 {
	590	compatible = "mmio-sram";
	591	reg = <0x78000000 0x20000>;
	592	};
	593
5658a68f SH	594	emi@80000000 {
	595	compatible = "fsl,emi-bus", "simple-bus";
	596	#address-cells = <1>;
	597	#size-cells = <1>;
	598	reg = <0x80000000 0x3b002000>;
	599	ranges;
	600
be4ccfce	601	nfc: nand@bb000000 {
5658a68f SH	602	#address-cells = <1>;
	603	#size-cells = <1>;
	604
	605	compatible = "fsl,imx25-nand";
	606	reg = <0xbb000000 0x2000>;
	607	clocks = <&clks 50>;
	608	clock-names = "";
	609	interrupts = <33>;
	610	status = "disabled";
	611	};
	612	};
	613	};
f415153c FE	614
	615	usbphy {
	616	compatible = "simple-bus";
	617	#address-cells = <1>;
	618	#size-cells = <0>;
	619
	620	usbphy0: usb-phy@0 {
	621	reg = <0>;
	622	compatible = "usb-nop-xceiv";
915fbe59	623	#phy-cells = <0>;
f415153c FE	624	};
	625
	626	usbphy1: usb-phy@1 {
	627	reg = <1>;
	628	compatible = "usb-nop-xceiv";
915fbe59	629	#phy-cells = <0>;
f415153c FE	630	};
f415153c FE	631	};
5658a68f	632	};