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5658a68f SH |
1 | /* |
2 | * Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de> | |
3 | * | |
4 | * The code contained herein is licensed under the GNU General Public | |
5 | * License. You may obtain a copy of the GNU General Public License | |
6 | * Version 2 or later at the following locations: | |
7 | * | |
8 | * http://www.opensource.org/licenses/gpl-license.html | |
9 | * http://www.gnu.org/copyleft/gpl.html | |
10 | */ | |
11 | ||
36dffd8f | 12 | #include "skeleton.dtsi" |
5658a68f SH |
13 | |
14 | / { | |
15 | aliases { | |
6ed1a0e5 SH |
16 | gpio0 = &gpio1; |
17 | gpio1 = &gpio2; | |
18 | gpio2 = &gpio3; | |
19 | gpio3 = &gpio4; | |
20 | i2c0 = &i2c1; | |
21 | i2c1 = &i2c2; | |
22 | i2c2 = &i2c3; | |
5658a68f SH |
23 | serial0 = &uart1; |
24 | serial1 = &uart2; | |
25 | serial2 = &uart3; | |
26 | serial3 = &uart4; | |
27 | serial4 = &uart5; | |
6ed1a0e5 SH |
28 | spi0 = &spi1; |
29 | spi1 = &spi2; | |
30 | spi2 = &spi3; | |
5658a68f SH |
31 | usb0 = &usbotg; |
32 | usb1 = &usbhost1; | |
33 | }; | |
34 | ||
070bd7e4 FE |
35 | cpus { |
36 | #address-cells = <0>; | |
37 | #size-cells = <0>; | |
38 | ||
39 | cpu { | |
40 | compatible = "arm,arm926ej-s"; | |
41 | device_type = "cpu"; | |
42 | }; | |
43 | }; | |
44 | ||
5658a68f SH |
45 | asic: asic-interrupt-controller@68000000 { |
46 | compatible = "fsl,imx25-asic", "fsl,avic"; | |
47 | interrupt-controller; | |
48 | #interrupt-cells = <1>; | |
49 | reg = <0x68000000 0x8000000>; | |
50 | }; | |
51 | ||
52 | clocks { | |
53 | #address-cells = <1>; | |
54 | #size-cells = <0>; | |
55 | ||
56 | osc { | |
57 | compatible = "fsl,imx-osc", "fixed-clock"; | |
58 | clock-frequency = <24000000>; | |
59 | }; | |
60 | }; | |
61 | ||
62 | soc { | |
63 | #address-cells = <1>; | |
64 | #size-cells = <1>; | |
65 | compatible = "simple-bus"; | |
66 | interrupt-parent = <&asic>; | |
67 | ranges; | |
68 | ||
69 | aips@43f00000 { /* AIPS1 */ | |
70 | compatible = "fsl,aips-bus", "simple-bus"; | |
71 | #address-cells = <1>; | |
72 | #size-cells = <1>; | |
73 | reg = <0x43f00000 0x100000>; | |
74 | ranges; | |
75 | ||
76 | i2c1: i2c@43f80000 { | |
77 | #address-cells = <1>; | |
78 | #size-cells = <0>; | |
79 | compatible = "fsl,imx25-i2c", "fsl,imx21-i2c"; | |
80 | reg = <0x43f80000 0x4000>; | |
81 | clocks = <&clks 48>; | |
82 | clock-names = ""; | |
83 | interrupts = <3>; | |
84 | status = "disabled"; | |
85 | }; | |
86 | ||
87 | i2c3: i2c@43f84000 { | |
88 | #address-cells = <1>; | |
89 | #size-cells = <0>; | |
90 | compatible = "fsl,imx25-i2c", "fsl,imx21-i2c"; | |
91 | reg = <0x43f84000 0x4000>; | |
92 | clocks = <&clks 48>; | |
93 | clock-names = ""; | |
94 | interrupts = <10>; | |
95 | status = "disabled"; | |
96 | }; | |
97 | ||
98 | can1: can@43f88000 { | |
99 | compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan"; | |
100 | reg = <0x43f88000 0x4000>; | |
101 | interrupts = <43>; | |
102 | clocks = <&clks 75>, <&clks 75>; | |
103 | clock-names = "ipg", "per"; | |
104 | status = "disabled"; | |
105 | }; | |
106 | ||
107 | can2: can@43f8c000 { | |
108 | compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan"; | |
109 | reg = <0x43f8c000 0x4000>; | |
110 | interrupts = <44>; | |
111 | clocks = <&clks 76>, <&clks 76>; | |
112 | clock-names = "ipg", "per"; | |
113 | status = "disabled"; | |
114 | }; | |
115 | ||
116 | uart1: serial@43f90000 { | |
117 | compatible = "fsl,imx25-uart", "fsl,imx21-uart"; | |
118 | reg = <0x43f90000 0x4000>; | |
119 | interrupts = <45>; | |
120 | clocks = <&clks 120>, <&clks 57>; | |
121 | clock-names = "ipg", "per"; | |
122 | status = "disabled"; | |
123 | }; | |
124 | ||
125 | uart2: serial@43f94000 { | |
126 | compatible = "fsl,imx25-uart", "fsl,imx21-uart"; | |
127 | reg = <0x43f94000 0x4000>; | |
128 | interrupts = <32>; | |
129 | clocks = <&clks 121>, <&clks 57>; | |
130 | clock-names = "ipg", "per"; | |
131 | status = "disabled"; | |
132 | }; | |
133 | ||
134 | i2c2: i2c@43f98000 { | |
135 | #address-cells = <1>; | |
136 | #size-cells = <0>; | |
137 | compatible = "fsl,imx25-i2c", "fsl,imx21-i2c"; | |
138 | reg = <0x43f98000 0x4000>; | |
139 | clocks = <&clks 48>; | |
140 | clock-names = ""; | |
141 | interrupts = <4>; | |
142 | status = "disabled"; | |
143 | }; | |
144 | ||
145 | owire@43f9c000 { | |
146 | #address-cells = <1>; | |
147 | #size-cells = <0>; | |
148 | reg = <0x43f9c000 0x4000>; | |
149 | clocks = <&clks 51>; | |
150 | clock-names = ""; | |
151 | interrupts = <2>; | |
152 | status = "disabled"; | |
153 | }; | |
154 | ||
155 | spi1: cspi@43fa4000 { | |
156 | #address-cells = <1>; | |
157 | #size-cells = <0>; | |
158 | compatible = "fsl,imx25-cspi", "fsl,imx35-cspi"; | |
159 | reg = <0x43fa4000 0x4000>; | |
37523dc5 JA |
160 | clocks = <&clks 62>, <&clks 62>; |
161 | clock-names = "ipg", "per"; | |
5658a68f SH |
162 | interrupts = <14>; |
163 | status = "disabled"; | |
164 | }; | |
165 | ||
166 | kpp@43fa8000 { | |
167 | #address-cells = <1>; | |
168 | #size-cells = <0>; | |
169 | reg = <0x43fa8000 0x4000>; | |
170 | clocks = <&clks 102>; | |
171 | clock-names = ""; | |
172 | interrupts = <24>; | |
173 | status = "disabled"; | |
174 | }; | |
175 | ||
176 | iomuxc@43fac000{ | |
177 | compatible = "fsl,imx25-iomuxc"; | |
178 | reg = <0x43fac000 0x4000>; | |
179 | }; | |
180 | ||
181 | audmux@43fb0000 { | |
182 | compatible = "fsl,imx25-audmux", "fsl,imx31-audmux"; | |
183 | reg = <0x43fb0000 0x4000>; | |
184 | status = "disabled"; | |
185 | }; | |
186 | }; | |
187 | ||
188 | spba@50000000 { | |
189 | compatible = "fsl,spba-bus", "simple-bus"; | |
190 | #address-cells = <1>; | |
191 | #size-cells = <1>; | |
192 | reg = <0x50000000 0x40000>; | |
193 | ranges; | |
194 | ||
195 | spi3: cspi@50004000 { | |
196 | #address-cells = <1>; | |
197 | #size-cells = <0>; | |
198 | compatible = "fsl,imx25-cspi", "fsl,imx35-cspi"; | |
199 | reg = <0x50004000 0x4000>; | |
200 | interrupts = <0>; | |
37523dc5 JA |
201 | clocks = <&clks 80>, <&clks 80>; |
202 | clock-names = "ipg", "per"; | |
5658a68f SH |
203 | status = "disabled"; |
204 | }; | |
205 | ||
206 | uart4: serial@50008000 { | |
207 | compatible = "fsl,imx25-uart", "fsl,imx21-uart"; | |
208 | reg = <0x50008000 0x4000>; | |
209 | interrupts = <5>; | |
210 | clocks = <&clks 123>, <&clks 57>; | |
211 | clock-names = "ipg", "per"; | |
212 | status = "disabled"; | |
213 | }; | |
214 | ||
215 | uart3: serial@5000c000 { | |
216 | compatible = "fsl,imx25-uart", "fsl,imx21-uart"; | |
217 | reg = <0x5000c000 0x4000>; | |
218 | interrupts = <18>; | |
219 | clocks = <&clks 122>, <&clks 57>; | |
220 | clock-names = "ipg", "per"; | |
221 | status = "disabled"; | |
222 | }; | |
223 | ||
224 | spi2: cspi@50010000 { | |
225 | #address-cells = <1>; | |
226 | #size-cells = <0>; | |
227 | compatible = "fsl,imx25-cspi", "fsl,imx35-cspi"; | |
228 | reg = <0x50010000 0x4000>; | |
37523dc5 JA |
229 | clocks = <&clks 79>, <&clks 79>; |
230 | clock-names = "ipg", "per"; | |
5658a68f SH |
231 | interrupts = <13>; |
232 | status = "disabled"; | |
233 | }; | |
234 | ||
235 | ssi2: ssi@50014000 { | |
236 | compatible = "fsl,imx25-ssi", "fsl,imx21-ssi"; | |
237 | reg = <0x50014000 0x4000>; | |
238 | interrupts = <11>; | |
239 | status = "disabled"; | |
240 | }; | |
241 | ||
242 | esai@50018000 { | |
243 | reg = <0x50018000 0x4000>; | |
244 | interrupts = <7>; | |
245 | }; | |
246 | ||
247 | uart5: serial@5002c000 { | |
248 | compatible = "fsl,imx25-uart", "fsl,imx21-uart"; | |
249 | reg = <0x5002c000 0x4000>; | |
250 | interrupts = <40>; | |
251 | clocks = <&clks 124>, <&clks 57>; | |
252 | clock-names = "ipg", "per"; | |
253 | status = "disabled"; | |
254 | }; | |
255 | ||
256 | tsc: tsc@50030000 { | |
257 | compatible = "fsl,imx25-adc", "fsl,imx21-tsc"; | |
258 | reg = <0x50030000 0x4000>; | |
259 | interrupts = <46>; | |
260 | clocks = <&clks 119>; | |
261 | clock-names = "ipg"; | |
262 | status = "disabled"; | |
263 | }; | |
264 | ||
265 | ssi1: ssi@50034000 { | |
266 | compatible = "fsl,imx25-ssi", "fsl,imx21-ssi"; | |
267 | reg = <0x50034000 0x4000>; | |
268 | interrupts = <12>; | |
269 | status = "disabled"; | |
270 | }; | |
271 | ||
272 | fec: ethernet@50038000 { | |
273 | compatible = "fsl,imx25-fec"; | |
274 | reg = <0x50038000 0x4000>; | |
275 | interrupts = <57>; | |
276 | clocks = <&clks 88>, <&clks 65>; | |
277 | clock-names = "ipg", "ahb"; | |
278 | status = "disabled"; | |
279 | }; | |
280 | }; | |
281 | ||
282 | aips@53f00000 { /* AIPS2 */ | |
283 | compatible = "fsl,aips-bus", "simple-bus"; | |
284 | #address-cells = <1>; | |
285 | #size-cells = <1>; | |
286 | reg = <0x53f00000 0x100000>; | |
287 | ranges; | |
288 | ||
289 | clks: ccm@53f80000 { | |
290 | compatible = "fsl,imx25-ccm"; | |
291 | reg = <0x53f80000 0x4000>; | |
292 | interrupts = <31>; | |
293 | #clock-cells = <1>; | |
294 | }; | |
295 | ||
296 | gpt4: timer@53f84000 { | |
297 | compatible = "fsl,imx25-gpt", "fsl,imx31-gpt"; | |
298 | reg = <0x53f84000 0x4000>; | |
299 | clocks = <&clks 9>, <&clks 45>; | |
300 | clock-names = "ipg", "per"; | |
301 | interrupts = <1>; | |
302 | }; | |
303 | ||
304 | gpt3: timer@53f88000 { | |
305 | compatible = "fsl,imx25-gpt", "fsl,imx31-gpt"; | |
306 | reg = <0x53f88000 0x4000>; | |
307 | clocks = <&clks 9>, <&clks 47>; | |
308 | clock-names = "ipg", "per"; | |
309 | interrupts = <29>; | |
310 | }; | |
311 | ||
312 | gpt2: timer@53f8c000 { | |
313 | compatible = "fsl,imx25-gpt", "fsl,imx31-gpt"; | |
314 | reg = <0x53f8c000 0x4000>; | |
315 | clocks = <&clks 9>, <&clks 47>; | |
316 | clock-names = "ipg", "per"; | |
317 | interrupts = <53>; | |
318 | }; | |
319 | ||
320 | gpt1: timer@53f90000 { | |
321 | compatible = "fsl,imx25-gpt", "fsl,imx31-gpt"; | |
322 | reg = <0x53f90000 0x4000>; | |
323 | clocks = <&clks 9>, <&clks 47>; | |
324 | clock-names = "ipg", "per"; | |
325 | interrupts = <54>; | |
326 | }; | |
327 | ||
328 | epit1: timer@53f94000 { | |
329 | compatible = "fsl,imx25-epit"; | |
330 | reg = <0x53f94000 0x4000>; | |
331 | interrupts = <28>; | |
332 | }; | |
333 | ||
334 | epit2: timer@53f98000 { | |
335 | compatible = "fsl,imx25-epit"; | |
336 | reg = <0x53f98000 0x4000>; | |
337 | interrupts = <27>; | |
338 | }; | |
339 | ||
340 | gpio4: gpio@53f9c000 { | |
341 | compatible = "fsl,imx25-gpio", "fsl,imx35-gpio"; | |
342 | reg = <0x53f9c000 0x4000>; | |
343 | interrupts = <23>; | |
344 | gpio-controller; | |
345 | #gpio-cells = <2>; | |
346 | interrupt-controller; | |
347 | #interrupt-cells = <2>; | |
348 | }; | |
349 | ||
350 | pwm2: pwm@53fa0000 { | |
351 | compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; | |
352 | #pwm-cells = <2>; | |
353 | reg = <0x53fa0000 0x4000>; | |
354 | clocks = <&clks 106>, <&clks 36>; | |
355 | clock-names = "ipg", "per"; | |
356 | interrupts = <36>; | |
357 | }; | |
358 | ||
359 | gpio3: gpio@53fa4000 { | |
360 | compatible = "fsl,imx25-gpio", "fsl,imx35-gpio"; | |
361 | reg = <0x53fa4000 0x4000>; | |
362 | interrupts = <16>; | |
363 | gpio-controller; | |
364 | #gpio-cells = <2>; | |
365 | interrupt-controller; | |
366 | #interrupt-cells = <2>; | |
367 | }; | |
368 | ||
369 | pwm3: pwm@53fa8000 { | |
370 | compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; | |
371 | #pwm-cells = <2>; | |
372 | reg = <0x53fa8000 0x4000>; | |
373 | clocks = <&clks 107>, <&clks 36>; | |
374 | clock-names = "ipg", "per"; | |
375 | interrupts = <41>; | |
376 | }; | |
377 | ||
378 | esdhc1: esdhc@53fb4000 { | |
379 | compatible = "fsl,imx25-esdhc"; | |
380 | reg = <0x53fb4000 0x4000>; | |
381 | interrupts = <9>; | |
382 | clocks = <&clks 86>, <&clks 63>, <&clks 45>; | |
383 | clock-names = "ipg", "ahb", "per"; | |
384 | status = "disabled"; | |
385 | }; | |
386 | ||
387 | esdhc2: esdhc@53fb8000 { | |
388 | compatible = "fsl,imx25-esdhc"; | |
389 | reg = <0x53fb8000 0x4000>; | |
390 | interrupts = <8>; | |
391 | clocks = <&clks 87>, <&clks 64>, <&clks 46>; | |
392 | clock-names = "ipg", "ahb", "per"; | |
393 | status = "disabled"; | |
394 | }; | |
395 | ||
c770f7c0 MW |
396 | lcdc: lcdc@53fbc000 { |
397 | compatible = "fsl,imx25-fb", "fsl,imx21-fb"; | |
5658a68f SH |
398 | reg = <0x53fbc000 0x4000>; |
399 | interrupts = <39>; | |
400 | clocks = <&clks 103>, <&clks 66>, <&clks 49>; | |
401 | clock-names = "ipg", "ahb", "per"; | |
402 | status = "disabled"; | |
403 | }; | |
404 | ||
405 | slcdc@53fc0000 { | |
406 | reg = <0x53fc0000 0x4000>; | |
407 | interrupts = <38>; | |
408 | status = "disabled"; | |
409 | }; | |
410 | ||
411 | pwm4: pwm@53fc8000 { | |
412 | compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; | |
413 | reg = <0x53fc8000 0x4000>; | |
414 | clocks = <&clks 108>, <&clks 36>; | |
415 | clock-names = "ipg", "per"; | |
416 | interrupts = <42>; | |
417 | }; | |
418 | ||
419 | gpio1: gpio@53fcc000 { | |
420 | compatible = "fsl,imx25-gpio", "fsl,imx35-gpio"; | |
421 | reg = <0x53fcc000 0x4000>; | |
422 | interrupts = <52>; | |
423 | gpio-controller; | |
424 | #gpio-cells = <2>; | |
425 | interrupt-controller; | |
426 | #interrupt-cells = <2>; | |
427 | }; | |
428 | ||
429 | gpio2: gpio@53fd0000 { | |
430 | compatible = "fsl,imx25-gpio", "fsl,imx35-gpio"; | |
431 | reg = <0x53fd0000 0x4000>; | |
432 | interrupts = <51>; | |
433 | gpio-controller; | |
434 | #gpio-cells = <2>; | |
435 | interrupt-controller; | |
436 | #interrupt-cells = <2>; | |
437 | }; | |
438 | ||
439 | sdma@53fd4000 { | |
440 | compatible = "fsl,imx25-sdma", "fsl,imx35-sdma"; | |
441 | reg = <0x53fd4000 0x4000>; | |
442 | clocks = <&clks 112>, <&clks 68>; | |
443 | clock-names = "ipg", "ahb"; | |
fb72bb21 | 444 | #dma-cells = <3>; |
5658a68f SH |
445 | interrupts = <34>; |
446 | }; | |
447 | ||
448 | wdog@53fdc000 { | |
449 | compatible = "fsl,imx25-wdt", "fsl,imx21-wdt"; | |
450 | reg = <0x53fdc000 0x4000>; | |
451 | clocks = <&clks 126>; | |
452 | clock-names = ""; | |
453 | interrupts = <55>; | |
454 | }; | |
455 | ||
456 | pwm1: pwm@53fe0000 { | |
457 | compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; | |
458 | #pwm-cells = <2>; | |
459 | reg = <0x53fe0000 0x4000>; | |
460 | clocks = <&clks 105>, <&clks 36>; | |
461 | clock-names = "ipg", "per"; | |
462 | interrupts = <26>; | |
463 | }; | |
464 | ||
684f6a23 SH |
465 | iim: iim@53ff0000 { |
466 | compatible = "fsl,imx25-iim", "fsl,imx27-iim"; | |
467 | reg = <0x53ff0000 0x4000>; | |
468 | interrupts = <19>; | |
469 | clocks = <&clks 99>; | |
470 | }; | |
471 | ||
5658a68f SH |
472 | usbphy1: usbphy@1 { |
473 | compatible = "nop-usbphy"; | |
474 | status = "disabled"; | |
475 | }; | |
476 | ||
477 | usbphy2: usbphy@2 { | |
478 | compatible = "nop-usbphy"; | |
479 | status = "disabled"; | |
480 | }; | |
481 | ||
482 | usbotg: usb@53ff4000 { | |
483 | compatible = "fsl,imx25-usb", "fsl,imx27-usb"; | |
484 | reg = <0x53ff4000 0x0200>; | |
485 | interrupts = <37>; | |
486 | clocks = <&clks 9>, <&clks 70>, <&clks 8>; | |
487 | clock-names = "ipg", "ahb", "per"; | |
488 | fsl,usbmisc = <&usbmisc 0>; | |
489 | status = "disabled"; | |
490 | }; | |
491 | ||
492 | usbhost1: usb@53ff4400 { | |
493 | compatible = "fsl,imx25-usb", "fsl,imx27-usb"; | |
494 | reg = <0x53ff4400 0x0200>; | |
495 | interrupts = <35>; | |
496 | clocks = <&clks 9>, <&clks 70>, <&clks 8>; | |
497 | clock-names = "ipg", "ahb", "per"; | |
498 | fsl,usbmisc = <&usbmisc 1>; | |
499 | status = "disabled"; | |
500 | }; | |
501 | ||
502 | usbmisc: usbmisc@53ff4600 { | |
503 | #index-cells = <1>; | |
504 | compatible = "fsl,imx25-usbmisc"; | |
505 | clocks = <&clks 9>, <&clks 70>, <&clks 8>; | |
506 | clock-names = "ipg", "ahb", "per"; | |
507 | reg = <0x53ff4600 0x00f>; | |
508 | status = "disabled"; | |
509 | }; | |
510 | ||
511 | dryice@53ffc000 { | |
512 | compatible = "fsl,imx25-dryice", "fsl,imx25-rtc"; | |
513 | reg = <0x53ffc000 0x4000>; | |
514 | clocks = <&clks 81>; | |
515 | clock-names = "ipg"; | |
516 | interrupts = <25>; | |
517 | }; | |
518 | }; | |
519 | ||
520 | emi@80000000 { | |
521 | compatible = "fsl,emi-bus", "simple-bus"; | |
522 | #address-cells = <1>; | |
523 | #size-cells = <1>; | |
524 | reg = <0x80000000 0x3b002000>; | |
525 | ranges; | |
526 | ||
be4ccfce | 527 | nfc: nand@bb000000 { |
5658a68f SH |
528 | #address-cells = <1>; |
529 | #size-cells = <1>; | |
530 | ||
531 | compatible = "fsl,imx25-nand"; | |
532 | reg = <0xbb000000 0x2000>; | |
533 | clocks = <&clks 50>; | |
534 | clock-names = ""; | |
535 | interrupts = <33>; | |
536 | status = "disabled"; | |
537 | }; | |
538 | }; | |
539 | }; | |
540 | }; |