[mirror_ubuntu-artful-kernel.git] / arch / arm / boot / dts / imx25.dtsi

/*
 * Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
 *
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

#include "skeleton.dtsi"
#include "imx25-pinfunc.h"

/ {
	aliases {
		gpio0 = &gpio1;
		gpio1 = &gpio2;
		gpio2 = &gpio3;
		gpio3 = &gpio4;
		i2c0 = &i2c1;
		i2c1 = &i2c2;
		i2c2 = &i2c3;
		serial0 = &uart1;
		serial1 = &uart2;
		serial2 = &uart3;
		serial3 = &uart4;
		serial4 = &uart5;
		spi0 = &spi1;
		spi1 = &spi2;
		spi2 = &spi3;
		usb0 = &usbotg;
		usb1 = &usbhost1;
	};

	cpus {
		#address-cells = <0>;
		#size-cells = <0>;

		cpu {
			compatible = "arm,arm926ej-s";
			device_type = "cpu";
		};
	};

	asic: asic-interrupt-controller@68000000 {
		compatible = "fsl,imx25-asic", "fsl,avic";
		interrupt-controller;
		#interrupt-cells = <1>;
		reg = <0x68000000 0x8000000>;
	};

	clocks {
		#address-cells = <1>;
		#size-cells = <0>;

		osc {
			compatible = "fsl,imx-osc", "fixed-clock";
			clock-frequency = <24000000>;
		};
	};

	soc {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "simple-bus";
		interrupt-parent = <&asic>;
		ranges;

		aips@43f00000 { /* AIPS1 */
			compatible = "fsl,aips-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x43f00000 0x100000>;
			ranges;

			i2c1: i2c@43f80000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
				reg = <0x43f80000 0x4000>;
				clocks = <&clks 48>;
				clock-names = "";
				interrupts = <3>;
				status = "disabled";
			};

			i2c3: i2c@43f84000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
				reg = <0x43f84000 0x4000>;
				clocks = <&clks 48>;
				clock-names = "";
				interrupts = <10>;
				status = "disabled";
			};

			can1: can@43f88000 {
				compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
				reg = <0x43f88000 0x4000>;
				interrupts = <43>;
				clocks = <&clks 75>, <&clks 75>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			can2: can@43f8c000 {
				compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
				reg = <0x43f8c000 0x4000>;
				interrupts = <44>;
				clocks = <&clks 76>, <&clks 76>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			uart1: serial@43f90000 {
				compatible = "fsl,imx25-uart", "fsl,imx21-uart";
				reg = <0x43f90000 0x4000>;
				interrupts = <45>;
				clocks = <&clks 120>, <&clks 57>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			uart2: serial@43f94000 {
				compatible = "fsl,imx25-uart", "fsl,imx21-uart";
				reg = <0x43f94000 0x4000>;
				interrupts = <32>;
				clocks = <&clks 121>, <&clks 57>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			i2c2: i2c@43f98000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
				reg = <0x43f98000 0x4000>;
				clocks = <&clks 48>;
				clock-names = "";
				interrupts = <4>;
				status = "disabled";
			};

			owire@43f9c000 {
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <0x43f9c000 0x4000>;
				clocks = <&clks 51>;
				clock-names = "";
				interrupts = <2>;
				status = "disabled";
			};

			spi1: cspi@43fa4000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
				reg = <0x43fa4000 0x4000>;
				clocks = <&clks 62>, <&clks 62>;
				clock-names = "ipg", "per";
				interrupts = <14>;
				status = "disabled";
			};

			kpp@43fa8000 {
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <0x43fa8000 0x4000>;
				clocks = <&clks 102>;
				clock-names = "";
				interrupts = <24>;
				status = "disabled";
			};

			iomuxc@43fac000{
				compatible = "fsl,imx25-iomuxc";
				reg = <0x43fac000 0x4000>;
			};

			audmux: audmux@43fb0000 {
				compatible = "fsl,imx25-audmux", "fsl,imx31-audmux";
				reg = <0x43fb0000 0x4000>;
				status = "disabled";
			};
		};

		spba@50000000 {
			compatible = "fsl,spba-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x50000000 0x40000>;
			ranges;

			spi3: cspi@50004000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
				reg = <0x50004000 0x4000>;
				interrupts = <0>;
				clocks = <&clks 80>, <&clks 80>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			uart4: serial@50008000 {
				compatible = "fsl,imx25-uart", "fsl,imx21-uart";
				reg = <0x50008000 0x4000>;
				interrupts = <5>;
				clocks = <&clks 123>, <&clks 57>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			uart3: serial@5000c000 {
				compatible = "fsl,imx25-uart", "fsl,imx21-uart";
				reg = <0x5000c000 0x4000>;
				interrupts = <18>;
				clocks = <&clks 122>, <&clks 57>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			spi2: cspi@50010000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
				reg = <0x50010000 0x4000>;
				clocks = <&clks 79>, <&clks 79>;
				clock-names = "ipg", "per";
				interrupts = <13>;
				status = "disabled";
			};

			ssi2: ssi@50014000 {
				compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
				reg = <0x50014000 0x4000>;
				interrupts = <11>;
				clocks = <&clks 118>;
				clock-names = "ipg";
				dmas = <&sdma 24 1 0>,
				       <&sdma 25 1 0>;
				dma-names = "rx", "tx";
				status = "disabled";
			};

			esai@50018000 {
				reg = <0x50018000 0x4000>;
				interrupts = <7>;
			};

			uart5: serial@5002c000 {
				compatible = "fsl,imx25-uart", "fsl,imx21-uart";
				reg = <0x5002c000 0x4000>;
				interrupts = <40>;
				clocks = <&clks 124>, <&clks 57>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			tsc: tsc@50030000 {
				compatible = "fsl,imx25-adc", "fsl,imx21-tsc";
				reg = <0x50030000 0x4000>;
				interrupts = <46>;
				clocks = <&clks 119>;
				clock-names = "ipg";
				status = "disabled";
			};

			ssi1: ssi@50034000 {
				compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
				reg = <0x50034000 0x4000>;
				interrupts = <12>;
				clocks = <&clks 117>;
				clock-names = "ipg";
				dmas = <&sdma 28 1 0>,
				       <&sdma 29 1 0>;
				dma-names = "rx", "tx";
				status = "disabled";
			};

			fec: ethernet@50038000 {
				compatible = "fsl,imx25-fec";
				reg = <0x50038000 0x4000>;
				interrupts = <57>;
				clocks = <&clks 88>, <&clks 65>;
				clock-names = "ipg", "ahb";
				status = "disabled";
			};
		};

		aips@53f00000 { /* AIPS2 */
			compatible = "fsl,aips-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x53f00000 0x100000>;
			ranges;

			clks: ccm@53f80000 {
				compatible = "fsl,imx25-ccm";
				reg = <0x53f80000 0x4000>;
				interrupts = <31>;
				#clock-cells = <1>;
			};

			gpt4: timer@53f84000 {
				compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
				reg = <0x53f84000 0x4000>;
				clocks = <&clks 9>, <&clks 45>;
				clock-names = "ipg", "per";
				interrupts = <1>;
			};

			gpt3: timer@53f88000 {
				compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
				reg = <0x53f88000 0x4000>;
				clocks = <&clks 9>, <&clks 47>;
				clock-names = "ipg", "per";
				interrupts = <29>;
			};

			gpt2: timer@53f8c000 {
				compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
				reg = <0x53f8c000 0x4000>;
				clocks = <&clks 9>, <&clks 47>;
				clock-names = "ipg", "per";
				interrupts = <53>;
			};

			gpt1: timer@53f90000 {
				compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
				reg = <0x53f90000 0x4000>;
				clocks = <&clks 9>, <&clks 47>;
				clock-names = "ipg", "per";
				interrupts = <54>;
			};

			epit1: timer@53f94000 {
				compatible = "fsl,imx25-epit";
				reg = <0x53f94000 0x4000>;
				interrupts = <28>;
			};

			epit2: timer@53f98000 {
				compatible = "fsl,imx25-epit";
				reg = <0x53f98000 0x4000>;
				interrupts = <27>;
			};

			gpio4: gpio@53f9c000 {
				compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
				reg = <0x53f9c000 0x4000>;
				interrupts = <23>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
			};

			pwm2: pwm@53fa0000 {
				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
				#pwm-cells = <2>;
				reg = <0x53fa0000 0x4000>;
				clocks = <&clks 106>, <&clks 36>;
				clock-names = "ipg", "per";
				interrupts = <36>;
			};

			gpio3: gpio@53fa4000 {
				compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
				reg = <0x53fa4000 0x4000>;
				interrupts = <16>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
			};

			pwm3: pwm@53fa8000 {
				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
				#pwm-cells = <2>;
				reg = <0x53fa8000 0x4000>;
				clocks = <&clks 107>, <&clks 36>;
				clock-names = "ipg", "per";
				interrupts = <41>;
			};

			esdhc1: esdhc@53fb4000 {
				compatible = "fsl,imx25-esdhc";
				reg = <0x53fb4000 0x4000>;
				interrupts = <9>;
				clocks = <&clks 86>, <&clks 63>, <&clks 45>;
				clock-names = "ipg", "ahb", "per";
				status = "disabled";
			};

			esdhc2: esdhc@53fb8000 {
				compatible = "fsl,imx25-esdhc";
				reg = <0x53fb8000 0x4000>;
				interrupts = <8>;
				clocks = <&clks 87>, <&clks 64>, <&clks 46>;
				clock-names = "ipg", "ahb", "per";
				status = "disabled";
			};

			lcdc: lcdc@53fbc000 {
				compatible = "fsl,imx25-fb", "fsl,imx21-fb";
				reg = <0x53fbc000 0x4000>;
				interrupts = <39>;
				clocks = <&clks 103>, <&clks 66>, <&clks 49>;
				clock-names = "ipg", "ahb", "per";
				status = "disabled";
			};

			slcdc@53fc0000 {
				reg = <0x53fc0000 0x4000>;
				interrupts = <38>;
				status = "disabled";
			};

			pwm4: pwm@53fc8000 {
				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
				reg = <0x53fc8000 0x4000>;
				clocks = <&clks 108>, <&clks 36>;
				clock-names = "ipg", "per";
				interrupts = <42>;
			};

			gpio1: gpio@53fcc000 {
				compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
				reg = <0x53fcc000 0x4000>;
				interrupts = <52>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
			};

			gpio2: gpio@53fd0000 {
				compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
				reg = <0x53fd0000 0x4000>;
				interrupts = <51>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
			};

			sdma: sdma@53fd4000 {
				compatible = "fsl,imx25-sdma", "fsl,imx35-sdma";
				reg = <0x53fd4000 0x4000>;
				clocks = <&clks 112>, <&clks 68>;
				clock-names = "ipg", "ahb";
				#dma-cells = <3>;
				interrupts = <34>;
				fsl,sdma-ram-script-name = "imx/sdma/sdma-imx25.bin";
			};

			wdog@53fdc000 {
				compatible = "fsl,imx25-wdt", "fsl,imx21-wdt";
				reg = <0x53fdc000 0x4000>;
				clocks = <&clks 126>;
				clock-names = "";
				interrupts = <55>;
			};

			pwm1: pwm@53fe0000 {
				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
				#pwm-cells = <2>;
				reg = <0x53fe0000 0x4000>;
				clocks = <&clks 105>, <&clks 36>;
				clock-names = "ipg", "per";
				interrupts = <26>;
			};

			iim: iim@53ff0000 {
				compatible = "fsl,imx25-iim", "fsl,imx27-iim";
				reg = <0x53ff0000 0x4000>;
				interrupts = <19>;
				clocks = <&clks 99>;
			};

			usbphy1: usbphy@1 {
				compatible = "nop-usbphy";
				status = "disabled";
			};

			usbphy2: usbphy@2 {
				compatible = "nop-usbphy";
				status = "disabled";
			};

			usbotg: usb@53ff4000 {
				compatible = "fsl,imx25-usb", "fsl,imx27-usb";
				reg = <0x53ff4000 0x0200>;
				interrupts = <37>;
				clocks = <&clks 9>, <&clks 70>, <&clks 8>;
				clock-names = "ipg", "ahb", "per";
				fsl,usbmisc = <&usbmisc 0>;
				status = "disabled";
			};

			usbhost1: usb@53ff4400 {
				compatible = "fsl,imx25-usb", "fsl,imx27-usb";
				reg = <0x53ff4400 0x0200>;
				interrupts = <35>;
				clocks = <&clks 9>, <&clks 70>, <&clks 8>;
				clock-names = "ipg", "ahb", "per";
				fsl,usbmisc = <&usbmisc 1>;
				status = "disabled";
			};

			usbmisc: usbmisc@53ff4600 {
				#index-cells = <1>;
				compatible = "fsl,imx25-usbmisc";
				clocks = <&clks 9>, <&clks 70>, <&clks 8>;
				clock-names = "ipg", "ahb", "per";
				reg = <0x53ff4600 0x00f>;
				status = "disabled";
			};

			dryice@53ffc000 {
				compatible = "fsl,imx25-dryice", "fsl,imx25-rtc";
				reg = <0x53ffc000 0x4000>;
				clocks = <&clks 81>;
				clock-names = "ipg";
				interrupts = <25>;
			};
		};

		emi@80000000 {
			compatible = "fsl,emi-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x80000000 0x3b002000>;
			ranges;

			nfc: nand@bb000000 {
				#address-cells = <1>;
				#size-cells = <1>;

				compatible = "fsl,imx25-nand";
				reg = <0xbb000000 0x2000>;
				clocks = <&clks 50>;
				clock-names = "";
				interrupts = <33>;
				status = "disabled";
			};
		};
	};
};
Commit	Line	Data
5658a68f SH	1	/*
	2	* Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
	3	*
	4	* The code contained herein is licensed under the GNU General Public
	5	* License. You may obtain a copy of the GNU General Public License
	6	* Version 2 or later at the following locations:
	7	*
	8	* http://www.opensource.org/licenses/gpl-license.html
	9	* http://www.gnu.org/copyleft/gpl.html
	10	*/
	11
36dffd8f	12	#include "skeleton.dtsi"
f4db4bc5	13	#include "imx25-pinfunc.h"
5658a68f SH	14
	15	/ {
	16	aliases {
6ed1a0e5 SH	17	gpio0 = &gpio1;
	18	gpio1 = &gpio2;
	19	gpio2 = &gpio3;
	20	gpio3 = &gpio4;
	21	i2c0 = &i2c1;
	22	i2c1 = &i2c2;
	23	i2c2 = &i2c3;
5658a68f SH	24	serial0 = &uart1;
	25	serial1 = &uart2;
	26	serial2 = &uart3;
	27	serial3 = &uart4;
	28	serial4 = &uart5;
6ed1a0e5 SH	29	spi0 = &spi1;
	30	spi1 = &spi2;
	31	spi2 = &spi3;
5658a68f SH	32	usb0 = &usbotg;
	33	usb1 = &usbhost1;
	34	};
	35
070bd7e4 FE	36	cpus {
	37	#address-cells = <0>;
	38	#size-cells = <0>;
	39
	40	cpu {
	41	compatible = "arm,arm926ej-s";
	42	device_type = "cpu";
	43	};
	44	};
	45
5658a68f SH	46	asic: asic-interrupt-controller@68000000 {
	47	compatible = "fsl,imx25-asic", "fsl,avic";
	48	interrupt-controller;
	49	#interrupt-cells = <1>;
	50	reg = <0x68000000 0x8000000>;
	51	};
	52
	53	clocks {
	54	#address-cells = <1>;
	55	#size-cells = <0>;
	56
	57	osc {
	58	compatible = "fsl,imx-osc", "fixed-clock";
	59	clock-frequency = <24000000>;
	60	};
	61	};
	62
	63	soc {
	64	#address-cells = <1>;
	65	#size-cells = <1>;
	66	compatible = "simple-bus";
	67	interrupt-parent = <&asic>;
	68	ranges;
	69
	70	aips@43f00000 { /* AIPS1 */
	71	compatible = "fsl,aips-bus", "simple-bus";
	72	#address-cells = <1>;
	73	#size-cells = <1>;
	74	reg = <0x43f00000 0x100000>;
	75	ranges;
	76
	77	i2c1: i2c@43f80000 {
	78	#address-cells = <1>;
	79	#size-cells = <0>;
	80	compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
	81	reg = <0x43f80000 0x4000>;
	82	clocks = <&clks 48>;
	83	clock-names = "";
	84	interrupts = <3>;
	85	status = "disabled";
	86	};
	87
	88	i2c3: i2c@43f84000 {
	89	#address-cells = <1>;
	90	#size-cells = <0>;
	91	compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
	92	reg = <0x43f84000 0x4000>;
	93	clocks = <&clks 48>;
	94	clock-names = "";
	95	interrupts = <10>;
	96	status = "disabled";
	97	};
	98
	99	can1: can@43f88000 {
	100	compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
	101	reg = <0x43f88000 0x4000>;
	102	interrupts = <43>;
	103	clocks = <&clks 75>, <&clks 75>;
	104	clock-names = "ipg", "per";
	105	status = "disabled";
	106	};
	107
	108	can2: can@43f8c000 {
	109	compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
110	reg = <0x43f8c000 0x4000>;
111	interrupts = <44>;
112	clocks = <&clks 76>, <&clks 76>;
113	clock-names = "ipg", "per";
114	status = "disabled";
115	};
116
117	uart1: serial@43f90000 {
118	compatible = "fsl,imx25-uart", "fsl,imx21-uart";
119	reg = <0x43f90000 0x4000>;
120	interrupts = <45>;
121	clocks = <&clks 120>, <&clks 57>;
122	clock-names = "ipg", "per";
123	status = "disabled";
124	};
125
126	uart2: serial@43f94000 {
127	compatible = "fsl,imx25-uart", "fsl,imx21-uart";
128	reg = <0x43f94000 0x4000>;
129	interrupts = <32>;
130	clocks = <&clks 121>, <&clks 57>;
131	clock-names = "ipg", "per";
132	status = "disabled";
133	};
134
135	i2c2: i2c@43f98000 {
136	#address-cells = <1>;
137	#size-cells = <0>;
138	compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
139	reg = <0x43f98000 0x4000>;
140	clocks = <&clks 48>;
141	clock-names = "";
142	interrupts = <4>;
143	status = "disabled";
144	};
145
146	owire@43f9c000 {
147	#address-cells = <1>;
148	#size-cells = <0>;
149	reg = <0x43f9c000 0x4000>;
150	clocks = <&clks 51>;
151	clock-names = "";
152	interrupts = <2>;
153	status = "disabled";
154	};
155
156	spi1: cspi@43fa4000 {
157	#address-cells = <1>;
158	#size-cells = <0>;
159	compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
160	reg = <0x43fa4000 0x4000>;
37523dc5 JA	161	clocks = <&clks 62>, <&clks 62>;
37523dc5 JA	162	clock-names = "ipg", "per";
5658a68f SH	163	interrupts = <14>;
	164	status = "disabled";
	165	};
	166
	167	kpp@43fa8000 {
	168	#address-cells = <1>;
	169	#size-cells = <0>;
	170	reg = <0x43fa8000 0x4000>;
	171	clocks = <&clks 102>;
	172	clock-names = "";
	173	interrupts = <24>;
	174	status = "disabled";
	175	};
	176
	177	iomuxc@43fac000{
	178	compatible = "fsl,imx25-iomuxc";
	179	reg = <0x43fac000 0x4000>;
	180	};
	181
ec2ea8c1	182	audmux: audmux@43fb0000 {
5658a68f SH	183	compatible = "fsl,imx25-audmux", "fsl,imx31-audmux";
	184	reg = <0x43fb0000 0x4000>;
	185	status = "disabled";
	186	};
	187	};
	188
	189	spba@50000000 {
	190	compatible = "fsl,spba-bus", "simple-bus";
	191	#address-cells = <1>;
	192	#size-cells = <1>;
	193	reg = <0x50000000 0x40000>;
	194	ranges;
	195
	196	spi3: cspi@50004000 {
	197	#address-cells = <1>;
	198	#size-cells = <0>;
	199	compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
	200	reg = <0x50004000 0x4000>;
	201	interrupts = <0>;
37523dc5 JA	202	clocks = <&clks 80>, <&clks 80>;
37523dc5 JA	203	clock-names = "ipg", "per";
5658a68f SH	204	status = "disabled";
	205	};
	206
	207	uart4: serial@50008000 {
	208	compatible = "fsl,imx25-uart", "fsl,imx21-uart";
	209	reg = <0x50008000 0x4000>;
	210	interrupts = <5>;
	211	clocks = <&clks 123>, <&clks 57>;
	212	clock-names = "ipg", "per";
	213	status = "disabled";
	214	};
	215
	216	uart3: serial@5000c000 {
	217	compatible = "fsl,imx25-uart", "fsl,imx21-uart";
	218	reg = <0x5000c000 0x4000>;
	219	interrupts = <18>;
	220	clocks = <&clks 122>, <&clks 57>;
	221	clock-names = "ipg", "per";
	222	status = "disabled";
	223	};
	224
	225	spi2: cspi@50010000 {
	226	#address-cells = <1>;
	227	#size-cells = <0>;
	228	compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
	229	reg = <0x50010000 0x4000>;
37523dc5 JA	230	clocks = <&clks 79>, <&clks 79>;
37523dc5 JA	231	clock-names = "ipg", "per";
5658a68f SH	232	interrupts = <13>;
	233	status = "disabled";
	234	};
	235
	236	ssi2: ssi@50014000 {
	237	compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
	238	reg = <0x50014000 0x4000>;
	239	interrupts = <11>;
7803c620 DC	240	clocks = <&clks 118>;
	241	clock-names = "ipg";
	242	dmas = <&sdma 24 1 0>,
	243	<&sdma 25 1 0>;
	244	dma-names = "rx", "tx";
5658a68f SH	245	status = "disabled";
	246	};
	247
	248	esai@50018000 {
	249	reg = <0x50018000 0x4000>;
	250	interrupts = <7>;
	251	};
	252
	253	uart5: serial@5002c000 {
	254	compatible = "fsl,imx25-uart", "fsl,imx21-uart";
	255	reg = <0x5002c000 0x4000>;
	256	interrupts = <40>;
	257	clocks = <&clks 124>, <&clks 57>;
	258	clock-names = "ipg", "per";
	259	status = "disabled";
	260	};
	261
	262	tsc: tsc@50030000 {
	263	compatible = "fsl,imx25-adc", "fsl,imx21-tsc";
	264	reg = <0x50030000 0x4000>;
	265	interrupts = <46>;
	266	clocks = <&clks 119>;
	267	clock-names = "ipg";
	268	status = "disabled";
	269	};
	270
	271	ssi1: ssi@50034000 {
	272	compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
	273	reg = <0x50034000 0x4000>;
	274	interrupts = <12>;
7803c620 DC	275	clocks = <&clks 117>;
	276	clock-names = "ipg";
	277	dmas = <&sdma 28 1 0>,
	278	<&sdma 29 1 0>;
	279	dma-names = "rx", "tx";
5658a68f SH	280	status = "disabled";
	281	};
	282
	283	fec: ethernet@50038000 {
	284	compatible = "fsl,imx25-fec";
	285	reg = <0x50038000 0x4000>;
	286	interrupts = <57>;
	287	clocks = <&clks 88>, <&clks 65>;
	288	clock-names = "ipg", "ahb";
	289	status = "disabled";
	290	};
	291	};
	292
	293	aips@53f00000 { /* AIPS2 */
	294	compatible = "fsl,aips-bus", "simple-bus";
	295	#address-cells = <1>;
	296	#size-cells = <1>;
	297	reg = <0x53f00000 0x100000>;
	298	ranges;
	299
	300	clks: ccm@53f80000 {
	301	compatible = "fsl,imx25-ccm";
	302	reg = <0x53f80000 0x4000>;
	303	interrupts = <31>;
	304	#clock-cells = <1>;
	305	};
	306
	307	gpt4: timer@53f84000 {
	308	compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
	309	reg = <0x53f84000 0x4000>;
	310	clocks = <&clks 9>, <&clks 45>;
	311	clock-names = "ipg", "per";
	312	interrupts = <1>;
	313	};
	314
	315	gpt3: timer@53f88000 {
	316	compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
	317	reg = <0x53f88000 0x4000>;
	318	clocks = <&clks 9>, <&clks 47>;
	319	clock-names = "ipg", "per";
	320	interrupts = <29>;
	321	};
	322
	323	gpt2: timer@53f8c000 {
	324	compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
	325	reg = <0x53f8c000 0x4000>;
	326	clocks = <&clks 9>, <&clks 47>;
	327	clock-names = "ipg", "per";
	328	interrupts = <53>;
	329	};
	330
	331	gpt1: timer@53f90000 {
	332	compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
	333	reg = <0x53f90000 0x4000>;
	334	clocks = <&clks 9>, <&clks 47>;
	335	clock-names = "ipg", "per";
	336	interrupts = <54>;
	337	};
	338
	339	epit1: timer@53f94000 {
	340	compatible = "fsl,imx25-epit";
	341	reg = <0x53f94000 0x4000>;
	342	interrupts = <28>;
	343	};
344
345	epit2: timer@53f98000 {
346	compatible = "fsl,imx25-epit";
347	reg = <0x53f98000 0x4000>;
348	interrupts = <27>;
349	};
350
351	gpio4: gpio@53f9c000 {
352	compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
353	reg = <0x53f9c000 0x4000>;
354	interrupts = <23>;
355	gpio-controller;
356	#gpio-cells = <2>;
357	interrupt-controller;
358	#interrupt-cells = <2>;
359	};
360
361	pwm2: pwm@53fa0000 {
362	compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
363	#pwm-cells = <2>;
364	reg = <0x53fa0000 0x4000>;
365	clocks = <&clks 106>, <&clks 36>;
366	clock-names = "ipg", "per";
367	interrupts = <36>;
368	};
369
370	gpio3: gpio@53fa4000 {
371	compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
372	reg = <0x53fa4000 0x4000>;
373	interrupts = <16>;
374	gpio-controller;
375	#gpio-cells = <2>;
376	interrupt-controller;
377	#interrupt-cells = <2>;
378	};
379
380	pwm3: pwm@53fa8000 {
381	compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
382	#pwm-cells = <2>;
383	reg = <0x53fa8000 0x4000>;
384	clocks = <&clks 107>, <&clks 36>;
385	clock-names = "ipg", "per";
386	interrupts = <41>;
387	};
388
389	esdhc1: esdhc@53fb4000 {
390	compatible = "fsl,imx25-esdhc";
391	reg = <0x53fb4000 0x4000>;
392	interrupts = <9>;
393	clocks = <&clks 86>, <&clks 63>, <&clks 45>;
394	clock-names = "ipg", "ahb", "per";
395	status = "disabled";
396	};
397
398	esdhc2: esdhc@53fb8000 {
399	compatible = "fsl,imx25-esdhc";
400	reg = <0x53fb8000 0x4000>;
401	interrupts = <8>;
402	clocks = <&clks 87>, <&clks 64>, <&clks 46>;
403	clock-names = "ipg", "ahb", "per";
404	status = "disabled";
405	};
406
c770f7c0 MW	407	lcdc: lcdc@53fbc000 {
c770f7c0 MW	408	compatible = "fsl,imx25-fb", "fsl,imx21-fb";
5658a68f SH	409	reg = <0x53fbc000 0x4000>;
	410	interrupts = <39>;
	411	clocks = <&clks 103>, <&clks 66>, <&clks 49>;
	412	clock-names = "ipg", "ahb", "per";
	413	status = "disabled";
	414	};
	415
	416	slcdc@53fc0000 {
	417	reg = <0x53fc0000 0x4000>;
	418	interrupts = <38>;
	419	status = "disabled";
	420	};
	421
	422	pwm4: pwm@53fc8000 {
	423	compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
	424	reg = <0x53fc8000 0x4000>;
	425	clocks = <&clks 108>, <&clks 36>;
	426	clock-names = "ipg", "per";
	427	interrupts = <42>;
	428	};
	429
	430	gpio1: gpio@53fcc000 {
	431	compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
	432	reg = <0x53fcc000 0x4000>;
	433	interrupts = <52>;
	434	gpio-controller;
	435	#gpio-cells = <2>;
	436	interrupt-controller;
	437	#interrupt-cells = <2>;
	438	};
	439
	440	gpio2: gpio@53fd0000 {
	441	compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
	442	reg = <0x53fd0000 0x4000>;
	443	interrupts = <51>;
	444	gpio-controller;
	445	#gpio-cells = <2>;
	446	interrupt-controller;
	447	#interrupt-cells = <2>;
	448	};
	449
7803c620	450	sdma: sdma@53fd4000 {
5658a68f SH	451	compatible = "fsl,imx25-sdma", "fsl,imx35-sdma";
	452	reg = <0x53fd4000 0x4000>;
	453	clocks = <&clks 112>, <&clks 68>;
	454	clock-names = "ipg", "ahb";
fb72bb21	455	#dma-cells = <3>;
5658a68f	456	interrupts = <34>;
cabd1b29	457	fsl,sdma-ram-script-name = "imx/sdma/sdma-imx25.bin";
5658a68f SH	458	};
	459
	460	wdog@53fdc000 {
	461	compatible = "fsl,imx25-wdt", "fsl,imx21-wdt";
	462	reg = <0x53fdc000 0x4000>;
	463	clocks = <&clks 126>;
	464	clock-names = "";
	465	interrupts = <55>;
	466	};
	467
	468	pwm1: pwm@53fe0000 {
	469	compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
	470	#pwm-cells = <2>;
	471	reg = <0x53fe0000 0x4000>;
	472	clocks = <&clks 105>, <&clks 36>;
	473	clock-names = "ipg", "per";
	474	interrupts = <26>;
	475	};
	476
684f6a23 SH	477	iim: iim@53ff0000 {
	478	compatible = "fsl,imx25-iim", "fsl,imx27-iim";
	479	reg = <0x53ff0000 0x4000>;
	480	interrupts = <19>;
	481	clocks = <&clks 99>;
	482	};
	483
5658a68f SH	484	usbphy1: usbphy@1 {
	485	compatible = "nop-usbphy";
	486	status = "disabled";
	487	};
	488
	489	usbphy2: usbphy@2 {
	490	compatible = "nop-usbphy";
	491	status = "disabled";
	492	};
	493
	494	usbotg: usb@53ff4000 {
	495	compatible = "fsl,imx25-usb", "fsl,imx27-usb";
	496	reg = <0x53ff4000 0x0200>;
	497	interrupts = <37>;
	498	clocks = <&clks 9>, <&clks 70>, <&clks 8>;
	499	clock-names = "ipg", "ahb", "per";
	500	fsl,usbmisc = <&usbmisc 0>;
	501	status = "disabled";
	502	};
	503
	504	usbhost1: usb@53ff4400 {
	505	compatible = "fsl,imx25-usb", "fsl,imx27-usb";
	506	reg = <0x53ff4400 0x0200>;
	507	interrupts = <35>;
	508	clocks = <&clks 9>, <&clks 70>, <&clks 8>;
	509	clock-names = "ipg", "ahb", "per";
	510	fsl,usbmisc = <&usbmisc 1>;
	511	status = "disabled";
	512	};
	513
	514	usbmisc: usbmisc@53ff4600 {
	515	#index-cells = <1>;
	516	compatible = "fsl,imx25-usbmisc";
	517	clocks = <&clks 9>, <&clks 70>, <&clks 8>;
	518	clock-names = "ipg", "ahb", "per";
	519	reg = <0x53ff4600 0x00f>;
	520	status = "disabled";
	521	};
	522
	523	dryice@53ffc000 {
	524	compatible = "fsl,imx25-dryice", "fsl,imx25-rtc";
	525	reg = <0x53ffc000 0x4000>;
	526	clocks = <&clks 81>;
	527	clock-names = "ipg";
	528	interrupts = <25>;
	529	};
	530	};
	531
	532	emi@80000000 {
	533	compatible = "fsl,emi-bus", "simple-bus";
	534	#address-cells = <1>;
	535	#size-cells = <1>;
	536	reg = <0x80000000 0x3b002000>;
	537	ranges;
	538
be4ccfce	539	nfc: nand@bb000000 {
5658a68f SH	540	#address-cells = <1>;
	541	#size-cells = <1>;
	542
	543	compatible = "fsl,imx25-nand";
	544	reg = <0xbb000000 0x2000>;
	545	clocks = <&clks 50>;
	546	clock-names = "";
	547	interrupts = <33>;
	548	status = "disabled";
	549	};
	550	};
	551	};
	552	};