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5349f2a8 FE |
1 | /* |
2 | * Copyright 2012 Sascha Hauer, Pengutronix | |
3 | * | |
4 | * The code contained herein is licensed under the GNU General Public | |
5 | * License. You may obtain a copy of the GNU General Public License | |
6 | * Version 2 or later at the following locations: | |
7 | * | |
8 | * http://www.opensource.org/licenses/gpl-license.html | |
9 | * http://www.gnu.org/copyleft/gpl.html | |
10 | */ | |
11 | ||
12 | /dts-v1/; | |
36dffd8f | 13 | #include "imx27.dtsi" |
5349f2a8 FE |
14 | |
15 | / { | |
991eb585 FE |
16 | model = "Freescale i.MX27 Product Development Kit"; |
17 | compatible = "fsl,imx27-pdk", "fsl,imx27"; | |
5349f2a8 FE |
18 | |
19 | memory { | |
88308edd | 20 | reg = <0xa0000000 0x08000000>; |
5349f2a8 | 21 | }; |
be4ccfce | 22 | }; |
5349f2a8 | 23 | |
2636c1e2 FE |
24 | &cspi2 { |
25 | pinctrl-names = "default"; | |
26 | pinctrl-0 = <&pinctrl_cspi2>; | |
27 | fsl,spi-num-chipselects = <1>; | |
28 | cs-gpios = <&gpio4 21 GPIO_ACTIVE_HIGH>; | |
29 | status = "okay"; | |
30 | ||
31 | pmic: mc13783@0 { | |
32 | #address-cells = <1>; | |
33 | #size-cells = <0>; | |
34 | compatible = "fsl,mc13783"; | |
35 | reg = <0>; | |
36 | spi-cs-high; | |
37 | spi-max-frequency = <1000000>; | |
38 | interrupt-parent = <&gpio3>; | |
39 | interrupts = <14 IRQ_TYPE_LEVEL_HIGH>; | |
40 | ||
41 | regulators { | |
42 | vgen_reg: vgen { | |
43 | regulator-min-microvolt = <1500000>; | |
44 | regulator-max-microvolt = <1500000>; | |
45 | regulator-always-on; | |
46 | regulator-boot-on; | |
47 | }; | |
48 | ||
49 | vmmc1_reg: vmmc1 { | |
50 | regulator-min-microvolt = <1600000>; | |
51 | regulator-max-microvolt = <3000000>; | |
52 | }; | |
53 | ||
54 | gpo1_reg: gpo1 { | |
55 | regulator-always-on; | |
56 | regulator-boot-on; | |
57 | }; | |
58 | ||
59 | gpo3_reg: gpo3 { | |
60 | regulator-always-on; | |
61 | regulator-boot-on; | |
62 | }; | |
63 | }; | |
64 | }; | |
65 | }; | |
09c7450c FE |
66 | |
67 | &fec { | |
702fbb89 FE |
68 | phy-mode = "mii"; |
69 | pinctrl-names = "default"; | |
70 | pinctrl-0 = <&pinctrl_fec>; | |
be4ccfce SG |
71 | status = "okay"; |
72 | }; | |
5349f2a8 | 73 | |
09c7450c FE |
74 | &uart1 { |
75 | fsl,uart-has-rtscts; | |
e5877326 FE |
76 | pinctrl-names = "default"; |
77 | pinctrl-0 = <&pinctrl_uart1>; | |
be4ccfce | 78 | status = "okay"; |
5349f2a8 | 79 | }; |
e5877326 FE |
80 | |
81 | &iomuxc { | |
82 | imx27-pdk { | |
2636c1e2 FE |
83 | pinctrl_cspi2: cspi2grp { |
84 | fsl,pins = < | |
85 | MX27_PAD_CSPI2_MISO__CSPI2_MISO 0x0 | |
86 | MX27_PAD_CSPI2_MOSI__CSPI2_MOSI 0x0 | |
87 | MX27_PAD_CSPI2_SCLK__CSPI2_SCLK 0x0 | |
88 | MX27_PAD_CSPI2_SS0__GPIO4_21 0x0 /* SPI2 CS0 */ | |
89 | MX27_PAD_TOUT__GPIO3_14 0x0 /* PMIC IRQ */ | |
90 | >; | |
91 | }; | |
92 | ||
702fbb89 FE |
93 | pinctrl_fec: fecgrp { |
94 | fsl,pins = < | |
95 | MX27_PAD_SD3_CMD__FEC_TXD0 0x0 | |
96 | MX27_PAD_SD3_CLK__FEC_TXD1 0x0 | |
97 | MX27_PAD_ATA_DATA0__FEC_TXD2 0x0 | |
98 | MX27_PAD_ATA_DATA1__FEC_TXD3 0x0 | |
99 | MX27_PAD_ATA_DATA2__FEC_RX_ER 0x0 | |
100 | MX27_PAD_ATA_DATA3__FEC_RXD1 0x0 | |
101 | MX27_PAD_ATA_DATA4__FEC_RXD2 0x0 | |
102 | MX27_PAD_ATA_DATA5__FEC_RXD3 0x0 | |
103 | MX27_PAD_ATA_DATA6__FEC_MDIO 0x0 | |
104 | MX27_PAD_ATA_DATA7__FEC_MDC 0x0 | |
105 | MX27_PAD_ATA_DATA8__FEC_CRS 0x0 | |
106 | MX27_PAD_ATA_DATA9__FEC_TX_CLK 0x0 | |
107 | MX27_PAD_ATA_DATA10__FEC_RXD0 0x0 | |
108 | MX27_PAD_ATA_DATA11__FEC_RX_DV 0x0 | |
109 | MX27_PAD_ATA_DATA12__FEC_RX_CLK 0x0 | |
110 | MX27_PAD_ATA_DATA13__FEC_COL 0x0 | |
111 | MX27_PAD_ATA_DATA14__FEC_TX_ER 0x0 | |
112 | MX27_PAD_ATA_DATA15__FEC_TX_EN 0x0 | |
113 | >; | |
114 | }; | |
115 | ||
e5877326 FE |
116 | pinctrl_uart1: uart1grp { |
117 | fsl,pins = < | |
118 | MX27_PAD_UART1_TXD__UART1_TXD 0x0 | |
119 | MX27_PAD_UART1_RXD__UART1_RXD 0x0 | |
120 | MX27_PAD_UART1_CTS__UART1_CTS 0x0 | |
121 | MX27_PAD_UART1_RTS__UART1_RTS 0x0 | |
122 | >; | |
123 | }; | |
124 | }; | |
125 | }; |