[mirror_ubuntu-artful-kernel.git] / arch / arm / boot / dts / imx27-phytec-phycore-rdk.dts

/*
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

#include "imx27-phytec-phycore-som.dtsi"

/ {
	model = "Phytec pcm970";
	compatible = "phytec,imx27-pcm970", "phytec,imx27-pcm038", "fsl,imx27";

	display0: LQ035Q7 {
		model = "Sharp-LQ035Q7";
		native-mode = <&timing0>;
		bits-per-pixel = <16>;
		fsl,pcr = <0xf00080c0>;

		display-timings {
			timing0: 240x320 {
				clock-frequency = <5500000>;
				hactive = <240>;
				vactive = <320>;
				hback-porch = <5>;
				hsync-len = <7>;
				hfront-porch = <16>;
				vback-porch = <7>;
				vsync-len = <1>;
				vfront-porch = <9>;
				pixelclk-active = <1>;
				hsync-active = <1>;
				vsync-active = <1>;
				de-active = <0>;
			};
		};
	};

	regulators {
		regulator@2 {
			compatible = "regulator-fixed";
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_csien>;
			reg = <2>;
			regulator-name = "CSI_EN";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			gpio = <&gpio2 24 GPIO_ACTIVE_LOW>;
			regulator-always-on;
		};
	};

	usbphy {
		usbphy2: usbphy@2 {
			compatible = "usb-nop-xceiv";
			reg = <2>;
			vcc-supply = <&reg_5v0>;
			clocks = <&clks 0>;
			clock-names = "main_clk";
		};
	};
};

&cspi1 {
	pinctrl-0 = <&pinctrl_cspi1>, <&pinctrl_cspi1cs1>;
	fsl,spi-num-chipselects = <2>;
	cs-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>,
		   <&gpio4 27 GPIO_ACTIVE_LOW>;
};

&fb {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_imxfb1>;
	display = <&display0>;
	lcd-supply = <&reg_5v0>;
	fsl,dmacr = <0x00020010>;
	fsl,lscr1 = <0x00120300>;
	fsl,lpccr = <0x00a903ff>;
	status = "okay";
};

&i2c1 {
	clock-frequency = <400000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";

	camgpio: pca9536@41 {
		compatible = "nxp,pca9536";
		reg = <0x41>;
		gpio-controller;
		#gpio-cells = <2>;
	};
};

&iomuxc {
	imx27_phycore_rdk {
		pinctrl_csien: csiengrp {
			fsl,pins = <
				MX27_PAD_USB_OC_B__GPIO2_24 0x0
			>;
		};

		pinctrl_cspi1cs1: cspi1cs1grp {
			fsl,pins = <
				MX27_PAD_CSPI1_SS1__GPIO4_27 0x0
			>;
		};

		pinctrl_imxfb1: imxfbgrp {
			fsl,pins = <
				MX27_PAD_LD0__LD0 0x0
				MX27_PAD_LD1__LD1 0x0
				MX27_PAD_LD2__LD2 0x0
				MX27_PAD_LD3__LD3 0x0
				MX27_PAD_LD4__LD4 0x0
				MX27_PAD_LD5__LD5 0x0
				MX27_PAD_LD6__LD6 0x0
				MX27_PAD_LD7__LD7 0x0
				MX27_PAD_LD8__LD8 0x0
				MX27_PAD_LD9__LD9 0x0
				MX27_PAD_LD10__LD10 0x0
				MX27_PAD_LD11__LD11 0x0
				MX27_PAD_LD12__LD12 0x0
				MX27_PAD_LD13__LD13 0x0
				MX27_PAD_LD14__LD14 0x0
				MX27_PAD_LD15__LD15 0x0
				MX27_PAD_LD16__LD16 0x0
				MX27_PAD_LD17__LD17 0x0
				MX27_PAD_CLS__CLS 0x0
				MX27_PAD_CONTRAST__CONTRAST 0x0
				MX27_PAD_LSCLK__LSCLK 0x0
				MX27_PAD_OE_ACD__OE_ACD 0x0
				MX27_PAD_PS__PS 0x0
				MX27_PAD_REV__REV 0x0
				MX27_PAD_SPL_SPR__SPL_SPR 0x0
				MX27_PAD_HSYNC__HSYNC 0x0
				MX27_PAD_VSYNC__VSYNC 0x0
			>;
		};

		pinctrl_i2c1: i2c1grp {
			/* Add pullup to DATA line */
			fsl,pins = <
				MX27_PAD_I2C_DATA__I2C_DATA	0x1
				MX27_PAD_I2C_CLK__I2C_CLK	0x0
			>;
		};

		pinctrl_owire1: owire1grp {
			fsl,pins = <
				MX27_PAD_RTCK__OWIRE 0x0
			>;
		};

		pinctrl_sdhc2: sdhc2grp {
			fsl,pins = <
				MX27_PAD_SD2_CLK__SD2_CLK 0x0
				MX27_PAD_SD2_CMD__SD2_CMD 0x0
				MX27_PAD_SD2_D0__SD2_D0 0x0
				MX27_PAD_SD2_D1__SD2_D1 0x0
				MX27_PAD_SD2_D2__SD2_D2 0x0
				MX27_PAD_SD2_D3__SD2_D3 0x0
				MX27_PAD_SSI3_FS__GPIO3_28	0x0 /* WP */
				MX27_PAD_SSI3_RXDAT__GPIO3_29	0x0 /* CD */
			>;
		};

		pinctrl_uart1: uart1grp {
			fsl,pins = <
				MX27_PAD_UART1_TXD__UART1_TXD 0x0
				MX27_PAD_UART1_RXD__UART1_RXD 0x0
				MX27_PAD_UART1_CTS__UART1_CTS 0x0
				MX27_PAD_UART1_RTS__UART1_RTS 0x0
			>;
		};

		pinctrl_uart2: uart2grp {
			fsl,pins = <
				MX27_PAD_UART2_TXD__UART2_TXD 0x0
				MX27_PAD_UART2_RXD__UART2_RXD 0x0
				MX27_PAD_UART2_CTS__UART2_CTS 0x0
				MX27_PAD_UART2_RTS__UART2_RTS 0x0
			>;
		};

		pinctrl_usbh2: usbh2grp {
			fsl,pins = <
				MX27_PAD_USBH2_CLK__USBH2_CLK 0x0
				MX27_PAD_USBH2_DIR__USBH2_DIR 0x0
				MX27_PAD_USBH2_NXT__USBH2_NXT 0x0
				MX27_PAD_USBH2_STP__USBH2_STP 0x0
				MX27_PAD_CSPI2_SCLK__USBH2_DATA0 0x0
				MX27_PAD_CSPI2_MOSI__USBH2_DATA1 0x0
				MX27_PAD_CSPI2_MISO__USBH2_DATA2 0x0
				MX27_PAD_CSPI2_SS1__USBH2_DATA3 0x0
				MX27_PAD_CSPI2_SS2__USBH2_DATA4 0x0
				MX27_PAD_CSPI1_SS2__USBH2_DATA5 0x0
				MX27_PAD_CSPI2_SS0__USBH2_DATA6 0x0
				MX27_PAD_USBH2_DATA7__USBH2_DATA7 0x0
			>;
		};

		pinctrl_weim: weimgrp {
			fsl,pins = <
				MX27_PAD_CS4_B__CS4_B		0x0 /* CS4 */
				MX27_PAD_SD1_D1__GPIO5_19	0x0 /* CAN IRQ */
			>;
		};
	};
};

&owire {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_owire1>;
	status = "okay";
};

&pmicleds {
	ledr1: led@3 {
		reg = <3>;
		label = "system:red1:user";
	};

	ledg1: led@4 {
		reg = <4>;
		label = "system:green1:user";
	};

	ledb1: led@5 {
		reg = <5>;
		label = "system:blue1:user";
	};

	ledr2: led@6 {
		reg = <6>;
		label = "system:red2:user";
	};

	ledg2: led@7 {
		reg = <7>;
		label = "system:green2:user";
	};

	ledb2: led@8 {
		reg = <8>;
		label = "system:blue2:user";
	};

	ledr3: led@9 {
		reg = <9>;
		label = "system:red3:nand";
		linux,default-trigger = "nand-disk";
	};

	ledg3: led@10 {
		reg = <10>;
		label = "system:green3:live";
		linux,default-trigger = "heartbeat";
	};

	ledb3: led@11 {
		reg = <11>;
		label = "system:blue3:cpu";
		linux,default-trigger = "cpu0";
	};
};

&sdhci2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_sdhc2>;
	bus-width = <4>;
	cd-gpios = <&gpio3 29 GPIO_ACTIVE_HIGH>;
	wp-gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>;
	vmmc-supply = <&vmmc1_reg>;
	status = "okay";
};

&uart1 {
	fsl,uart-has-rtscts;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	status = "okay";
};

&uart2 {
	fsl,uart-has-rtscts;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	status = "okay";
};

&usbh2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbh2>;
	dr_mode = "host";
	phy_type = "ulpi";
	vbus-supply = <&reg_5v0>;
	fsl,usbphy = <&usbphy2>;
	disable-over-current;
	status = "okay";
};

&weim {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_weim>;

	can@4,0 {
		compatible = "nxp,sja1000";
		reg = <4 0x00000000 0x00000100>;
		interrupt-parent = <&gpio5>;
		interrupts = <19 IRQ_TYPE_EDGE_FALLING>;
		nxp,external-clock-frequency = <16000000>;
		nxp,tx-output-config = <0x16>;
		nxp,no-comparator-bypass;
		fsl,weim-cs-timing = <0x0000dcf6 0x444a0301 0x44443302>;
	};
};
Commit	Line	Data
c05c1bf5 AS	1	/*
	2	* The code contained herein is licensed under the GNU General Public
	3	* License. You may obtain a copy of the GNU General Public License
	4	* Version 2 or later at the following locations:
	5	*
	6	* http://www.opensource.org/licenses/gpl-license.html
	7	* http://www.gnu.org/copyleft/gpl.html
	8	*/
	9
e3da3d21	10	#include "imx27-phytec-phycore-som.dtsi"
c05c1bf5 AS	11
	12	/ {
	13	model = "Phytec pcm970";
	14	compatible = "phytec,imx27-pcm970", "phytec,imx27-pcm038", "fsl,imx27";
8994181a AS	15
	16	display0: LQ035Q7 {
	17	model = "Sharp-LQ035Q7";
	18	native-mode = <&timing0>;
	19	bits-per-pixel = <16>;
	20	fsl,pcr = <0xf00080c0>;
	21
	22	display-timings {
	23	timing0: 240x320 {
	24	clock-frequency = <5500000>;
	25	hactive = <240>;
	26	vactive = <320>;
	27	hback-porch = <5>;
	28	hsync-len = <7>;
	29	hfront-porch = <16>;
	30	vback-porch = <7>;
	31	vsync-len = <1>;
	32	vfront-porch = <9>;
6a21e4bb AS	33	pixelclk-active = <1>;
	34	hsync-active = <1>;
	35	vsync-active = <1>;
	36	de-active = <0>;
8994181a AS	37	};
	38	};
	39	};
af38a003	40
09e96a89 AS	41	regulators {
	42	regulator@2 {
	43	compatible = "regulator-fixed";
	44	pinctrl-names = "default";
	45	pinctrl-0 = <&pinctrl_csien>;
	46	reg = <2>;
	47	regulator-name = "CSI_EN";
	48	regulator-min-microvolt = <3300000>;
	49	regulator-max-microvolt = <3300000>;
	50	gpio = <&gpio2 24 GPIO_ACTIVE_LOW>;
	51	regulator-always-on;
	52	};
	53	};
	54
af38a003	55	usbphy {
af38a003 FE	56	usbphy2: usbphy@2 {
af38a003 FE	57	compatible = "usb-nop-xceiv";
9af11873	58	reg = <2>;
af38a003 FE	59	vcc-supply = <&reg_5v0>;
	60	clocks = <&clks 0>;
	61	clock-names = "main_clk";
	62	};
	63	};
c05c1bf5 AS	64	};
	65
	66	&cspi1 {
e8e8d621	67	pinctrl-0 = <&pinctrl_cspi1>, <&pinctrl_cspi1cs1>;
c05c1bf5	68	fsl,spi-num-chipselects = <2>;
6ece55b3 AS	69	cs-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>,
6ece55b3 AS	70	<&gpio4 27 GPIO_ACTIVE_LOW>;
c05c1bf5 AS	71	};
c05c1bf5 AS	72
8994181a AS	73	&fb {
	74	pinctrl-names = "default";
	75	pinctrl-0 = <&pinctrl_imxfb1>;
	76	display = <&display0>;
	77	lcd-supply = <&reg_5v0>;
	78	fsl,dmacr = <0x00020010>;
	79	fsl,lscr1 = <0x00120300>;
	80	fsl,lpccr = <0x00a903ff>;
	81	status = "okay";
	82	};
	83
5f9fe244 AS	84	&i2c1 {
	85	clock-frequency = <400000>;
	86	pinctrl-names = "default";
	87	pinctrl-0 = <&pinctrl_i2c1>;
	88	status = "okay";
	89
	90	camgpio: pca9536@41 {
	91	compatible = "nxp,pca9536";
	92	reg = <0x41>;
	93	gpio-controller;
	94	#gpio-cells = <2>;
	95	};
	96	};
	97
26508cb7 MP	98	&iomuxc {
26508cb7 MP	99	imx27_phycore_rdk {
09e96a89 AS	100	pinctrl_csien: csiengrp {
	101	fsl,pins = <
	102	MX27_PAD_USB_OC_B__GPIO2_24 0x0
	103	>;
	104	};
	105
e8e8d621 AS	106	pinctrl_cspi1cs1: cspi1cs1grp {
	107	fsl,pins = <
	108	MX27_PAD_CSPI1_SS1__GPIO4_27 0x0
	109	>;
	110	};
	111
8994181a AS	112	pinctrl_imxfb1: imxfbgrp {
	113	fsl,pins = <
	114	MX27_PAD_LD0__LD0 0x0
	115	MX27_PAD_LD1__LD1 0x0
	116	MX27_PAD_LD2__LD2 0x0
	117	MX27_PAD_LD3__LD3 0x0
	118	MX27_PAD_LD4__LD4 0x0
	119	MX27_PAD_LD5__LD5 0x0
	120	MX27_PAD_LD6__LD6 0x0
	121	MX27_PAD_LD7__LD7 0x0
	122	MX27_PAD_LD8__LD8 0x0
	123	MX27_PAD_LD9__LD9 0x0
	124	MX27_PAD_LD10__LD10 0x0
	125	MX27_PAD_LD11__LD11 0x0
	126	MX27_PAD_LD12__LD12 0x0
	127	MX27_PAD_LD13__LD13 0x0
	128	MX27_PAD_LD14__LD14 0x0
	129	MX27_PAD_LD15__LD15 0x0
	130	MX27_PAD_LD16__LD16 0x0
	131	MX27_PAD_LD17__LD17 0x0
	132	MX27_PAD_CLS__CLS 0x0
	133	MX27_PAD_CONTRAST__CONTRAST 0x0
	134	MX27_PAD_LSCLK__LSCLK 0x0
	135	MX27_PAD_OE_ACD__OE_ACD 0x0
	136	MX27_PAD_PS__PS 0x0
	137	MX27_PAD_REV__REV 0x0
	138	MX27_PAD_SPL_SPR__SPL_SPR 0x0
	139	MX27_PAD_HSYNC__HSYNC 0x0
	140	MX27_PAD_VSYNC__VSYNC 0x0
	141	>;
	142	};
	143
5f9fe244 AS	144	pinctrl_i2c1: i2c1grp {
	145	/* Add pullup to DATA line */
	146	fsl,pins = <
	147	MX27_PAD_I2C_DATA__I2C_DATA 0x1
	148	MX27_PAD_I2C_CLK__I2C_CLK 0x0
	149	>;
	150	};
	151
5e01e585 AS	152	pinctrl_owire1: owire1grp {
	153	fsl,pins = <
	154	MX27_PAD_RTCK__OWIRE 0x0
	155	>;
	156	};
	157
836ac783 AS	158	pinctrl_sdhc2: sdhc2grp {
	159	fsl,pins = <
	160	MX27_PAD_SD2_CLK__SD2_CLK 0x0
	161	MX27_PAD_SD2_CMD__SD2_CMD 0x0
	162	MX27_PAD_SD2_D0__SD2_D0 0x0
	163	MX27_PAD_SD2_D1__SD2_D1 0x0
	164	MX27_PAD_SD2_D2__SD2_D2 0x0
	165	MX27_PAD_SD2_D3__SD2_D3 0x0
	166	MX27_PAD_SSI3_FS__GPIO3_28 0x0 /* WP */
	167	MX27_PAD_SSI3_RXDAT__GPIO3_29 0x0 /* CD */
	168	>;
	169	};
	170
26508cb7 MP	171	pinctrl_uart1: uart1grp {
	172	fsl,pins = <
	173	MX27_PAD_UART1_TXD__UART1_TXD 0x0
	174	MX27_PAD_UART1_RXD__UART1_RXD 0x0
	175	MX27_PAD_UART1_CTS__UART1_CTS 0x0
	176	MX27_PAD_UART1_RTS__UART1_RTS 0x0
	177	>;
	178	};
	179
	180	pinctrl_uart2: uart2grp {
	181	fsl,pins = <
	182	MX27_PAD_UART2_TXD__UART2_TXD 0x0
	183	MX27_PAD_UART2_RXD__UART2_RXD 0x0
	184	MX27_PAD_UART2_CTS__UART2_CTS 0x0
	185	MX27_PAD_UART2_RTS__UART2_RTS 0x0
	186	>;
	187	};
3c6c9eeb	188
9089ce52 AS	189	pinctrl_usbh2: usbh2grp {
	190	fsl,pins = <
	191	MX27_PAD_USBH2_CLK__USBH2_CLK 0x0
	192	MX27_PAD_USBH2_DIR__USBH2_DIR 0x0
	193	MX27_PAD_USBH2_NXT__USBH2_NXT 0x0
	194	MX27_PAD_USBH2_STP__USBH2_STP 0x0
	195	MX27_PAD_CSPI2_SCLK__USBH2_DATA0 0x0
	196	MX27_PAD_CSPI2_MOSI__USBH2_DATA1 0x0
	197	MX27_PAD_CSPI2_MISO__USBH2_DATA2 0x0
	198	MX27_PAD_CSPI2_SS1__USBH2_DATA3 0x0
	199	MX27_PAD_CSPI2_SS2__USBH2_DATA4 0x0
	200	MX27_PAD_CSPI1_SS2__USBH2_DATA5 0x0
	201	MX27_PAD_CSPI2_SS0__USBH2_DATA6 0x0
	202	MX27_PAD_USBH2_DATA7__USBH2_DATA7 0x0
	203	>;
	204	};
	205
3c6c9eeb AS	206	pinctrl_weim: weimgrp {
	207	fsl,pins = <
	208	MX27_PAD_CS4_B__CS4_B 0x0 /* CS4 */
	209	MX27_PAD_SD1_D1__GPIO5_19 0x0 /* CAN IRQ */
	210	>;
	211	};
26508cb7 MP	212	};
	213	};
	214
5e01e585 AS	215	&owire {
	216	pinctrl-names = "default";
	217	pinctrl-0 = <&pinctrl_owire1>;
	218	status = "okay";
	219	};
	220
5ee49a11 AS	221	&pmicleds {
	222	ledr1: led@3 {
	223	reg = <3>;
	224	label = "system:red1:user";
	225	};
	226
	227	ledg1: led@4 {
	228	reg = <4>;
	229	label = "system:green1:user";
	230	};
	231
	232	ledb1: led@5 {
	233	reg = <5>;
	234	label = "system:blue1:user";
	235	};
	236
	237	ledr2: led@6 {
	238	reg = <6>;
	239	label = "system:red2:user";
	240	};
	241
	242	ledg2: led@7 {
	243	reg = <7>;
	244	label = "system:green2:user";
	245	};
	246
	247	ledb2: led@8 {
	248	reg = <8>;
	249	label = "system:blue2:user";
	250	};
	251
	252	ledr3: led@9 {
	253	reg = <9>;
	254	label = "system:red3:nand";
	255	linux,default-trigger = "nand-disk";
	256	};
	257
	258	ledg3: led@10 {
	259	reg = <10>;
	260	label = "system:green3:live";
	261	linux,default-trigger = "heartbeat";
	262	};
	263
	264	ledb3: led@11 {
	265	reg = <11>;
	266	label = "system:blue3:cpu";
	267	linux,default-trigger = "cpu0";
	268	};
	269	};
	270
8440ae70	271	&sdhci2 {
836ac783 AS	272	pinctrl-names = "default";
836ac783 AS	273	pinctrl-0 = <&pinctrl_sdhc2>;
8440ae70	274	bus-width = <4>;
6ece55b3 AS	275	cd-gpios = <&gpio3 29 GPIO_ACTIVE_HIGH>;
6ece55b3 AS	276	wp-gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>;
8440ae70 AS	277	vmmc-supply = <&vmmc1_reg>;
	278	status = "okay";
	279	};
	280
c05c1bf5 AS	281	&uart1 {
c05c1bf5 AS	282	fsl,uart-has-rtscts;
26508cb7 MP	283	pinctrl-names = "default";
26508cb7 MP	284	pinctrl-0 = <&pinctrl_uart1>;
858db316	285	status = "okay";
c05c1bf5 AS	286	};
	287
	288	&uart2 {
	289	fsl,uart-has-rtscts;
26508cb7 MP	290	pinctrl-names = "default";
26508cb7 MP	291	pinctrl-0 = <&pinctrl_uart2>;
c05c1bf5 AS	292	status = "okay";
c05c1bf5 AS	293	};
52303d13	294
9089ce52 AS	295	&usbh2 {
	296	pinctrl-names = "default";
	297	pinctrl-0 = <&pinctrl_usbh2>;
	298	dr_mode = "host";
	299	phy_type = "ulpi";
	300	vbus-supply = <&reg_5v0>;
af38a003	301	fsl,usbphy = <&usbphy2>;
9089ce52 AS	302	disable-over-current;
	303	status = "okay";
	304	};
	305
52303d13	306	&weim {
3c6c9eeb AS	307	pinctrl-names = "default";
	308	pinctrl-0 = <&pinctrl_weim>;
	309
3c3ea296	310	can@4,0 {
52303d13 AS	311	compatible = "nxp,sja1000";
	312	reg = <4 0x00000000 0x00000100>;
	313	interrupt-parent = <&gpio5>;
6ece55b3	314	interrupts = <19 IRQ_TYPE_EDGE_FALLING>;
52303d13 AS	315	nxp,external-clock-frequency = <16000000>;
	316	nxp,tx-output-config = <0x16>;
	317	nxp,no-comparator-bypass;
	318	fsl,weim-cs-timing = <0x0000dcf6 0x444a0301 0x44443302>;
	319	};
	320	};