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9f0749e3 SH |
1 | /* |
2 | * Copyright 2012 Sascha Hauer, Pengutronix | |
3 | * | |
4 | * The code contained herein is licensed under the GNU General Public | |
5 | * License. You may obtain a copy of the GNU General Public License | |
6 | * Version 2 or later at the following locations: | |
7 | * | |
8 | * http://www.opensource.org/licenses/gpl-license.html | |
9 | * http://www.gnu.org/copyleft/gpl.html | |
10 | */ | |
11 | ||
12 | /include/ "skeleton.dtsi" | |
13 | ||
14 | / { | |
15 | aliases { | |
16 | serial0 = &uart1; | |
17 | serial1 = &uart2; | |
18 | serial2 = &uart3; | |
19 | serial3 = &uart4; | |
20 | serial4 = &uart5; | |
21 | serial5 = &uart6; | |
5230f8fe SG |
22 | gpio0 = &gpio1; |
23 | gpio1 = &gpio2; | |
24 | gpio2 = &gpio3; | |
25 | gpio3 = &gpio4; | |
26 | gpio4 = &gpio5; | |
27 | gpio5 = &gpio6; | |
9f0749e3 SH |
28 | }; |
29 | ||
30 | avic: avic-interrupt-controller@e0000000 { | |
31 | compatible = "fsl,imx27-avic", "fsl,avic"; | |
32 | interrupt-controller; | |
33 | #interrupt-cells = <1>; | |
34 | reg = <0x10040000 0x1000>; | |
35 | }; | |
36 | ||
37 | clocks { | |
38 | #address-cells = <1>; | |
39 | #size-cells = <0>; | |
40 | ||
41 | osc26m { | |
42 | compatible = "fsl,imx-osc26m", "fixed-clock"; | |
43 | clock-frequency = <26000000>; | |
44 | }; | |
45 | }; | |
46 | ||
47 | soc { | |
48 | #address-cells = <1>; | |
49 | #size-cells = <1>; | |
50 | compatible = "simple-bus"; | |
51 | interrupt-parent = <&avic>; | |
52 | ranges; | |
53 | ||
54 | aipi@10000000 { /* AIPI1 */ | |
55 | compatible = "fsl,aipi-bus", "simple-bus"; | |
56 | #address-cells = <1>; | |
57 | #size-cells = <1>; | |
58 | reg = <0x10000000 0x10000000>; | |
59 | ranges; | |
60 | ||
61 | wdog@10002000 { | |
62 | compatible = "fsl,imx27-wdt", "fsl,imx21-wdt"; | |
63 | reg = <0x10002000 0x4000>; | |
64 | interrupts = <27>; | |
65 | status = "disabled"; | |
66 | }; | |
67 | ||
0c456cfa | 68 | uart1: serial@1000a000 { |
9f0749e3 SH |
69 | compatible = "fsl,imx27-uart", "fsl,imx21-uart"; |
70 | reg = <0x1000a000 0x1000>; | |
71 | interrupts = <20>; | |
72 | status = "disabled"; | |
73 | }; | |
74 | ||
0c456cfa | 75 | uart2: serial@1000b000 { |
9f0749e3 SH |
76 | compatible = "fsl,imx27-uart", "fsl,imx21-uart"; |
77 | reg = <0x1000b000 0x1000>; | |
78 | interrupts = <19>; | |
79 | status = "disabled"; | |
80 | }; | |
81 | ||
0c456cfa | 82 | uart3: serial@1000c000 { |
9f0749e3 SH |
83 | compatible = "fsl,imx27-uart", "fsl,imx21-uart"; |
84 | reg = <0x1000c000 0x1000>; | |
85 | interrupts = <18>; | |
86 | status = "disabled"; | |
87 | }; | |
88 | ||
0c456cfa | 89 | uart4: serial@1000d000 { |
9f0749e3 SH |
90 | compatible = "fsl,imx27-uart", "fsl,imx21-uart"; |
91 | reg = <0x1000d000 0x1000>; | |
92 | interrupts = <17>; | |
93 | status = "disabled"; | |
94 | }; | |
95 | ||
96 | cspi1: cspi@1000e000 { | |
97 | #address-cells = <1>; | |
98 | #size-cells = <0>; | |
99 | compatible = "fsl,imx27-cspi"; | |
100 | reg = <0x1000e000 0x1000>; | |
101 | interrupts = <16>; | |
102 | status = "disabled"; | |
103 | }; | |
104 | ||
105 | cspi2: cspi@1000f000 { | |
106 | #address-cells = <1>; | |
107 | #size-cells = <0>; | |
108 | compatible = "fsl,imx27-cspi"; | |
109 | reg = <0x1000f000 0x1000>; | |
110 | interrupts = <15>; | |
111 | status = "disabled"; | |
112 | }; | |
113 | ||
114 | i2c1: i2c@10012000 { | |
115 | #address-cells = <1>; | |
116 | #size-cells = <0>; | |
117 | compatible = "fsl,imx27-i2c", "fsl,imx1-i2c"; | |
118 | reg = <0x10012000 0x1000>; | |
119 | interrupts = <12>; | |
120 | status = "disabled"; | |
121 | }; | |
122 | ||
123 | gpio1: gpio@10015000 { | |
124 | compatible = "fsl,imx27-gpio", "fsl,imx21-gpio"; | |
125 | reg = <0x10015000 0x100>; | |
126 | interrupts = <8>; | |
127 | gpio-controller; | |
128 | #gpio-cells = <2>; | |
129 | interrupt-controller; | |
88cde8b7 | 130 | #interrupt-cells = <2>; |
9f0749e3 SH |
131 | }; |
132 | ||
133 | gpio2: gpio@10015100 { | |
134 | compatible = "fsl,imx27-gpio", "fsl,imx21-gpio"; | |
135 | reg = <0x10015100 0x100>; | |
136 | interrupts = <8>; | |
137 | gpio-controller; | |
138 | #gpio-cells = <2>; | |
139 | interrupt-controller; | |
88cde8b7 | 140 | #interrupt-cells = <2>; |
9f0749e3 SH |
141 | }; |
142 | ||
143 | gpio3: gpio@10015200 { | |
144 | compatible = "fsl,imx27-gpio", "fsl,imx21-gpio"; | |
145 | reg = <0x10015200 0x100>; | |
146 | interrupts = <8>; | |
147 | gpio-controller; | |
148 | #gpio-cells = <2>; | |
149 | interrupt-controller; | |
88cde8b7 | 150 | #interrupt-cells = <2>; |
9f0749e3 SH |
151 | }; |
152 | ||
153 | gpio4: gpio@10015300 { | |
154 | compatible = "fsl,imx27-gpio", "fsl,imx21-gpio"; | |
155 | reg = <0x10015300 0x100>; | |
156 | interrupts = <8>; | |
157 | gpio-controller; | |
158 | #gpio-cells = <2>; | |
159 | interrupt-controller; | |
88cde8b7 | 160 | #interrupt-cells = <2>; |
9f0749e3 SH |
161 | }; |
162 | ||
163 | gpio5: gpio@10015400 { | |
164 | compatible = "fsl,imx27-gpio", "fsl,imx21-gpio"; | |
165 | reg = <0x10015400 0x100>; | |
166 | interrupts = <8>; | |
167 | gpio-controller; | |
168 | #gpio-cells = <2>; | |
169 | interrupt-controller; | |
88cde8b7 | 170 | #interrupt-cells = <2>; |
9f0749e3 SH |
171 | }; |
172 | ||
173 | gpio6: gpio@10015500 { | |
174 | compatible = "fsl,imx27-gpio", "fsl,imx21-gpio"; | |
175 | reg = <0x10015500 0x100>; | |
176 | interrupts = <8>; | |
177 | gpio-controller; | |
178 | #gpio-cells = <2>; | |
179 | interrupt-controller; | |
88cde8b7 | 180 | #interrupt-cells = <2>; |
9f0749e3 SH |
181 | }; |
182 | ||
183 | cspi3: cspi@10017000 { | |
184 | #address-cells = <1>; | |
185 | #size-cells = <0>; | |
186 | compatible = "fsl,imx27-cspi"; | |
187 | reg = <0x10017000 0x1000>; | |
188 | interrupts = <6>; | |
189 | status = "disabled"; | |
190 | }; | |
191 | ||
0c456cfa | 192 | uart5: serial@1001b000 { |
9f0749e3 SH |
193 | compatible = "fsl,imx27-uart", "fsl,imx21-uart"; |
194 | reg = <0x1001b000 0x1000>; | |
195 | interrupts = <49>; | |
196 | status = "disabled"; | |
197 | }; | |
198 | ||
0c456cfa | 199 | uart6: serial@1001c000 { |
9f0749e3 SH |
200 | compatible = "fsl,imx27-uart", "fsl,imx21-uart"; |
201 | reg = <0x1001c000 0x1000>; | |
202 | interrupts = <48>; | |
203 | status = "disabled"; | |
204 | }; | |
205 | ||
206 | i2c2: i2c@1001d000 { | |
207 | #address-cells = <1>; | |
208 | #size-cells = <0>; | |
209 | compatible = "fsl,imx27-i2c", "fsl,imx1-i2c"; | |
210 | reg = <0x1001d000 0x1000>; | |
211 | interrupts = <1>; | |
212 | status = "disabled"; | |
213 | }; | |
214 | ||
0c456cfa | 215 | fec: ethernet@1002b000 { |
9f0749e3 SH |
216 | compatible = "fsl,imx27-fec"; |
217 | reg = <0x1002b000 0x4000>; | |
218 | interrupts = <50>; | |
219 | status = "disabled"; | |
220 | }; | |
221 | }; | |
37787360 UKK |
222 | nand@d8000000 { |
223 | #address-cells = <1>; | |
224 | #size-cells = <1>; | |
225 | ||
226 | compatible = "fsl,imx27-nand"; | |
227 | reg = <0xd8000000 0x1000>; | |
228 | interrupts = <29>; | |
229 | status = "disabled"; | |
230 | }; | |
9f0749e3 SH |
231 | }; |
232 | }; |