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bc3a59c1 DA |
1 | /* |
2 | * Copyright 2012 Freescale Semiconductor, Inc. | |
3 | * | |
4 | * The code contained herein is licensed under the GNU General Public | |
5 | * License. You may obtain a copy of the GNU General Public License | |
6 | * Version 2 or later at the following locations: | |
7 | * | |
8 | * http://www.opensource.org/licenses/gpl-license.html | |
9 | * http://www.gnu.org/copyleft/gpl.html | |
10 | */ | |
11 | ||
12 | /include/ "skeleton.dtsi" | |
13 | ||
14 | / { | |
15 | interrupt-parent = <&icoll>; | |
16 | ||
ce4c6f9b | 17 | aliases { |
6bf6eb09 FE |
18 | ethernet0 = &mac0; |
19 | ethernet1 = &mac1; | |
ce4c6f9b SG |
20 | gpio0 = &gpio0; |
21 | gpio1 = &gpio1; | |
22 | gpio2 = &gpio2; | |
23 | gpio3 = &gpio3; | |
24 | gpio4 = &gpio4; | |
530f1d41 SG |
25 | saif0 = &saif0; |
26 | saif1 = &saif1; | |
80d969e4 FE |
27 | serial0 = &auart0; |
28 | serial1 = &auart1; | |
29 | serial2 = &auart2; | |
30 | serial3 = &auart3; | |
31 | serial4 = &auart4; | |
6bf6eb09 FE |
32 | spi0 = &ssp1; |
33 | spi1 = &ssp2; | |
ce4c6f9b SG |
34 | }; |
35 | ||
bc3a59c1 | 36 | cpus { |
7925e89f LP |
37 | #address-cells = <0>; |
38 | #size-cells = <0>; | |
39 | ||
40 | cpu { | |
41 | compatible = "arm,arm926ej-s"; | |
42 | device_type = "cpu"; | |
bc3a59c1 DA |
43 | }; |
44 | }; | |
45 | ||
46 | apb@80000000 { | |
47 | compatible = "simple-bus"; | |
48 | #address-cells = <1>; | |
49 | #size-cells = <1>; | |
50 | reg = <0x80000000 0x80000>; | |
51 | ranges; | |
52 | ||
53 | apbh@80000000 { | |
54 | compatible = "simple-bus"; | |
55 | #address-cells = <1>; | |
56 | #size-cells = <1>; | |
57 | reg = <0x80000000 0x3c900>; | |
58 | ranges; | |
59 | ||
60 | icoll: interrupt-controller@80000000 { | |
83a84efc | 61 | compatible = "fsl,imx28-icoll", "fsl,icoll"; |
bc3a59c1 DA |
62 | interrupt-controller; |
63 | #interrupt-cells = <1>; | |
64 | reg = <0x80000000 0x2000>; | |
65 | }; | |
66 | ||
296f8cd3 | 67 | hsadc: hsadc@80002000 { |
0f06cde7 | 68 | reg = <0x80002000 0x2000>; |
7f2b9288 | 69 | interrupts = <13>; |
f30fb03d SG |
70 | dmas = <&dma_apbh 12>; |
71 | dma-names = "rx"; | |
bc3a59c1 DA |
72 | status = "disabled"; |
73 | }; | |
74 | ||
f30fb03d | 75 | dma_apbh: dma-apbh@80004000 { |
84f3570a | 76 | compatible = "fsl,imx28-dma-apbh"; |
0f06cde7 | 77 | reg = <0x80004000 0x2000>; |
f30fb03d SG |
78 | interrupts = <82 83 84 85 |
79 | 88 88 88 88 | |
80 | 88 88 88 88 | |
81 | 87 86 0 0>; | |
82 | interrupt-names = "ssp0", "ssp1", "ssp2", "ssp3", | |
83 | "gpmi0", "gmpi1", "gpmi2", "gmpi3", | |
84 | "gpmi4", "gmpi5", "gpmi6", "gmpi7", | |
85 | "hsadc", "lcdif", "empty", "empty"; | |
86 | #dma-cells = <1>; | |
87 | dma-channels = <16>; | |
b598b9f3 | 88 | clocks = <&clks 25>; |
bc3a59c1 DA |
89 | }; |
90 | ||
296f8cd3 | 91 | perfmon: perfmon@80006000 { |
0f06cde7 | 92 | reg = <0x80006000 0x800>; |
bc3a59c1 DA |
93 | interrupts = <27>; |
94 | status = "disabled"; | |
95 | }; | |
96 | ||
296f8cd3 | 97 | gpmi: gpmi-nand@8000c000 { |
7a8e5149 HS |
98 | compatible = "fsl,imx28-gpmi-nand"; |
99 | #address-cells = <1>; | |
100 | #size-cells = <1>; | |
0f06cde7 | 101 | reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>; |
7a8e5149 | 102 | reg-names = "gpmi-nand", "bch"; |
7f2b9288 SG |
103 | interrupts = <41>; |
104 | interrupt-names = "bch"; | |
b598b9f3 | 105 | clocks = <&clks 50>; |
b6442559 | 106 | clock-names = "gpmi_io"; |
f30fb03d SG |
107 | dmas = <&dma_apbh 4>; |
108 | dma-names = "rx-tx"; | |
bc3a59c1 DA |
109 | status = "disabled"; |
110 | }; | |
111 | ||
112 | ssp0: ssp@80010000 { | |
41bf5706 MR |
113 | #address-cells = <1>; |
114 | #size-cells = <0>; | |
0f06cde7 | 115 | reg = <0x80010000 0x2000>; |
7f2b9288 | 116 | interrupts = <96>; |
b598b9f3 | 117 | clocks = <&clks 46>; |
f30fb03d SG |
118 | dmas = <&dma_apbh 0>; |
119 | dma-names = "rx-tx"; | |
bc3a59c1 DA |
120 | status = "disabled"; |
121 | }; | |
122 | ||
123 | ssp1: ssp@80012000 { | |
41bf5706 MR |
124 | #address-cells = <1>; |
125 | #size-cells = <0>; | |
0f06cde7 | 126 | reg = <0x80012000 0x2000>; |
7f2b9288 | 127 | interrupts = <97>; |
b598b9f3 | 128 | clocks = <&clks 47>; |
f30fb03d SG |
129 | dmas = <&dma_apbh 1>; |
130 | dma-names = "rx-tx"; | |
bc3a59c1 DA |
131 | status = "disabled"; |
132 | }; | |
133 | ||
134 | ssp2: ssp@80014000 { | |
41bf5706 MR |
135 | #address-cells = <1>; |
136 | #size-cells = <0>; | |
0f06cde7 | 137 | reg = <0x80014000 0x2000>; |
7f2b9288 | 138 | interrupts = <98>; |
b598b9f3 | 139 | clocks = <&clks 48>; |
f30fb03d SG |
140 | dmas = <&dma_apbh 2>; |
141 | dma-names = "rx-tx"; | |
bc3a59c1 DA |
142 | status = "disabled"; |
143 | }; | |
144 | ||
145 | ssp3: ssp@80016000 { | |
41bf5706 MR |
146 | #address-cells = <1>; |
147 | #size-cells = <0>; | |
0f06cde7 | 148 | reg = <0x80016000 0x2000>; |
7f2b9288 | 149 | interrupts = <99>; |
b598b9f3 | 150 | clocks = <&clks 49>; |
f30fb03d SG |
151 | dmas = <&dma_apbh 3>; |
152 | dma-names = "rx-tx"; | |
bc3a59c1 DA |
153 | status = "disabled"; |
154 | }; | |
155 | ||
296f8cd3 | 156 | pinctrl: pinctrl@80018000 { |
bc3a59c1 DA |
157 | #address-cells = <1>; |
158 | #size-cells = <0>; | |
ce4c6f9b | 159 | compatible = "fsl,imx28-pinctrl", "simple-bus"; |
0f06cde7 | 160 | reg = <0x80018000 0x2000>; |
bc3a59c1 | 161 | |
ce4c6f9b SG |
162 | gpio0: gpio@0 { |
163 | compatible = "fsl,imx28-gpio", "fsl,mxs-gpio"; | |
164 | interrupts = <127>; | |
165 | gpio-controller; | |
166 | #gpio-cells = <2>; | |
167 | interrupt-controller; | |
168 | #interrupt-cells = <2>; | |
169 | }; | |
170 | ||
171 | gpio1: gpio@1 { | |
172 | compatible = "fsl,imx28-gpio", "fsl,mxs-gpio"; | |
173 | interrupts = <126>; | |
174 | gpio-controller; | |
175 | #gpio-cells = <2>; | |
176 | interrupt-controller; | |
177 | #interrupt-cells = <2>; | |
178 | }; | |
179 | ||
180 | gpio2: gpio@2 { | |
181 | compatible = "fsl,imx28-gpio", "fsl,mxs-gpio"; | |
182 | interrupts = <125>; | |
183 | gpio-controller; | |
184 | #gpio-cells = <2>; | |
185 | interrupt-controller; | |
186 | #interrupt-cells = <2>; | |
187 | }; | |
188 | ||
189 | gpio3: gpio@3 { | |
190 | compatible = "fsl,imx28-gpio", "fsl,mxs-gpio"; | |
191 | interrupts = <124>; | |
192 | gpio-controller; | |
193 | #gpio-cells = <2>; | |
194 | interrupt-controller; | |
195 | #interrupt-cells = <2>; | |
196 | }; | |
197 | ||
198 | gpio4: gpio@4 { | |
199 | compatible = "fsl,imx28-gpio", "fsl,mxs-gpio"; | |
200 | interrupts = <123>; | |
201 | gpio-controller; | |
202 | #gpio-cells = <2>; | |
203 | interrupt-controller; | |
204 | #interrupt-cells = <2>; | |
205 | }; | |
206 | ||
bc3a59c1 DA |
207 | duart_pins_a: duart@0 { |
208 | reg = <0>; | |
f14da767 SG |
209 | fsl,pinmux-ids = < |
210 | 0x3102 /* MX28_PAD_PWM0__DUART_RX */ | |
211 | 0x3112 /* MX28_PAD_PWM1__DUART_TX */ | |
212 | >; | |
bc3a59c1 DA |
213 | fsl,drive-strength = <0>; |
214 | fsl,voltage = <1>; | |
215 | fsl,pull-up = <0>; | |
216 | }; | |
217 | ||
8385e7c1 MR |
218 | duart_pins_b: duart@1 { |
219 | reg = <1>; | |
f14da767 SG |
220 | fsl,pinmux-ids = < |
221 | 0x3022 /* MX28_PAD_AUART0_CTS__DUART_RX */ | |
222 | 0x3032 /* MX28_PAD_AUART0_RTS__DUART_TX */ | |
223 | >; | |
8385e7c1 MR |
224 | fsl,drive-strength = <0>; |
225 | fsl,voltage = <1>; | |
226 | fsl,pull-up = <0>; | |
227 | }; | |
228 | ||
e1a4d18f SG |
229 | duart_4pins_a: duart-4pins@0 { |
230 | reg = <0>; | |
231 | fsl,pinmux-ids = < | |
232 | 0x3022 /* MX28_PAD_AUART0_CTS__DUART_RX */ | |
233 | 0x3032 /* MX28_PAD_AUART0_RTS__DUART_TX */ | |
234 | 0x3002 /* MX28_PAD_AUART0_RX__DUART_CTS */ | |
235 | 0x3012 /* MX28_PAD_AUART0_TX__DUART_RTS */ | |
236 | >; | |
237 | fsl,drive-strength = <0>; | |
238 | fsl,voltage = <1>; | |
239 | fsl,pull-up = <0>; | |
240 | }; | |
241 | ||
7a8e5149 HS |
242 | gpmi_pins_a: gpmi-nand@0 { |
243 | reg = <0>; | |
f14da767 SG |
244 | fsl,pinmux-ids = < |
245 | 0x0000 /* MX28_PAD_GPMI_D00__GPMI_D0 */ | |
246 | 0x0010 /* MX28_PAD_GPMI_D01__GPMI_D1 */ | |
247 | 0x0020 /* MX28_PAD_GPMI_D02__GPMI_D2 */ | |
248 | 0x0030 /* MX28_PAD_GPMI_D03__GPMI_D3 */ | |
249 | 0x0040 /* MX28_PAD_GPMI_D04__GPMI_D4 */ | |
250 | 0x0050 /* MX28_PAD_GPMI_D05__GPMI_D5 */ | |
251 | 0x0060 /* MX28_PAD_GPMI_D06__GPMI_D6 */ | |
252 | 0x0070 /* MX28_PAD_GPMI_D07__GPMI_D7 */ | |
253 | 0x0100 /* MX28_PAD_GPMI_CE0N__GPMI_CE0N */ | |
f14da767 | 254 | 0x0140 /* MX28_PAD_GPMI_RDY0__GPMI_READY0 */ |
f14da767 SG |
255 | 0x0180 /* MX28_PAD_GPMI_RDN__GPMI_RDN */ |
256 | 0x0190 /* MX28_PAD_GPMI_WRN__GPMI_WRN */ | |
257 | 0x01a0 /* MX28_PAD_GPMI_ALE__GPMI_ALE */ | |
258 | 0x01b0 /* MX28_PAD_GPMI_CLE__GPMI_CLE */ | |
259 | 0x01c0 /* MX28_PAD_GPMI_RESETN__GPMI_RESETN */ | |
260 | >; | |
7a8e5149 HS |
261 | fsl,drive-strength = <0>; |
262 | fsl,voltage = <1>; | |
263 | fsl,pull-up = <0>; | |
264 | }; | |
265 | ||
266 | gpmi_status_cfg: gpmi-status-cfg { | |
f14da767 SG |
267 | fsl,pinmux-ids = < |
268 | 0x0180 /* MX28_PAD_GPMI_RDN__GPMI_RDN */ | |
269 | 0x0190 /* MX28_PAD_GPMI_WRN__GPMI_WRN */ | |
270 | 0x01c0 /* MX28_PAD_GPMI_RESETN__GPMI_RESETN */ | |
271 | >; | |
7a8e5149 HS |
272 | fsl,drive-strength = <2>; |
273 | }; | |
274 | ||
80d969e4 FE |
275 | auart0_pins_a: auart0@0 { |
276 | reg = <0>; | |
f14da767 SG |
277 | fsl,pinmux-ids = < |
278 | 0x3000 /* MX28_PAD_AUART0_RX__AUART0_RX */ | |
279 | 0x3010 /* MX28_PAD_AUART0_TX__AUART0_TX */ | |
280 | 0x3020 /* MX28_PAD_AUART0_CTS__AUART0_CTS */ | |
281 | 0x3030 /* MX28_PAD_AUART0_RTS__AUART0_RTS */ | |
282 | >; | |
80d969e4 | 283 | fsl,drive-strength = <0>; |
8fa62e11 MV |
284 | fsl,voltage = <1>; |
285 | fsl,pull-up = <0>; | |
286 | }; | |
287 | ||
288 | auart0_2pins_a: auart0-2pins@0 { | |
289 | reg = <0>; | |
290 | fsl,pinmux-ids = < | |
291 | 0x3000 /* MX28_PAD_AUART0_RX__AUART0_RX */ | |
292 | 0x3010 /* MX28_PAD_AUART0_TX__AUART0_TX */ | |
293 | >; | |
294 | fsl,drive-strength = <0>; | |
80d969e4 FE |
295 | fsl,voltage = <1>; |
296 | fsl,pull-up = <0>; | |
297 | }; | |
298 | ||
e1a4d18f SG |
299 | auart1_pins_a: auart1@0 { |
300 | reg = <0>; | |
301 | fsl,pinmux-ids = < | |
302 | 0x3040 /* MX28_PAD_AUART1_RX__AUART1_RX */ | |
303 | 0x3050 /* MX28_PAD_AUART1_TX__AUART1_TX */ | |
304 | 0x3060 /* MX28_PAD_AUART1_CTS__AUART1_CTS */ | |
305 | 0x3070 /* MX28_PAD_AUART1_RTS__AUART1_RTS */ | |
306 | >; | |
307 | fsl,drive-strength = <0>; | |
308 | fsl,voltage = <1>; | |
309 | fsl,pull-up = <0>; | |
310 | }; | |
311 | ||
3143bbb4 SG |
312 | auart1_2pins_a: auart1-2pins@0 { |
313 | reg = <0>; | |
314 | fsl,pinmux-ids = < | |
315 | 0x3040 /* MX28_PAD_AUART1_RX__AUART1_RX */ | |
316 | 0x3050 /* MX28_PAD_AUART1_TX__AUART1_TX */ | |
317 | >; | |
318 | fsl,drive-strength = <0>; | |
319 | fsl,voltage = <1>; | |
320 | fsl,pull-up = <0>; | |
321 | }; | |
322 | ||
323 | auart2_2pins_a: auart2-2pins@0 { | |
324 | reg = <0>; | |
325 | fsl,pinmux-ids = < | |
326 | 0x2101 /* MX28_PAD_SSP2_SCK__AUART2_RX */ | |
327 | 0x2111 /* MX28_PAD_SSP2_MOSI__AUART2_TX */ | |
328 | >; | |
329 | fsl,drive-strength = <0>; | |
330 | fsl,voltage = <1>; | |
331 | fsl,pull-up = <0>; | |
332 | }; | |
333 | ||
f8040cf5 EB |
334 | auart2_2pins_b: auart2-2pins@1 { |
335 | reg = <1>; | |
336 | fsl,pinmux-ids = < | |
337 | 0x3080 /* MX28_PAD_AUART2_RX__AUART2_RX */ | |
338 | 0x3090 /* MX28_PAD_AUART2_TX__AUART2_TX */ | |
339 | >; | |
340 | fsl,drive-strength = <0>; | |
341 | fsl,voltage = <1>; | |
342 | fsl,pull-up = <0>; | |
343 | }; | |
344 | ||
80d969e4 FE |
345 | auart3_pins_a: auart3@0 { |
346 | reg = <0>; | |
f14da767 SG |
347 | fsl,pinmux-ids = < |
348 | 0x30c0 /* MX28_PAD_AUART3_RX__AUART3_RX */ | |
349 | 0x30d0 /* MX28_PAD_AUART3_TX__AUART3_TX */ | |
350 | 0x30e0 /* MX28_PAD_AUART3_CTS__AUART3_CTS */ | |
351 | 0x30f0 /* MX28_PAD_AUART3_RTS__AUART3_RTS */ | |
352 | >; | |
80d969e4 FE |
353 | fsl,drive-strength = <0>; |
354 | fsl,voltage = <1>; | |
355 | fsl,pull-up = <0>; | |
356 | }; | |
357 | ||
3143bbb4 SG |
358 | auart3_2pins_a: auart3-2pins@0 { |
359 | reg = <0>; | |
360 | fsl,pinmux-ids = < | |
361 | 0x2121 /* MX28_PAD_SSP2_MISO__AUART3_RX */ | |
362 | 0x2131 /* MX28_PAD_SSP2_SS0__AUART3_TX */ | |
363 | >; | |
364 | fsl,drive-strength = <0>; | |
365 | fsl,voltage = <1>; | |
366 | fsl,pull-up = <0>; | |
367 | }; | |
368 | ||
4812e746 EB |
369 | auart3_2pins_b: auart3-2pins@1 { |
370 | reg = <1>; | |
371 | fsl,pinmux-ids = < | |
372 | 0x30c0 /* MX28_PAD_AUART3_RX__AUART3_RX */ | |
373 | 0x30d0 /* MX28_PAD_AUART3_TX__AUART3_TX */ | |
374 | >; | |
375 | fsl,drive-strength = <0>; | |
376 | fsl,voltage = <1>; | |
377 | fsl,pull-up = <0>; | |
378 | }; | |
379 | ||
33678d12 EB |
380 | auart4_2pins_a: auart4@0 { |
381 | reg = <0>; | |
382 | fsl,pinmux-ids = < | |
383 | 0x2181 /* MX28_PAD_SSP3_SCK__AUART4_TX */ | |
384 | 0x2191 /* MX28_PAD_SSP3_MOSI__AUART4_RX */ | |
385 | >; | |
386 | fsl,drive-strength = <0>; | |
387 | fsl,voltage = <1>; | |
388 | fsl,pull-up = <0>; | |
389 | }; | |
390 | ||
bc3a59c1 DA |
391 | mac0_pins_a: mac0@0 { |
392 | reg = <0>; | |
f14da767 SG |
393 | fsl,pinmux-ids = < |
394 | 0x4000 /* MX28_PAD_ENET0_MDC__ENET0_MDC */ | |
395 | 0x4010 /* MX28_PAD_ENET0_MDIO__ENET0_MDIO */ | |
396 | 0x4020 /* MX28_PAD_ENET0_RX_EN__ENET0_RX_EN */ | |
397 | 0x4030 /* MX28_PAD_ENET0_RXD0__ENET0_RXD0 */ | |
398 | 0x4040 /* MX28_PAD_ENET0_RXD1__ENET0_RXD1 */ | |
399 | 0x4060 /* MX28_PAD_ENET0_TX_EN__ENET0_TX_EN */ | |
400 | 0x4070 /* MX28_PAD_ENET0_TXD0__ENET0_TXD0 */ | |
401 | 0x4080 /* MX28_PAD_ENET0_TXD1__ENET0_TXD1 */ | |
402 | 0x4100 /* MX28_PAD_ENET_CLK__CLKCTRL_ENET */ | |
403 | >; | |
bc3a59c1 DA |
404 | fsl,drive-strength = <1>; |
405 | fsl,voltage = <1>; | |
406 | fsl,pull-up = <1>; | |
407 | }; | |
408 | ||
409 | mac1_pins_a: mac1@0 { | |
410 | reg = <0>; | |
f14da767 SG |
411 | fsl,pinmux-ids = < |
412 | 0x40f1 /* MX28_PAD_ENET0_CRS__ENET1_RX_EN */ | |
413 | 0x4091 /* MX28_PAD_ENET0_RXD2__ENET1_RXD0 */ | |
414 | 0x40a1 /* MX28_PAD_ENET0_RXD3__ENET1_RXD1 */ | |
415 | 0x40e1 /* MX28_PAD_ENET0_COL__ENET1_TX_EN */ | |
416 | 0x40b1 /* MX28_PAD_ENET0_TXD2__ENET1_TXD0 */ | |
417 | 0x40c1 /* MX28_PAD_ENET0_TXD3__ENET1_TXD1 */ | |
418 | >; | |
bc3a59c1 DA |
419 | fsl,drive-strength = <1>; |
420 | fsl,voltage = <1>; | |
421 | fsl,pull-up = <1>; | |
422 | }; | |
35d23047 SG |
423 | |
424 | mmc0_8bit_pins_a: mmc0-8bit@0 { | |
425 | reg = <0>; | |
f14da767 SG |
426 | fsl,pinmux-ids = < |
427 | 0x2000 /* MX28_PAD_SSP0_DATA0__SSP0_D0 */ | |
428 | 0x2010 /* MX28_PAD_SSP0_DATA1__SSP0_D1 */ | |
429 | 0x2020 /* MX28_PAD_SSP0_DATA2__SSP0_D2 */ | |
430 | 0x2030 /* MX28_PAD_SSP0_DATA3__SSP0_D3 */ | |
431 | 0x2040 /* MX28_PAD_SSP0_DATA4__SSP0_D4 */ | |
432 | 0x2050 /* MX28_PAD_SSP0_DATA5__SSP0_D5 */ | |
433 | 0x2060 /* MX28_PAD_SSP0_DATA6__SSP0_D6 */ | |
434 | 0x2070 /* MX28_PAD_SSP0_DATA7__SSP0_D7 */ | |
435 | 0x2080 /* MX28_PAD_SSP0_CMD__SSP0_CMD */ | |
436 | 0x2090 /* MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT */ | |
437 | 0x20a0 /* MX28_PAD_SSP0_SCK__SSP0_SCK */ | |
438 | >; | |
35d23047 SG |
439 | fsl,drive-strength = <1>; |
440 | fsl,voltage = <1>; | |
441 | fsl,pull-up = <1>; | |
442 | }; | |
443 | ||
8385e7c1 MR |
444 | mmc0_4bit_pins_a: mmc0-4bit@0 { |
445 | reg = <0>; | |
f14da767 SG |
446 | fsl,pinmux-ids = < |
447 | 0x2000 /* MX28_PAD_SSP0_DATA0__SSP0_D0 */ | |
448 | 0x2010 /* MX28_PAD_SSP0_DATA1__SSP0_D1 */ | |
449 | 0x2020 /* MX28_PAD_SSP0_DATA2__SSP0_D2 */ | |
450 | 0x2030 /* MX28_PAD_SSP0_DATA3__SSP0_D3 */ | |
451 | 0x2080 /* MX28_PAD_SSP0_CMD__SSP0_CMD */ | |
452 | 0x2090 /* MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT */ | |
453 | 0x20a0 /* MX28_PAD_SSP0_SCK__SSP0_SCK */ | |
454 | >; | |
8385e7c1 MR |
455 | fsl,drive-strength = <1>; |
456 | fsl,voltage = <1>; | |
457 | fsl,pull-up = <1>; | |
458 | }; | |
459 | ||
35d23047 | 460 | mmc0_cd_cfg: mmc0-cd-cfg { |
f14da767 SG |
461 | fsl,pinmux-ids = < |
462 | 0x2090 /* MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT */ | |
463 | >; | |
35d23047 SG |
464 | fsl,pull-up = <0>; |
465 | }; | |
466 | ||
467 | mmc0_sck_cfg: mmc0-sck-cfg { | |
f14da767 SG |
468 | fsl,pinmux-ids = < |
469 | 0x20a0 /* MX28_PAD_SSP0_SCK__SSP0_SCK */ | |
470 | >; | |
35d23047 SG |
471 | fsl,drive-strength = <2>; |
472 | fsl,pull-up = <0>; | |
473 | }; | |
2a96e391 SG |
474 | |
475 | i2c0_pins_a: i2c0@0 { | |
476 | reg = <0>; | |
f14da767 SG |
477 | fsl,pinmux-ids = < |
478 | 0x3180 /* MX28_PAD_I2C0_SCL__I2C0_SCL */ | |
479 | 0x3190 /* MX28_PAD_I2C0_SDA__I2C0_SDA */ | |
480 | >; | |
2a96e391 SG |
481 | fsl,drive-strength = <1>; |
482 | fsl,voltage = <1>; | |
483 | fsl,pull-up = <1>; | |
484 | }; | |
530f1d41 | 485 | |
5c697ea2 MR |
486 | i2c0_pins_b: i2c0@1 { |
487 | reg = <1>; | |
488 | fsl,pinmux-ids = < | |
489 | 0x3001 /* MX28_PAD_AUART0_RX__I2C0_SCL */ | |
490 | 0x3011 /* MX28_PAD_AUART0_TX__I2C0_SDA */ | |
491 | >; | |
492 | fsl,drive-strength = <1>; | |
493 | fsl,voltage = <1>; | |
494 | fsl,pull-up = <1>; | |
495 | }; | |
496 | ||
de7e934f MR |
497 | i2c1_pins_a: i2c1@0 { |
498 | reg = <0>; | |
499 | fsl,pinmux-ids = < | |
500 | 0x3101 /* MX28_PAD_PWM0__I2C1_SCL */ | |
501 | 0x3111 /* MX28_PAD_PWM1__I2C1_SDA */ | |
502 | >; | |
503 | fsl,drive-strength = <1>; | |
504 | fsl,voltage = <1>; | |
505 | fsl,pull-up = <1>; | |
506 | }; | |
507 | ||
530f1d41 SG |
508 | saif0_pins_a: saif0@0 { |
509 | reg = <0>; | |
f14da767 SG |
510 | fsl,pinmux-ids = < |
511 | 0x3140 /* MX28_PAD_SAIF0_MCLK__SAIF0_MCLK */ | |
512 | 0x3150 /* MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK */ | |
513 | 0x3160 /* MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK */ | |
514 | 0x3170 /* MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0 */ | |
515 | >; | |
530f1d41 SG |
516 | fsl,drive-strength = <2>; |
517 | fsl,voltage = <1>; | |
518 | fsl,pull-up = <1>; | |
519 | }; | |
520 | ||
2e1dd9fc LW |
521 | saif0_pins_b: saif0@1 { |
522 | reg = <1>; | |
523 | fsl,pinmux-ids = < | |
524 | 0x3150 /* MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK */ | |
525 | 0x3160 /* MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK */ | |
526 | 0x3170 /* MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0 */ | |
527 | >; | |
528 | fsl,drive-strength = <2>; | |
529 | fsl,voltage = <1>; | |
530 | fsl,pull-up = <1>; | |
531 | }; | |
532 | ||
530f1d41 SG |
533 | saif1_pins_a: saif1@0 { |
534 | reg = <0>; | |
f14da767 SG |
535 | fsl,pinmux-ids = < |
536 | 0x31a0 /* MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0 */ | |
537 | >; | |
530f1d41 SG |
538 | fsl,drive-strength = <2>; |
539 | fsl,voltage = <1>; | |
540 | fsl,pull-up = <1>; | |
541 | }; | |
52f7176b | 542 | |
e1a4d18f SG |
543 | pwm0_pins_a: pwm0@0 { |
544 | reg = <0>; | |
545 | fsl,pinmux-ids = < | |
546 | 0x3100 /* MX28_PAD_PWM0__PWM_0 */ | |
547 | >; | |
548 | fsl,drive-strength = <0>; | |
549 | fsl,voltage = <1>; | |
550 | fsl,pull-up = <0>; | |
551 | }; | |
552 | ||
52f7176b SG |
553 | pwm2_pins_a: pwm2@0 { |
554 | reg = <0>; | |
555 | fsl,pinmux-ids = < | |
556 | 0x3120 /* MX28_PAD_PWM2__PWM_2 */ | |
557 | >; | |
558 | fsl,drive-strength = <0>; | |
559 | fsl,voltage = <1>; | |
560 | fsl,pull-up = <0>; | |
561 | }; | |
a915ee42 | 562 | |
2bde51cb JB |
563 | pwm3_pins_a: pwm3@0 { |
564 | reg = <0>; | |
565 | fsl,pinmux-ids = < | |
566 | 0x31c0 /* MX28_PAD_PWM3__PWM_3 */ | |
567 | >; | |
568 | fsl,drive-strength = <0>; | |
569 | fsl,voltage = <1>; | |
570 | fsl,pull-up = <0>; | |
571 | }; | |
572 | ||
d248620c MR |
573 | pwm3_pins_b: pwm3@1 { |
574 | reg = <1>; | |
575 | fsl,pinmux-ids = < | |
576 | 0x3141 /* MX28_PAD_SAIF0_MCLK__PWM3 */ | |
577 | >; | |
578 | fsl,drive-strength = <0>; | |
579 | fsl,voltage = <1>; | |
580 | fsl,pull-up = <0>; | |
581 | }; | |
582 | ||
2f44211f MR |
583 | pwm4_pins_a: pwm4@0 { |
584 | reg = <0>; | |
585 | fsl,pinmux-ids = < | |
586 | 0x31d0 /* MX28_PAD_PWM4__PWM_4 */ | |
587 | >; | |
588 | fsl,drive-strength = <0>; | |
589 | fsl,voltage = <1>; | |
590 | fsl,pull-up = <0>; | |
591 | }; | |
592 | ||
a915ee42 SG |
593 | lcdif_24bit_pins_a: lcdif-24bit@0 { |
594 | reg = <0>; | |
595 | fsl,pinmux-ids = < | |
596 | 0x1000 /* MX28_PAD_LCD_D00__LCD_D0 */ | |
597 | 0x1010 /* MX28_PAD_LCD_D01__LCD_D1 */ | |
598 | 0x1020 /* MX28_PAD_LCD_D02__LCD_D2 */ | |
599 | 0x1030 /* MX28_PAD_LCD_D03__LCD_D3 */ | |
600 | 0x1040 /* MX28_PAD_LCD_D04__LCD_D4 */ | |
601 | 0x1050 /* MX28_PAD_LCD_D05__LCD_D5 */ | |
602 | 0x1060 /* MX28_PAD_LCD_D06__LCD_D6 */ | |
603 | 0x1070 /* MX28_PAD_LCD_D07__LCD_D7 */ | |
604 | 0x1080 /* MX28_PAD_LCD_D08__LCD_D8 */ | |
605 | 0x1090 /* MX28_PAD_LCD_D09__LCD_D9 */ | |
606 | 0x10a0 /* MX28_PAD_LCD_D10__LCD_D10 */ | |
607 | 0x10b0 /* MX28_PAD_LCD_D11__LCD_D11 */ | |
608 | 0x10c0 /* MX28_PAD_LCD_D12__LCD_D12 */ | |
609 | 0x10d0 /* MX28_PAD_LCD_D13__LCD_D13 */ | |
610 | 0x10e0 /* MX28_PAD_LCD_D14__LCD_D14 */ | |
611 | 0x10f0 /* MX28_PAD_LCD_D15__LCD_D15 */ | |
612 | 0x1100 /* MX28_PAD_LCD_D16__LCD_D16 */ | |
613 | 0x1110 /* MX28_PAD_LCD_D17__LCD_D17 */ | |
614 | 0x1120 /* MX28_PAD_LCD_D18__LCD_D18 */ | |
615 | 0x1130 /* MX28_PAD_LCD_D19__LCD_D19 */ | |
616 | 0x1140 /* MX28_PAD_LCD_D20__LCD_D20 */ | |
617 | 0x1150 /* MX28_PAD_LCD_D21__LCD_D21 */ | |
618 | 0x1160 /* MX28_PAD_LCD_D22__LCD_D22 */ | |
619 | 0x1170 /* MX28_PAD_LCD_D23__LCD_D23 */ | |
a915ee42 SG |
620 | >; |
621 | fsl,drive-strength = <0>; | |
622 | fsl,voltage = <1>; | |
623 | fsl,pull-up = <0>; | |
624 | }; | |
6ca44acf | 625 | |
4ced2a40 GGM |
626 | lcdif_16bit_pins_a: lcdif-16bit@0 { |
627 | reg = <0>; | |
628 | fsl,pinmux-ids = < | |
629 | 0x1000 /* MX28_PAD_LCD_D00__LCD_D0 */ | |
630 | 0x1010 /* MX28_PAD_LCD_D01__LCD_D1 */ | |
631 | 0x1020 /* MX28_PAD_LCD_D02__LCD_D2 */ | |
632 | 0x1030 /* MX28_PAD_LCD_D03__LCD_D3 */ | |
633 | 0x1040 /* MX28_PAD_LCD_D04__LCD_D4 */ | |
634 | 0x1050 /* MX28_PAD_LCD_D05__LCD_D5 */ | |
635 | 0x1060 /* MX28_PAD_LCD_D06__LCD_D6 */ | |
636 | 0x1070 /* MX28_PAD_LCD_D07__LCD_D7 */ | |
637 | 0x1080 /* MX28_PAD_LCD_D08__LCD_D8 */ | |
638 | 0x1090 /* MX28_PAD_LCD_D09__LCD_D9 */ | |
639 | 0x10a0 /* MX28_PAD_LCD_D10__LCD_D10 */ | |
640 | 0x10b0 /* MX28_PAD_LCD_D11__LCD_D11 */ | |
641 | 0x10c0 /* MX28_PAD_LCD_D12__LCD_D12 */ | |
642 | 0x10d0 /* MX28_PAD_LCD_D13__LCD_D13 */ | |
643 | 0x10e0 /* MX28_PAD_LCD_D14__LCD_D14 */ | |
644 | 0x10f0 /* MX28_PAD_LCD_D15__LCD_D15 */ | |
645 | >; | |
646 | fsl,drive-strength = <0>; | |
647 | fsl,voltage = <1>; | |
648 | fsl,pull-up = <0>; | |
649 | }; | |
650 | ||
6ca44acf SG |
651 | can0_pins_a: can0@0 { |
652 | reg = <0>; | |
653 | fsl,pinmux-ids = < | |
654 | 0x0161 /* MX28_PAD_GPMI_RDY2__CAN0_TX */ | |
655 | 0x0171 /* MX28_PAD_GPMI_RDY3__CAN0_RX */ | |
656 | >; | |
657 | fsl,drive-strength = <0>; | |
658 | fsl,voltage = <1>; | |
659 | fsl,pull-up = <0>; | |
660 | }; | |
661 | ||
662 | can1_pins_a: can1@0 { | |
663 | reg = <0>; | |
664 | fsl,pinmux-ids = < | |
665 | 0x0121 /* MX28_PAD_GPMI_CE2N__CAN1_TX */ | |
666 | 0x0131 /* MX28_PAD_GPMI_CE3N__CAN1_RX */ | |
667 | >; | |
668 | fsl,drive-strength = <0>; | |
669 | fsl,voltage = <1>; | |
670 | fsl,pull-up = <0>; | |
671 | }; | |
7f122213 MV |
672 | |
673 | spi2_pins_a: spi2@0 { | |
674 | reg = <0>; | |
675 | fsl,pinmux-ids = < | |
676 | 0x2100 /* MX28_PAD_SSP2_SCK__SSP2_SCK */ | |
677 | 0x2110 /* MX28_PAD_SSP2_MOSI__SSP2_CMD */ | |
678 | 0x2120 /* MX28_PAD_SSP2_MISO__SSP2_D0 */ | |
679 | 0x2130 /* MX28_PAD_SSP2_SS0__SSP2_D3 */ | |
680 | >; | |
681 | fsl,drive-strength = <1>; | |
682 | fsl,voltage = <1>; | |
683 | fsl,pull-up = <1>; | |
684 | }; | |
bb2f1261 | 685 | |
3314d2be LW |
686 | spi3_pins_a: spi3@0 { |
687 | reg = <0>; | |
688 | fsl,pinmux-ids = < | |
689 | 0x3082 /* MX28_PAD_AUART2_RX__SSP3_D4 */ | |
690 | 0x3092 /* MX28_PAD_AUART2_TX__SSP3_D5 */ | |
691 | 0x2180 /* MX28_PAD_SSP3_SCK__SSP3_SCK */ | |
692 | 0x2190 /* MX28_PAD_SSP3_MOSI__SSP3_CMD */ | |
693 | 0x21A0 /* MX28_PAD_SSP3_MISO__SSP3_D0 */ | |
694 | 0x21B0 /* MX28_PAD_SSP3_SS0__SSP3_D3 */ | |
695 | >; | |
696 | fsl,drive-strength = <1>; | |
697 | fsl,voltage = <1>; | |
698 | fsl,pull-up = <0>; | |
699 | }; | |
700 | ||
bb2f1261 MV |
701 | usbphy0_pins_a: usbphy0@0 { |
702 | reg = <0>; | |
703 | fsl,pinmux-ids = < | |
704 | 0x2152 /* MX28_PAD_SSP2_SS2__USB0_OVERCURRENT */ | |
705 | >; | |
706 | fsl,drive-strength = <2>; | |
707 | fsl,voltage = <1>; | |
708 | fsl,pull-up = <0>; | |
709 | }; | |
710 | ||
711 | usbphy0_pins_b: usbphy0@1 { | |
712 | reg = <1>; | |
713 | fsl,pinmux-ids = < | |
714 | 0x3061 /* MX28_PAD_AUART1_CTS__USB0_OVERCURRENT */ | |
715 | >; | |
716 | fsl,drive-strength = <2>; | |
717 | fsl,voltage = <1>; | |
718 | fsl,pull-up = <0>; | |
719 | }; | |
720 | ||
721 | usbphy1_pins_a: usbphy1@0 { | |
722 | reg = <0>; | |
723 | fsl,pinmux-ids = < | |
724 | 0x2142 /* MX28_PAD_SSP2_SS1__USB1_OVERCURRENT */ | |
725 | >; | |
726 | fsl,drive-strength = <2>; | |
727 | fsl,voltage = <1>; | |
728 | fsl,pull-up = <0>; | |
729 | }; | |
bc3a59c1 DA |
730 | }; |
731 | ||
296f8cd3 | 732 | digctl: digctl@8001c000 { |
115581cf | 733 | compatible = "fsl,imx28-digctl", "fsl,imx23-digctl"; |
0f06cde7 | 734 | reg = <0x8001c000 0x2000>; |
bc3a59c1 DA |
735 | interrupts = <89>; |
736 | status = "disabled"; | |
737 | }; | |
738 | ||
296f8cd3 | 739 | etm: etm@80022000 { |
0f06cde7 | 740 | reg = <0x80022000 0x2000>; |
bc3a59c1 DA |
741 | status = "disabled"; |
742 | }; | |
743 | ||
f30fb03d | 744 | dma_apbx: dma-apbx@80024000 { |
84f3570a | 745 | compatible = "fsl,imx28-dma-apbx"; |
0f06cde7 | 746 | reg = <0x80024000 0x2000>; |
f30fb03d SG |
747 | interrupts = <78 79 66 0 |
748 | 80 81 68 69 | |
749 | 70 71 72 73 | |
750 | 74 75 76 77>; | |
751 | interrupt-names = "auart4-rx", "aurat4-tx", "spdif-tx", "empty", | |
752 | "saif0", "saif1", "i2c0", "i2c1", | |
753 | "auart0-rx", "auart0-tx", "auart1-rx", "auart1-tx", | |
754 | "auart2-rx", "auart2-tx", "auart3-rx", "auart3-tx"; | |
755 | #dma-cells = <1>; | |
756 | dma-channels = <16>; | |
b598b9f3 | 757 | clocks = <&clks 26>; |
bc3a59c1 DA |
758 | }; |
759 | ||
296f8cd3 | 760 | dcp: dcp@80028000 { |
0f06cde7 | 761 | reg = <0x80028000 0x2000>; |
bc3a59c1 | 762 | interrupts = <52 53 54>; |
519d8b1a | 763 | compatible = "fsl-dcp"; |
bc3a59c1 DA |
764 | }; |
765 | ||
296f8cd3 | 766 | pxp: pxp@8002a000 { |
0f06cde7 | 767 | reg = <0x8002a000 0x2000>; |
bc3a59c1 DA |
768 | interrupts = <39>; |
769 | status = "disabled"; | |
770 | }; | |
771 | ||
296f8cd3 | 772 | ocotp: ocotp@8002c000 { |
69d75a02 | 773 | compatible = "fsl,ocotp"; |
0f06cde7 | 774 | reg = <0x8002c000 0x2000>; |
bc3a59c1 DA |
775 | status = "disabled"; |
776 | }; | |
777 | ||
778 | axi-ahb@8002e000 { | |
0f06cde7 | 779 | reg = <0x8002e000 0x2000>; |
bc3a59c1 DA |
780 | status = "disabled"; |
781 | }; | |
782 | ||
296f8cd3 | 783 | lcdif: lcdif@80030000 { |
a915ee42 | 784 | compatible = "fsl,imx28-lcdif"; |
0f06cde7 | 785 | reg = <0x80030000 0x2000>; |
7f2b9288 | 786 | interrupts = <38>; |
b598b9f3 | 787 | clocks = <&clks 55>; |
f30fb03d SG |
788 | dmas = <&dma_apbh 13>; |
789 | dma-names = "rx"; | |
bc3a59c1 DA |
790 | status = "disabled"; |
791 | }; | |
792 | ||
793 | can0: can@80032000 { | |
6ca44acf | 794 | compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan"; |
0f06cde7 | 795 | reg = <0x80032000 0x2000>; |
bc3a59c1 | 796 | interrupts = <8>; |
b598b9f3 SG |
797 | clocks = <&clks 58>, <&clks 58>; |
798 | clock-names = "ipg", "per"; | |
bc3a59c1 DA |
799 | status = "disabled"; |
800 | }; | |
801 | ||
802 | can1: can@80034000 { | |
6ca44acf | 803 | compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan"; |
0f06cde7 | 804 | reg = <0x80034000 0x2000>; |
bc3a59c1 | 805 | interrupts = <9>; |
b598b9f3 SG |
806 | clocks = <&clks 59>, <&clks 59>; |
807 | clock-names = "ipg", "per"; | |
bc3a59c1 DA |
808 | status = "disabled"; |
809 | }; | |
810 | ||
296f8cd3 | 811 | simdbg: simdbg@8003c000 { |
0f06cde7 | 812 | reg = <0x8003c000 0x200>; |
bc3a59c1 DA |
813 | status = "disabled"; |
814 | }; | |
815 | ||
296f8cd3 | 816 | simgpmisel: simgpmisel@8003c200 { |
0f06cde7 | 817 | reg = <0x8003c200 0x100>; |
bc3a59c1 DA |
818 | status = "disabled"; |
819 | }; | |
820 | ||
296f8cd3 | 821 | simsspsel: simsspsel@8003c300 { |
0f06cde7 | 822 | reg = <0x8003c300 0x100>; |
bc3a59c1 DA |
823 | status = "disabled"; |
824 | }; | |
825 | ||
296f8cd3 | 826 | simmemsel: simmemsel@8003c400 { |
0f06cde7 | 827 | reg = <0x8003c400 0x100>; |
bc3a59c1 DA |
828 | status = "disabled"; |
829 | }; | |
830 | ||
296f8cd3 | 831 | gpiomon: gpiomon@8003c500 { |
0f06cde7 | 832 | reg = <0x8003c500 0x100>; |
bc3a59c1 DA |
833 | status = "disabled"; |
834 | }; | |
835 | ||
296f8cd3 | 836 | simenet: simenet@8003c700 { |
0f06cde7 | 837 | reg = <0x8003c700 0x100>; |
bc3a59c1 DA |
838 | status = "disabled"; |
839 | }; | |
840 | ||
296f8cd3 | 841 | armjtag: armjtag@8003c800 { |
0f06cde7 | 842 | reg = <0x8003c800 0x100>; |
bc3a59c1 DA |
843 | status = "disabled"; |
844 | }; | |
07a3ce7f | 845 | }; |
bc3a59c1 DA |
846 | |
847 | apbx@80040000 { | |
848 | compatible = "simple-bus"; | |
849 | #address-cells = <1>; | |
850 | #size-cells = <1>; | |
851 | reg = <0x80040000 0x40000>; | |
852 | ranges; | |
853 | ||
b598b9f3 | 854 | clks: clkctrl@80040000 { |
8f7cf881 | 855 | compatible = "fsl,imx28-clkctrl", "fsl,clkctrl"; |
0f06cde7 | 856 | reg = <0x80040000 0x2000>; |
b598b9f3 | 857 | #clock-cells = <1>; |
bc3a59c1 DA |
858 | }; |
859 | ||
860 | saif0: saif@80042000 { | |
530f1d41 | 861 | compatible = "fsl,imx28-saif"; |
0f06cde7 | 862 | reg = <0x80042000 0x2000>; |
7f2b9288 | 863 | interrupts = <59>; |
66acaf3f | 864 | #clock-cells = <0>; |
b598b9f3 | 865 | clocks = <&clks 53>; |
f30fb03d SG |
866 | dmas = <&dma_apbx 4>; |
867 | dma-names = "rx-tx"; | |
bc3a59c1 DA |
868 | status = "disabled"; |
869 | }; | |
870 | ||
296f8cd3 | 871 | power: power@80044000 { |
0f06cde7 | 872 | reg = <0x80044000 0x2000>; |
bc3a59c1 DA |
873 | status = "disabled"; |
874 | }; | |
875 | ||
876 | saif1: saif@80046000 { | |
530f1d41 | 877 | compatible = "fsl,imx28-saif"; |
0f06cde7 | 878 | reg = <0x80046000 0x2000>; |
7f2b9288 | 879 | interrupts = <58>; |
b598b9f3 | 880 | clocks = <&clks 54>; |
f30fb03d SG |
881 | dmas = <&dma_apbx 5>; |
882 | dma-names = "rx-tx"; | |
bc3a59c1 DA |
883 | status = "disabled"; |
884 | }; | |
885 | ||
296f8cd3 | 886 | lradc: lradc@80050000 { |
aef35104 | 887 | compatible = "fsl,imx28-lradc"; |
0f06cde7 | 888 | reg = <0x80050000 0x2000>; |
aef35104 MV |
889 | interrupts = <10 14 15 16 17 18 19 |
890 | 20 21 22 23 24 25>; | |
bc3a59c1 DA |
891 | status = "disabled"; |
892 | }; | |
893 | ||
296f8cd3 | 894 | spdif: spdif@80054000 { |
0f06cde7 | 895 | reg = <0x80054000 0x2000>; |
7f2b9288 | 896 | interrupts = <45>; |
f30fb03d SG |
897 | dmas = <&dma_apbx 2>; |
898 | dma-names = "tx"; | |
bc3a59c1 DA |
899 | status = "disabled"; |
900 | }; | |
901 | ||
296f8cd3 | 902 | mxs_rtc: rtc@80056000 { |
f98c990c | 903 | compatible = "fsl,imx28-rtc", "fsl,stmp3xxx-rtc"; |
0f06cde7 | 904 | reg = <0x80056000 0x2000>; |
f98c990c | 905 | interrupts = <29>; |
bc3a59c1 DA |
906 | }; |
907 | ||
908 | i2c0: i2c@80058000 { | |
2a96e391 SG |
909 | #address-cells = <1>; |
910 | #size-cells = <0>; | |
911 | compatible = "fsl,imx28-i2c"; | |
0f06cde7 | 912 | reg = <0x80058000 0x2000>; |
7f2b9288 | 913 | interrupts = <111>; |
cd4f2d4a | 914 | clock-frequency = <100000>; |
f30fb03d SG |
915 | dmas = <&dma_apbx 6>; |
916 | dma-names = "rx-tx"; | |
bc3a59c1 DA |
917 | status = "disabled"; |
918 | }; | |
919 | ||
920 | i2c1: i2c@8005a000 { | |
2a96e391 SG |
921 | #address-cells = <1>; |
922 | #size-cells = <0>; | |
923 | compatible = "fsl,imx28-i2c"; | |
0f06cde7 | 924 | reg = <0x8005a000 0x2000>; |
7f2b9288 | 925 | interrupts = <110>; |
cd4f2d4a | 926 | clock-frequency = <100000>; |
f30fb03d SG |
927 | dmas = <&dma_apbx 7>; |
928 | dma-names = "rx-tx"; | |
bc3a59c1 DA |
929 | status = "disabled"; |
930 | }; | |
931 | ||
52f7176b SG |
932 | pwm: pwm@80064000 { |
933 | compatible = "fsl,imx28-pwm", "fsl,imx23-pwm"; | |
0f06cde7 | 934 | reg = <0x80064000 0x2000>; |
b598b9f3 | 935 | clocks = <&clks 44>; |
52f7176b SG |
936 | #pwm-cells = <2>; |
937 | fsl,pwm-number = <8>; | |
bc3a59c1 DA |
938 | status = "disabled"; |
939 | }; | |
940 | ||
296f8cd3 | 941 | timer: timrot@80068000 { |
eeca6e60 | 942 | compatible = "fsl,imx28-timrot", "fsl,timrot"; |
0f06cde7 | 943 | reg = <0x80068000 0x2000>; |
eeca6e60 | 944 | interrupts = <48 49 50 51>; |
2efb9504 | 945 | clocks = <&clks 26>; |
bc3a59c1 DA |
946 | }; |
947 | ||
948 | auart0: serial@8006a000 { | |
80d969e4 | 949 | compatible = "fsl,imx28-auart", "fsl,imx23-auart"; |
bc3a59c1 | 950 | reg = <0x8006a000 0x2000>; |
7f2b9288 | 951 | interrupts = <112>; |
f30fb03d SG |
952 | dmas = <&dma_apbx 8>, <&dma_apbx 9>; |
953 | dma-names = "rx", "tx"; | |
b598b9f3 | 954 | clocks = <&clks 45>; |
bc3a59c1 DA |
955 | status = "disabled"; |
956 | }; | |
957 | ||
958 | auart1: serial@8006c000 { | |
80d969e4 | 959 | compatible = "fsl,imx28-auart", "fsl,imx23-auart"; |
bc3a59c1 | 960 | reg = <0x8006c000 0x2000>; |
7f2b9288 | 961 | interrupts = <113>; |
f30fb03d SG |
962 | dmas = <&dma_apbx 10>, <&dma_apbx 11>; |
963 | dma-names = "rx", "tx"; | |
b598b9f3 | 964 | clocks = <&clks 45>; |
bc3a59c1 DA |
965 | status = "disabled"; |
966 | }; | |
967 | ||
968 | auart2: serial@8006e000 { | |
80d969e4 | 969 | compatible = "fsl,imx28-auart", "fsl,imx23-auart"; |
bc3a59c1 | 970 | reg = <0x8006e000 0x2000>; |
7f2b9288 | 971 | interrupts = <114>; |
f30fb03d SG |
972 | dmas = <&dma_apbx 12>, <&dma_apbx 13>; |
973 | dma-names = "rx", "tx"; | |
b598b9f3 | 974 | clocks = <&clks 45>; |
bc3a59c1 DA |
975 | status = "disabled"; |
976 | }; | |
977 | ||
978 | auart3: serial@80070000 { | |
80d969e4 | 979 | compatible = "fsl,imx28-auart", "fsl,imx23-auart"; |
bc3a59c1 | 980 | reg = <0x80070000 0x2000>; |
7f2b9288 | 981 | interrupts = <115>; |
f30fb03d SG |
982 | dmas = <&dma_apbx 14>, <&dma_apbx 15>; |
983 | dma-names = "rx", "tx"; | |
b598b9f3 | 984 | clocks = <&clks 45>; |
bc3a59c1 DA |
985 | status = "disabled"; |
986 | }; | |
987 | ||
988 | auart4: serial@80072000 { | |
80d969e4 | 989 | compatible = "fsl,imx28-auart", "fsl,imx23-auart"; |
bc3a59c1 | 990 | reg = <0x80072000 0x2000>; |
7f2b9288 | 991 | interrupts = <116>; |
f30fb03d SG |
992 | dmas = <&dma_apbx 0>, <&dma_apbx 1>; |
993 | dma-names = "rx", "tx"; | |
b598b9f3 | 994 | clocks = <&clks 45>; |
bc3a59c1 DA |
995 | status = "disabled"; |
996 | }; | |
997 | ||
998 | duart: serial@80074000 { | |
999 | compatible = "arm,pl011", "arm,primecell"; | |
1000 | reg = <0x80074000 0x1000>; | |
1001 | interrupts = <47>; | |
b598b9f3 SG |
1002 | clocks = <&clks 45>, <&clks 26>; |
1003 | clock-names = "uart", "apb_pclk"; | |
bc3a59c1 DA |
1004 | status = "disabled"; |
1005 | }; | |
1006 | ||
1007 | usbphy0: usbphy@8007c000 { | |
5da01270 | 1008 | compatible = "fsl,imx28-usbphy", "fsl,imx23-usbphy"; |
bc3a59c1 | 1009 | reg = <0x8007c000 0x2000>; |
b598b9f3 | 1010 | clocks = <&clks 62>; |
bc3a59c1 DA |
1011 | status = "disabled"; |
1012 | }; | |
1013 | ||
1014 | usbphy1: usbphy@8007e000 { | |
5da01270 | 1015 | compatible = "fsl,imx28-usbphy", "fsl,imx23-usbphy"; |
bc3a59c1 | 1016 | reg = <0x8007e000 0x2000>; |
b598b9f3 | 1017 | clocks = <&clks 63>; |
bc3a59c1 DA |
1018 | status = "disabled"; |
1019 | }; | |
1020 | }; | |
1021 | }; | |
1022 | ||
1023 | ahb@80080000 { | |
1024 | compatible = "simple-bus"; | |
1025 | #address-cells = <1>; | |
1026 | #size-cells = <1>; | |
1027 | reg = <0x80080000 0x80000>; | |
1028 | ranges; | |
1029 | ||
5da01270 RZ |
1030 | usb0: usb@80080000 { |
1031 | compatible = "fsl,imx28-usb", "fsl,imx27-usb"; | |
bc3a59c1 | 1032 | reg = <0x80080000 0x10000>; |
5da01270 | 1033 | interrupts = <93>; |
b598b9f3 | 1034 | clocks = <&clks 60>; |
5da01270 | 1035 | fsl,usbphy = <&usbphy0>; |
bc3a59c1 DA |
1036 | status = "disabled"; |
1037 | }; | |
1038 | ||
5da01270 RZ |
1039 | usb1: usb@80090000 { |
1040 | compatible = "fsl,imx28-usb", "fsl,imx27-usb"; | |
bc3a59c1 | 1041 | reg = <0x80090000 0x10000>; |
5da01270 | 1042 | interrupts = <92>; |
b598b9f3 | 1043 | clocks = <&clks 61>; |
5da01270 | 1044 | fsl,usbphy = <&usbphy1>; |
bc3a59c1 DA |
1045 | status = "disabled"; |
1046 | }; | |
1047 | ||
296f8cd3 | 1048 | dflpt: dflpt@800c0000 { |
bc3a59c1 DA |
1049 | reg = <0x800c0000 0x10000>; |
1050 | status = "disabled"; | |
1051 | }; | |
1052 | ||
1053 | mac0: ethernet@800f0000 { | |
1054 | compatible = "fsl,imx28-fec"; | |
1055 | reg = <0x800f0000 0x4000>; | |
1056 | interrupts = <101>; | |
f231a9fe WS |
1057 | clocks = <&clks 57>, <&clks 57>, <&clks 64>; |
1058 | clock-names = "ipg", "ahb", "enet_out"; | |
bc3a59c1 DA |
1059 | status = "disabled"; |
1060 | }; | |
1061 | ||
1062 | mac1: ethernet@800f4000 { | |
1063 | compatible = "fsl,imx28-fec"; | |
1064 | reg = <0x800f4000 0x4000>; | |
1065 | interrupts = <102>; | |
b598b9f3 SG |
1066 | clocks = <&clks 57>, <&clks 57>; |
1067 | clock-names = "ipg", "ahb"; | |
bc3a59c1 DA |
1068 | status = "disabled"; |
1069 | }; | |
1070 | ||
296f8cd3 | 1071 | etn_switch: switch@800f8000 { |
bc3a59c1 DA |
1072 | reg = <0x800f8000 0x8000>; |
1073 | status = "disabled"; | |
1074 | }; | |
bc3a59c1 DA |
1075 | }; |
1076 | }; |