[mirror_ubuntu-jammy-kernel.git] / arch / arm / boot / dts / imx51-apf51dev.dts

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright 2013 Armadeus Systems - <support@armadeus.com>
 */

/* APF51Dev is a docking board for the APF51 SOM */
#include "imx51-apf51.dts"

/ {
	model = "Armadeus Systems APF51Dev docking/development board";
	compatible = "armadeus,imx51-apf51dev", "armadeus,imx51-apf51", "fsl,imx51";

	backlight {
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_backlight>;
		compatible = "gpio-backlight";
		gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
		default-on;
	};

	disp1 {
		compatible = "fsl,imx-parallel-display";
		interface-pix-fmt = "bgr666";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_ipu_disp1>;

		display-timings {
			lw700 {
				native-mode;
				clock-frequency = <33000033>;
				hactive = <800>;
				vactive = <480>;
				hback-porch = <96>;
				hfront-porch = <96>;
				vback-porch = <20>;
				vfront-porch = <21>;
				hsync-len = <64>;
				vsync-len = <4>;
				hsync-active = <1>;
				vsync-active = <1>;
				de-active = <1>;
				pixelclk-active = <0>;
			};
		};

		port {
			display_in: endpoint {
				remote-endpoint = <&ipu_di0_disp1>;
			};
		};
	};

	gpio-keys {
		compatible = "gpio-keys";

		user-key {
			label = "user";
			gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
			linux,code = <256>; /* BTN_0 */
		};
	};

	leds {
		compatible = "gpio-leds";

		user {
			label = "Heartbeat";
			gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
		};
	};
};

&ecspi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi1>;
	cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>,
		   <&gpio4 25 GPIO_ACTIVE_HIGH>;
	status = "okay";
};

&ecspi2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi2>;
	cs-gpios = <&gpio3 28 GPIO_ACTIVE_LOW>,
		   <&gpio3 27 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&esdhc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_esdhc1>;
	cd-gpios = <&gpio2 29 GPIO_ACTIVE_LOW>;
	bus-width = <4>;
	status = "okay";
};

&esdhc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_esdhc2>;
	bus-width = <4>;
	non-removable;
	status = "okay";
};

&i2c2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog>;

	imx51-apf51dev {
		pinctrl_backlight: backlightgrp {
			fsl,pins = <
				MX51_PAD_DI1_D1_CS__GPIO3_4 0x1F5
			>;
		};

		pinctrl_hog: hoggrp {
			fsl,pins = <
				MX51_PAD_EIM_EB2__GPIO2_22   0x0C5
				MX51_PAD_EIM_EB3__GPIO2_23   0x0C5
				MX51_PAD_EIM_CS4__GPIO2_29   0x100
				MX51_PAD_NANDF_D13__GPIO3_27 0x0C5
				MX51_PAD_NANDF_D12__GPIO3_28 0x0C5
				MX51_PAD_CSPI1_SS0__GPIO4_24 0x0C5
				MX51_PAD_CSPI1_SS1__GPIO4_25 0x0C5
				MX51_PAD_GPIO1_2__GPIO1_2    0x0C5
				MX51_PAD_GPIO1_3__GPIO1_3    0x0C5
			>;
		};

		pinctrl_ecspi1: ecspi1grp {
			fsl,pins = <
				MX51_PAD_CSPI1_MISO__ECSPI1_MISO	0x185
				MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI	0x185
				MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK	0x185
			>;
		};

		pinctrl_ecspi2: ecspi2grp {
			fsl,pins = <
				MX51_PAD_NANDF_RB3__ECSPI2_MISO		0x185
				MX51_PAD_NANDF_D15__ECSPI2_MOSI		0x185
				MX51_PAD_NANDF_RB2__ECSPI2_SCLK		0x185
			>;
		};

		pinctrl_esdhc1: esdhc1grp {
			fsl,pins = <
				MX51_PAD_SD1_CMD__SD1_CMD		0x400020d5
				MX51_PAD_SD1_CLK__SD1_CLK		0x20d5
				MX51_PAD_SD1_DATA0__SD1_DATA0		0x20d5
				MX51_PAD_SD1_DATA1__SD1_DATA1		0x20d5
				MX51_PAD_SD1_DATA2__SD1_DATA2		0x20d5
				MX51_PAD_SD1_DATA3__SD1_DATA3		0x20d5
			>;
		};

		pinctrl_esdhc2: esdhc2grp {
			fsl,pins = <
				MX51_PAD_SD2_CMD__SD2_CMD		0x400020d5
				MX51_PAD_SD2_CLK__SD2_CLK		0x20d5
				MX51_PAD_SD2_DATA0__SD2_DATA0		0x20d5
				MX51_PAD_SD2_DATA1__SD2_DATA1		0x20d5
				MX51_PAD_SD2_DATA2__SD2_DATA2		0x20d5
				MX51_PAD_SD2_DATA3__SD2_DATA3		0x20d5
			>;
		};

		pinctrl_i2c2: i2c2grp {
			fsl,pins = <
				MX51_PAD_EIM_D27__I2C2_SCL		0x400001ed
				MX51_PAD_EIM_D24__I2C2_SDA		0x400001ed
			>;
		};

		pinctrl_ipu_disp1: ipudisp1grp {
			fsl,pins = <
				MX51_PAD_DISP1_DAT0__DISP1_DAT0		0x5
				MX51_PAD_DISP1_DAT1__DISP1_DAT1		0x5
				MX51_PAD_DISP1_DAT2__DISP1_DAT2		0x5
				MX51_PAD_DISP1_DAT3__DISP1_DAT3		0x5
				MX51_PAD_DISP1_DAT4__DISP1_DAT4		0x5
				MX51_PAD_DISP1_DAT5__DISP1_DAT5		0x5
				MX51_PAD_DISP1_DAT6__DISP1_DAT6		0x5
				MX51_PAD_DISP1_DAT7__DISP1_DAT7		0x5
				MX51_PAD_DISP1_DAT8__DISP1_DAT8		0x5
				MX51_PAD_DISP1_DAT9__DISP1_DAT9		0x5
				MX51_PAD_DISP1_DAT10__DISP1_DAT10	0x5
				MX51_PAD_DISP1_DAT11__DISP1_DAT11	0x5
				MX51_PAD_DISP1_DAT12__DISP1_DAT12	0x5
				MX51_PAD_DISP1_DAT13__DISP1_DAT13	0x5
				MX51_PAD_DISP1_DAT14__DISP1_DAT14	0x5
				MX51_PAD_DISP1_DAT15__DISP1_DAT15	0x5
				MX51_PAD_DISP1_DAT16__DISP1_DAT16	0x5
				MX51_PAD_DISP1_DAT17__DISP1_DAT17	0x5
				MX51_PAD_DISP1_DAT18__DISP1_DAT18	0x5
				MX51_PAD_DISP1_DAT19__DISP1_DAT19	0x5
				MX51_PAD_DISP1_DAT20__DISP1_DAT20	0x5
				MX51_PAD_DISP1_DAT21__DISP1_DAT21	0x5
				MX51_PAD_DISP1_DAT22__DISP1_DAT22	0x5
				MX51_PAD_DISP1_DAT23__DISP1_DAT23	0x5
				MX51_PAD_DI1_PIN2__DI1_PIN2		0x5
				MX51_PAD_DI1_PIN3__DI1_PIN3		0x5
			>;
		};
	};
};

&ipu_di0_disp1 {
	remote-endpoint = <&display_in>;
};
Commit	Line	Data
fcaf2036	1	// SPDX-License-Identifier: GPL-2.0-or-later
e910b45c GGM	2	/*
e910b45c GGM	3	* Copyright 2013 Armadeus Systems - <support@armadeus.com>
e910b45c GGM	4	*/
	5
	6	/* APF51Dev is a docking board for the APF51 SOM */
	7	#include "imx51-apf51.dts"
	8
	9	/ {
	10	model = "Armadeus Systems APF51Dev docking/development board";
	11	compatible = "armadeus,imx51-apf51dev", "armadeus,imx51-apf51", "fsl,imx51";
	12
901765a2	13	backlight {
f76129d0 GGM	14	pinctrl-names = "default";
	15	pinctrl-0 = <&pinctrl_backlight>;
	16	compatible = "gpio-backlight";
	17	gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
	18	default-on;
	19	};
	20
792d4edd	21	disp1 {
5d150eac	22	compatible = "fsl,imx-parallel-display";
5d150eac GGM	23	interface-pix-fmt = "bgr666";
5d150eac GGM	24	pinctrl-names = "default";
5a2a7d57	25	pinctrl-0 = <&pinctrl_ipu_disp1>;
5d150eac GGM	26
	27	display-timings {
	28	lw700 {
	29	native-mode;
	30	clock-frequency = <33000033>;
	31	hactive = <800>;
	32	vactive = <480>;
	33	hback-porch = <96>;
	34	hfront-porch = <96>;
	35	vback-porch = <20>;
	36	vfront-porch = <21>;
	37	hsync-len = <64>;
	38	vsync-len = <4>;
	39	hsync-active = <1>;
	40	vsync-active = <1>;
	41	de-active = <1>;
	42	pixelclk-active = <0>;
	43	};
	44	};
de10e04e PZ	45
	46	port {
	47	display_in: endpoint {
f7059428	48	remote-endpoint = <&ipu_di0_disp1>;
de10e04e PZ	49	};
de10e04e PZ	50	};
5d150eac GGM	51	};
5d150eac GGM	52
e910b45c GGM	53	gpio-keys {
	54	compatible = "gpio-keys";
	55
	56	user-key {
	57	label = "user";
bdb3eec7	58	gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
e910b45c GGM	59	linux,code = <256>; /* BTN_0 */
	60	};
	61	};
	62
	63	leds {
	64	compatible = "gpio-leds";
	65
	66	user {
	67	label = "Heartbeat";
bdb3eec7	68	gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
e910b45c GGM	69	linux,default-trigger = "heartbeat";
	70	};
	71	};
	72	};
	73
003c70d8 GGM	74	&ecspi1 {
003c70d8 GGM	75	pinctrl-names = "default";
5a2a7d57	76	pinctrl-0 = <&pinctrl_ecspi1>;
bdb3eec7 AS	77	cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>,
bdb3eec7 AS	78	<&gpio4 25 GPIO_ACTIVE_HIGH>;
003c70d8 GGM	79	status = "okay";
	80	};
	81
	82	&ecspi2 {
	83	pinctrl-names = "default";
5a2a7d57	84	pinctrl-0 = <&pinctrl_ecspi2>;
bdb3eec7 AS	85	cs-gpios = <&gpio3 28 GPIO_ACTIVE_LOW>,
bdb3eec7 AS	86	<&gpio3 27 GPIO_ACTIVE_LOW>;
003c70d8 GGM	87	status = "okay";
	88	};
	89
e910b45c GGM	90	&esdhc1 {
e910b45c GGM	91	pinctrl-names = "default";
5a2a7d57	92	pinctrl-0 = <&pinctrl_esdhc1>;
aca45c0e	93	cd-gpios = <&gpio2 29 GPIO_ACTIVE_LOW>;
e910b45c GGM	94	bus-width = <4>;
	95	status = "okay";
	96	};
	97
	98	&esdhc2 {
	99	pinctrl-names = "default";
5a2a7d57	100	pinctrl-0 = <&pinctrl_esdhc2>;
e910b45c GGM	101	bus-width = <4>;
	102	non-removable;
	103	status = "okay";
	104	};
	105
003c70d8 GGM	106	&i2c2 {
003c70d8 GGM	107	pinctrl-names = "default";
5a2a7d57	108	pinctrl-0 = <&pinctrl_i2c2>;
003c70d8 GGM	109	status = "okay";
	110	};
	111
e910b45c GGM	112	&iomuxc {
	113	pinctrl-names = "default";
	114	pinctrl-0 = <&pinctrl_hog>;
	115
5a2a7d57	116	imx51-apf51dev {
901765a2	117	pinctrl_backlight: backlightgrp {
f76129d0 GGM	118	fsl,pins = <
	119	MX51_PAD_DI1_D1_CS__GPIO3_4 0x1F5
	120	>;
	121	};
	122
e910b45c GGM	123	pinctrl_hog: hoggrp {
	124	fsl,pins = <
	125	MX51_PAD_EIM_EB2__GPIO2_22 0x0C5
	126	MX51_PAD_EIM_EB3__GPIO2_23 0x0C5
	127	MX51_PAD_EIM_CS4__GPIO2_29 0x100
	128	MX51_PAD_NANDF_D13__GPIO3_27 0x0C5
	129	MX51_PAD_NANDF_D12__GPIO3_28 0x0C5
	130	MX51_PAD_CSPI1_SS0__GPIO4_24 0x0C5
	131	MX51_PAD_CSPI1_SS1__GPIO4_25 0x0C5
	132	MX51_PAD_GPIO1_2__GPIO1_2 0x0C5
	133	MX51_PAD_GPIO1_3__GPIO1_3 0x0C5
	134	>;
	135	};
5a2a7d57 SG	136
	137	pinctrl_ecspi1: ecspi1grp {
	138	fsl,pins = <
	139	MX51_PAD_CSPI1_MISO__ECSPI1_MISO 0x185
	140	MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI 0x185
	141	MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK 0x185
	142	>;
	143	};
	144
	145	pinctrl_ecspi2: ecspi2grp {
	146	fsl,pins = <
	147	MX51_PAD_NANDF_RB3__ECSPI2_MISO 0x185
	148	MX51_PAD_NANDF_D15__ECSPI2_MOSI 0x185
	149	MX51_PAD_NANDF_RB2__ECSPI2_SCLK 0x185
	150	>;
	151	};
	152
	153	pinctrl_esdhc1: esdhc1grp {
	154	fsl,pins = <
	155	MX51_PAD_SD1_CMD__SD1_CMD 0x400020d5
	156	MX51_PAD_SD1_CLK__SD1_CLK 0x20d5
	157	MX51_PAD_SD1_DATA0__SD1_DATA0 0x20d5
	158	MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5
	159	MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5
	160	MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5
	161	>;
	162	};
	163
	164	pinctrl_esdhc2: esdhc2grp {
	165	fsl,pins = <
	166	MX51_PAD_SD2_CMD__SD2_CMD 0x400020d5
	167	MX51_PAD_SD2_CLK__SD2_CLK 0x20d5
	168	MX51_PAD_SD2_DATA0__SD2_DATA0 0x20d5
	169	MX51_PAD_SD2_DATA1__SD2_DATA1 0x20d5
	170	MX51_PAD_SD2_DATA2__SD2_DATA2 0x20d5
	171	MX51_PAD_SD2_DATA3__SD2_DATA3 0x20d5
	172	>;
	173	};
	174
	175	pinctrl_i2c2: i2c2grp {
	176	fsl,pins = <
	177	MX51_PAD_EIM_D27__I2C2_SCL 0x400001ed
	178	MX51_PAD_EIM_D24__I2C2_SDA 0x400001ed
	179	>;
	180	};
	181
	182	pinctrl_ipu_disp1: ipudisp1grp {
	183	fsl,pins = <
	184	MX51_PAD_DISP1_DAT0__DISP1_DAT0 0x5
	185	MX51_PAD_DISP1_DAT1__DISP1_DAT1 0x5
	186	MX51_PAD_DISP1_DAT2__DISP1_DAT2 0x5
	187	MX51_PAD_DISP1_DAT3__DISP1_DAT3 0x5
	188	MX51_PAD_DISP1_DAT4__DISP1_DAT4 0x5
	189	MX51_PAD_DISP1_DAT5__DISP1_DAT5 0x5
	190	MX51_PAD_DISP1_DAT6__DISP1_DAT6 0x5
	191	MX51_PAD_DISP1_DAT7__DISP1_DAT7 0x5
	192	MX51_PAD_DISP1_DAT8__DISP1_DAT8 0x5
	193	MX51_PAD_DISP1_DAT9__DISP1_DAT9 0x5
	194	MX51_PAD_DISP1_DAT10__DISP1_DAT10 0x5
	195	MX51_PAD_DISP1_DAT11__DISP1_DAT11 0x5
	196	MX51_PAD_DISP1_DAT12__DISP1_DAT12 0x5
	197	MX51_PAD_DISP1_DAT13__DISP1_DAT13 0x5
	198	MX51_PAD_DISP1_DAT14__DISP1_DAT14 0x5
	199	MX51_PAD_DISP1_DAT15__DISP1_DAT15 0x5
200	MX51_PAD_DISP1_DAT16__DISP1_DAT16 0x5
201	MX51_PAD_DISP1_DAT17__DISP1_DAT17 0x5
202	MX51_PAD_DISP1_DAT18__DISP1_DAT18 0x5
203	MX51_PAD_DISP1_DAT19__DISP1_DAT19 0x5
204	MX51_PAD_DISP1_DAT20__DISP1_DAT20 0x5
205	MX51_PAD_DISP1_DAT21__DISP1_DAT21 0x5
206	MX51_PAD_DISP1_DAT22__DISP1_DAT22 0x5
207	MX51_PAD_DISP1_DAT23__DISP1_DAT23 0x5
208	MX51_PAD_DI1_PIN2__DI1_PIN2 0x5
209	MX51_PAD_DI1_PIN3__DI1_PIN3 0x5
210	>;
211	};
e910b45c GGM	212	};
e910b45c GGM	213	};
de10e04e	214
f7059428	215	&ipu_di0_disp1 {
de10e04e PZ	216	remote-endpoint = <&display_in>;
de10e04e PZ	217	};