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Commit | Line | Data |
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1f31e253 FE |
1 | // SPDX-License-Identifier: GPL-2.0+ |
2 | // | |
3 | // Copyright 2011 Freescale Semiconductor, Inc. | |
4 | // Copyright 2011 Linaro Ltd. | |
d5eb195f ST |
5 | |
6 | #include "imx53.dtsi" | |
7 | ||
8 | / { | |
48f51963 SH |
9 | chosen { |
10 | stdout-path = &uart1; | |
11 | }; | |
12 | ||
ad00e080 | 13 | memory@70000000 { |
e8fd17b9 | 14 | device_type = "memory"; |
2b333190 FE |
15 | reg = <0x70000000 0x20000000>, |
16 | <0xb0000000 0x20000000>; | |
d5eb195f ST |
17 | }; |
18 | ||
792d4edd | 19 | display0: disp0 { |
d5eb195f | 20 | compatible = "fsl,imx-parallel-display"; |
d5eb195f ST |
21 | interface-pix-fmt = "rgb565"; |
22 | pinctrl-names = "default"; | |
23 | pinctrl-0 = <&pinctrl_ipu_disp0>; | |
24 | status = "disabled"; | |
25 | display-timings { | |
26 | claawvga { | |
27 | native-mode; | |
28 | clock-frequency = <27000000>; | |
29 | hactive = <800>; | |
30 | vactive = <480>; | |
31 | hback-porch = <40>; | |
32 | hfront-porch = <60>; | |
33 | vback-porch = <10>; | |
34 | vfront-porch = <10>; | |
35 | hsync-len = <20>; | |
36 | vsync-len = <10>; | |
37 | hsync-active = <0>; | |
38 | vsync-active = <0>; | |
39 | de-active = <1>; | |
40 | pixelclk-active = <0>; | |
41 | }; | |
42 | }; | |
f83ccb93 LT |
43 | |
44 | port { | |
45 | display0_in: endpoint { | |
46 | remote-endpoint = <&ipu_di0_disp0>; | |
47 | }; | |
48 | }; | |
d5eb195f ST |
49 | }; |
50 | ||
51 | gpio-keys { | |
52 | compatible = "gpio-keys"; | |
53 | ||
54 | power { | |
55 | label = "Power Button"; | |
3631c597 SH |
56 | gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; |
57 | linux,code = <KEY_POWER>; | |
d5eb195f ST |
58 | }; |
59 | ||
60 | volume-up { | |
61 | label = "Volume Up"; | |
3631c597 SH |
62 | gpios = <&gpio2 14 GPIO_ACTIVE_LOW>; |
63 | linux,code = <KEY_VOLUMEUP>; | |
26cefdd1 | 64 | wakeup-source; |
d5eb195f ST |
65 | }; |
66 | ||
67 | volume-down { | |
68 | label = "Volume Down"; | |
3631c597 SH |
69 | gpios = <&gpio2 15 GPIO_ACTIVE_LOW>; |
70 | linux,code = <KEY_VOLUMEDOWN>; | |
26cefdd1 | 71 | wakeup-source; |
d5eb195f ST |
72 | }; |
73 | }; | |
74 | ||
75 | leds { | |
76 | compatible = "gpio-leds"; | |
77 | pinctrl-names = "default"; | |
78 | pinctrl-0 = <&led_pin_gpio7_7>; | |
79 | ||
80 | user { | |
81 | label = "Heartbeat"; | |
82 | gpios = <&gpio7 7 0>; | |
83 | linux,default-trigger = "heartbeat"; | |
84 | }; | |
85 | }; | |
86 | ||
87 | regulators { | |
88 | compatible = "simple-bus"; | |
89 | #address-cells = <1>; | |
90 | #size-cells = <0>; | |
91 | ||
92 | reg_3p2v: regulator@0 { | |
93 | compatible = "regulator-fixed"; | |
94 | reg = <0>; | |
95 | regulator-name = "3P2V"; | |
96 | regulator-min-microvolt = <3200000>; | |
97 | regulator-max-microvolt = <3200000>; | |
98 | regulator-always-on; | |
99 | }; | |
100 | ||
101 | reg_usb_vbus: regulator@1 { | |
102 | compatible = "regulator-fixed"; | |
103 | reg = <1>; | |
104 | regulator-name = "usb_vbus"; | |
105 | regulator-min-microvolt = <5000000>; | |
106 | regulator-max-microvolt = <5000000>; | |
107 | gpio = <&gpio7 8 0>; | |
108 | enable-active-high; | |
109 | }; | |
110 | }; | |
111 | ||
112 | sound { | |
113 | compatible = "fsl,imx53-qsb-sgtl5000", | |
114 | "fsl,imx-audio-sgtl5000"; | |
115 | model = "imx53-qsb-sgtl5000"; | |
116 | ssi-controller = <&ssi2>; | |
117 | audio-codec = <&sgtl5000>; | |
118 | audio-routing = | |
119 | "MIC_IN", "Mic Jack", | |
120 | "Mic Jack", "Mic Bias", | |
121 | "Headphone Jack", "HP_OUT"; | |
122 | mux-int-port = <2>; | |
123 | mux-ext-port = <5>; | |
124 | }; | |
125 | }; | |
126 | ||
eea96566 SH |
127 | &cpu0 { |
128 | /* CPU rated to 1GHz, not 1.2GHz as per the default settings */ | |
129 | operating-points = < | |
130 | /* kHz uV */ | |
131 | 166666 850000 | |
132 | 400000 900000 | |
133 | 800000 1050000 | |
134 | 1000000 1200000 | |
135 | >; | |
136 | }; | |
137 | ||
d5eb195f ST |
138 | &esdhc1 { |
139 | pinctrl-names = "default"; | |
140 | pinctrl-0 = <&pinctrl_esdhc1>; | |
141 | status = "okay"; | |
142 | }; | |
143 | ||
f83ccb93 LT |
144 | &ipu_di0_disp0 { |
145 | remote-endpoint = <&display0_in>; | |
146 | }; | |
147 | ||
d5eb195f | 148 | &ssi2 { |
d5eb195f ST |
149 | status = "okay"; |
150 | }; | |
151 | ||
152 | &esdhc3 { | |
153 | pinctrl-names = "default"; | |
154 | pinctrl-0 = <&pinctrl_esdhc3>; | |
94d76946 DA |
155 | cd-gpios = <&gpio3 11 GPIO_ACTIVE_LOW>; |
156 | wp-gpios = <&gpio3 12 GPIO_ACTIVE_HIGH>; | |
d5eb195f ST |
157 | bus-width = <8>; |
158 | status = "okay"; | |
159 | }; | |
160 | ||
161 | &iomuxc { | |
162 | pinctrl-names = "default"; | |
163 | pinctrl-0 = <&pinctrl_hog>; | |
164 | ||
165 | imx53-qsb { | |
166 | pinctrl_hog: hoggrp { | |
167 | fsl,pins = < | |
d5eb195f ST |
168 | MX53_PAD_GPIO_8__GPIO1_8 0x80000000 |
169 | MX53_PAD_PATA_DATA14__GPIO2_14 0x80000000 | |
170 | MX53_PAD_PATA_DATA15__GPIO2_15 0x80000000 | |
171 | MX53_PAD_EIM_DA11__GPIO3_11 0x80000000 | |
172 | MX53_PAD_EIM_DA12__GPIO3_12 0x80000000 | |
173 | MX53_PAD_PATA_DA_0__GPIO7_6 0x80000000 | |
174 | MX53_PAD_PATA_DA_2__GPIO7_8 0x80000000 | |
175 | MX53_PAD_GPIO_16__GPIO7_11 0x80000000 | |
176 | >; | |
177 | }; | |
178 | ||
dd342190 | 179 | led_pin_gpio7_7: led_gpio7_7 { |
d5eb195f ST |
180 | fsl,pins = < |
181 | MX53_PAD_PATA_DA_1__GPIO7_7 0x80000000 | |
182 | >; | |
183 | }; | |
184 | ||
185 | pinctrl_audmux: audmuxgrp { | |
186 | fsl,pins = < | |
187 | MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC 0x80000000 | |
188 | MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD 0x80000000 | |
189 | MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS 0x80000000 | |
190 | MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD 0x80000000 | |
191 | >; | |
192 | }; | |
193 | ||
3d177f48 FE |
194 | pinctrl_codec: codecgrp { |
195 | fsl,pins = < | |
196 | MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x1c4 | |
197 | >; | |
198 | }; | |
199 | ||
d5eb195f ST |
200 | pinctrl_esdhc1: esdhc1grp { |
201 | fsl,pins = < | |
202 | MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5 | |
203 | MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5 | |
204 | MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5 | |
205 | MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5 | |
206 | MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5 | |
207 | MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5 | |
208 | >; | |
209 | }; | |
210 | ||
211 | pinctrl_esdhc3: esdhc3grp { | |
212 | fsl,pins = < | |
213 | MX53_PAD_PATA_DATA8__ESDHC3_DAT0 0x1d5 | |
214 | MX53_PAD_PATA_DATA9__ESDHC3_DAT1 0x1d5 | |
215 | MX53_PAD_PATA_DATA10__ESDHC3_DAT2 0x1d5 | |
216 | MX53_PAD_PATA_DATA11__ESDHC3_DAT3 0x1d5 | |
217 | MX53_PAD_PATA_DATA0__ESDHC3_DAT4 0x1d5 | |
218 | MX53_PAD_PATA_DATA1__ESDHC3_DAT5 0x1d5 | |
219 | MX53_PAD_PATA_DATA2__ESDHC3_DAT6 0x1d5 | |
220 | MX53_PAD_PATA_DATA3__ESDHC3_DAT7 0x1d5 | |
221 | MX53_PAD_PATA_RESET_B__ESDHC3_CMD 0x1d5 | |
222 | MX53_PAD_PATA_IORDY__ESDHC3_CLK 0x1d5 | |
223 | >; | |
224 | }; | |
225 | ||
226 | pinctrl_fec: fecgrp { | |
227 | fsl,pins = < | |
8b649e42 PB |
228 | MX53_PAD_FEC_MDC__FEC_MDC 0x4 |
229 | MX53_PAD_FEC_MDIO__FEC_MDIO 0x1fc | |
230 | MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x180 | |
231 | MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x180 | |
232 | MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x180 | |
233 | MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x180 | |
234 | MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x180 | |
235 | MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x4 | |
236 | MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x4 | |
237 | MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x4 | |
d5eb195f ST |
238 | >; |
239 | }; | |
240 | ||
fb00ff4c | 241 | /* open drain */ |
d5eb195f ST |
242 | pinctrl_i2c1: i2c1grp { |
243 | fsl,pins = < | |
fb00ff4c LS |
244 | MX53_PAD_CSI0_DAT8__I2C1_SDA 0x400001ec |
245 | MX53_PAD_CSI0_DAT9__I2C1_SCL 0x400001ec | |
d5eb195f ST |
246 | >; |
247 | }; | |
248 | ||
249 | pinctrl_i2c2: i2c2grp { | |
250 | fsl,pins = < | |
251 | MX53_PAD_KEY_ROW3__I2C2_SDA 0xc0000000 | |
252 | MX53_PAD_KEY_COL3__I2C2_SCL 0xc0000000 | |
253 | >; | |
254 | }; | |
255 | ||
256 | pinctrl_ipu_disp0: ipudisp0grp { | |
257 | fsl,pins = < | |
258 | MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK 0x5 | |
259 | MX53_PAD_DI0_PIN15__IPU_DI0_PIN15 0x5 | |
260 | MX53_PAD_DI0_PIN2__IPU_DI0_PIN2 0x5 | |
261 | MX53_PAD_DI0_PIN3__IPU_DI0_PIN3 0x5 | |
262 | MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0 0x5 | |
263 | MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1 0x5 | |
264 | MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2 0x5 | |
265 | MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3 0x5 | |
266 | MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4 0x5 | |
267 | MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5 0x5 | |
268 | MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6 0x5 | |
269 | MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7 0x5 | |
270 | MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8 0x5 | |
271 | MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9 0x5 | |
272 | MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10 0x5 | |
273 | MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11 0x5 | |
274 | MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12 0x5 | |
275 | MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13 0x5 | |
276 | MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14 0x5 | |
277 | MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15 0x5 | |
278 | MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16 0x5 | |
279 | MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17 0x5 | |
280 | MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18 0x5 | |
281 | MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19 0x5 | |
282 | MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20 0x5 | |
283 | MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21 0x5 | |
284 | MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22 0x5 | |
285 | MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23 0x5 | |
286 | >; | |
287 | }; | |
288 | ||
204d156a FE |
289 | pinctrl_vga_sync: vgasync-grp { |
290 | fsl,pins = < | |
291 | /* VGA_HSYNC, VSYNC with max drive strength */ | |
292 | MX53_PAD_EIM_OE__IPU_DI1_PIN7 0xe6 | |
293 | MX53_PAD_EIM_RW__IPU_DI1_PIN8 0xe6 | |
294 | >; | |
295 | }; | |
296 | ||
d5eb195f ST |
297 | pinctrl_uart1: uart1grp { |
298 | fsl,pins = < | |
299 | MX53_PAD_CSI0_DAT10__UART1_TXD_MUX 0x1e4 | |
300 | MX53_PAD_CSI0_DAT11__UART1_RXD_MUX 0x1e4 | |
301 | >; | |
302 | }; | |
303 | }; | |
304 | }; | |
305 | ||
204d156a FE |
306 | &tve { |
307 | pinctrl-names = "default"; | |
308 | pinctrl-0 = <&pinctrl_vga_sync>; | |
de242640 | 309 | ddc-i2c-bus = <&i2c2>; |
204d156a | 310 | fsl,tve-mode = "vga"; |
de242640 PZ |
311 | fsl,hsync-pin = <7>; /* IPU DI1 PIN7 via EIM_OE */ |
312 | fsl,vsync-pin = <8>; /* IPU DI1 PIN8 via EIM_RW */ | |
204d156a FE |
313 | status = "okay"; |
314 | }; | |
315 | ||
d5eb195f ST |
316 | &uart1 { |
317 | pinctrl-names = "default"; | |
318 | pinctrl-0 = <&pinctrl_uart1>; | |
319 | status = "okay"; | |
320 | }; | |
321 | ||
322 | &i2c2 { | |
323 | pinctrl-names = "default"; | |
324 | pinctrl-0 = <&pinctrl_i2c2>; | |
325 | status = "okay"; | |
326 | ||
8dccafaa | 327 | sgtl5000: codec@a { |
d5eb195f ST |
328 | compatible = "fsl,sgtl5000"; |
329 | reg = <0x0a>; | |
3d177f48 FE |
330 | pinctrl-names = "default"; |
331 | pinctrl-0 = <&pinctrl_codec>; | |
b08d2fb5 | 332 | #sound-dai-cells = <0>; |
d5eb195f ST |
333 | VDDA-supply = <®_3p2v>; |
334 | VDDIO-supply = <®_3p2v>; | |
335 | clocks = <&clks IMX5_CLK_SSI_EXT1_GATE>; | |
336 | }; | |
337 | }; | |
338 | ||
339 | &i2c1 { | |
340 | pinctrl-names = "default"; | |
341 | pinctrl-0 = <&pinctrl_i2c1>; | |
342 | status = "okay"; | |
343 | ||
344 | accelerometer: mma8450@1c { | |
345 | compatible = "fsl,mma8450"; | |
346 | reg = <0x1c>; | |
347 | }; | |
348 | }; | |
349 | ||
350 | &audmux { | |
351 | pinctrl-names = "default"; | |
352 | pinctrl-0 = <&pinctrl_audmux>; | |
353 | status = "okay"; | |
354 | }; | |
355 | ||
356 | &fec { | |
357 | pinctrl-names = "default"; | |
358 | pinctrl-0 = <&pinctrl_fec>; | |
359 | phy-mode = "rmii"; | |
12de44f5 | 360 | phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>; |
d5eb195f ST |
361 | status = "okay"; |
362 | }; | |
363 | ||
364 | &sata { | |
365 | status = "okay"; | |
366 | }; | |
367 | ||
368 | &vpu { | |
369 | status = "okay"; | |
370 | }; | |
371 | ||
372 | &usbh1 { | |
373 | vbus-supply = <®_usb_vbus>; | |
374 | phy_type = "utmi"; | |
375 | status = "okay"; | |
376 | }; | |
377 | ||
378 | &usbotg { | |
379 | dr_mode = "peripheral"; | |
380 | status = "okay"; | |
381 | }; |