[mirror_ubuntu-jammy-kernel.git] / arch / arm / boot / dts / imx53-tqma53.dtsi

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright 2012 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
 * Copyright 2012 Steffen Trumtrar <s.trumtrar@pengutronix.de>, Pengutronix
 */

#include "imx53.dtsi"

/ {
	model = "TQ TQMa53";
	compatible = "tq,tqma53", "fsl,imx53";

	memory@70000000 {
		device_type = "memory";
		reg = <0x70000000 0x40000000>; /* Up to 1GiB */
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		reg_3p3v: regulator@0 {
			compatible = "regulator-fixed";
			reg = <0>;
			regulator-name = "3P3V";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			regulator-always-on;
		};
	};
};

&esdhc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_esdhc2>,
		    <&pinctrl_esdhc2_cdwp>;
	vmmc-supply = <&reg_3p3v>;
	wp-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
	cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
	status = "disabled";
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart3>;
	status = "disabled";
};

&ecspi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi1>;
	cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>,
		   <&gpio3 24 0>, <&gpio3 25 0>;
	status = "disabled";
};

&esdhc3 { /* EMMC */
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_esdhc3>;
	vmmc-supply = <&reg_3p3v>;
	non-removable;
	bus-width = <8>;
	status = "okay";
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog>;

	imx53-tqma53 {
		pinctrl_hog: hoggrp {
			fsl,pins = <
				 MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x80000000 /* SSI_MCLK */
				 MX53_PAD_PATA_DA_1__GPIO7_7     0x80000000 /* LCD_BLT_EN */
				 MX53_PAD_PATA_DA_2__GPIO7_8     0x80000000 /* LCD_RESET */
				 MX53_PAD_PATA_DATA5__GPIO2_5    0x80000000 /* LCD_POWER */
				 MX53_PAD_PATA_DATA6__GPIO2_6    0x80000000 /* PMIC_INT */
				 MX53_PAD_PATA_DATA14__GPIO2_14  0x80000000 /* CSI_RST */
				 MX53_PAD_PATA_DATA15__GPIO2_15  0x80000000 /* CSI_PWDN */
				 MX53_PAD_GPIO_19__GPIO4_5 	 0x80000000 /* #SYSTEM_DOWN */
				 MX53_PAD_GPIO_3__GPIO1_3        0x80000000
				 MX53_PAD_PATA_DA_0__GPIO7_6	 0x80000000 /* #PHY_RESET */
				 MX53_PAD_GPIO_1__PWM2_PWMO	 0x80000000 /* LCD_CONTRAST */
			>;
		};

		pinctrl_audmux: audmuxgrp {
			fsl,pins = <
				MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC	0x80000000
				MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD	0x80000000
				MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS	0x80000000
				MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD	0x80000000
			>;
		};

		pinctrl_can1: can1grp {
			fsl,pins = <
				MX53_PAD_KEY_COL2__CAN1_TXCAN		0x80000000
				MX53_PAD_KEY_ROW2__CAN1_RXCAN		0x80000000
			>;
		};

		pinctrl_can2: can2grp {
			fsl,pins = <
				MX53_PAD_KEY_COL4__CAN2_TXCAN		0x80000000
				MX53_PAD_KEY_ROW4__CAN2_RXCAN		0x80000000
			>;
		};

		pinctrl_cspi: cspigrp {
			fsl,pins = <
				MX53_PAD_SD1_DATA0__CSPI_MISO		0x1d5
				MX53_PAD_SD1_CMD__CSPI_MOSI		0x1d5
				MX53_PAD_SD1_CLK__CSPI_SCLK		0x1d5
			>;
		};

		pinctrl_ecspi1: ecspi1grp {
			fsl,pins = <
				MX53_PAD_EIM_D16__ECSPI1_SCLK		0x80000000
				MX53_PAD_EIM_D17__ECSPI1_MISO		0x80000000
				MX53_PAD_EIM_D18__ECSPI1_MOSI		0x80000000
			>;
		};

		pinctrl_esdhc2: esdhc2grp {
			fsl,pins = <
				MX53_PAD_SD2_CMD__ESDHC2_CMD		0x1d5
				MX53_PAD_SD2_CLK__ESDHC2_CLK		0x1d5
				MX53_PAD_SD2_DATA0__ESDHC2_DAT0		0x1d5
				MX53_PAD_SD2_DATA1__ESDHC2_DAT1		0x1d5
				MX53_PAD_SD2_DATA2__ESDHC2_DAT2		0x1d5
				MX53_PAD_SD2_DATA3__ESDHC2_DAT3		0x1d5
			>;
		};

		pinctrl_esdhc2_cdwp: esdhc2cdwp {
			fsl,pins = <
				MX53_PAD_GPIO_4__GPIO1_4	0x80000000 /* SD2_CD */
				MX53_PAD_GPIO_2__GPIO1_2	0x80000000 /* SD2_WP */
			>;
		};

		pinctrl_esdhc3: esdhc3grp {
			fsl,pins = <
				MX53_PAD_PATA_DATA8__ESDHC3_DAT0	0x1d5
				MX53_PAD_PATA_DATA9__ESDHC3_DAT1	0x1d5
				MX53_PAD_PATA_DATA10__ESDHC3_DAT2	0x1d5
				MX53_PAD_PATA_DATA11__ESDHC3_DAT3	0x1d5
				MX53_PAD_PATA_DATA0__ESDHC3_DAT4	0x1d5
				MX53_PAD_PATA_DATA1__ESDHC3_DAT5	0x1d5
				MX53_PAD_PATA_DATA2__ESDHC3_DAT6	0x1d5
				MX53_PAD_PATA_DATA3__ESDHC3_DAT7	0x1d5
				MX53_PAD_PATA_RESET_B__ESDHC3_CMD	0x1d5
				MX53_PAD_PATA_IORDY__ESDHC3_CLK		0x1d5
			>;
		};

		pinctrl_fec: fecgrp {
			fsl,pins = <
				MX53_PAD_FEC_MDC__FEC_MDC		0x80000000
				MX53_PAD_FEC_MDIO__FEC_MDIO		0x80000000
				MX53_PAD_FEC_REF_CLK__FEC_TX_CLK	0x80000000
				MX53_PAD_FEC_RX_ER__FEC_RX_ER		0x80000000
				MX53_PAD_FEC_CRS_DV__FEC_RX_DV		0x80000000
				MX53_PAD_FEC_RXD1__FEC_RDATA_1		0x80000000
				MX53_PAD_FEC_RXD0__FEC_RDATA_0		0x80000000
				MX53_PAD_FEC_TX_EN__FEC_TX_EN		0x80000000
				MX53_PAD_FEC_TXD1__FEC_TDATA_1		0x80000000
				MX53_PAD_FEC_TXD0__FEC_TDATA_0		0x80000000
			>;
		};

		pinctrl_i2c2: i2c2grp {
			fsl,pins = <
				MX53_PAD_KEY_ROW3__I2C2_SDA		0xc0000000
				MX53_PAD_KEY_COL3__I2C2_SCL		0xc0000000
			>;
		};

		pinctrl_i2c3: i2c3grp {
			fsl,pins = <
				MX53_PAD_GPIO_6__I2C3_SDA		0xc0000000
				MX53_PAD_GPIO_5__I2C3_SCL		0xc0000000
			>;
		};

		pinctrl_uart1: uart1grp {
			fsl,pins = <
				MX53_PAD_PATA_DIOW__UART1_TXD_MUX	0x1e4
				MX53_PAD_PATA_DMACK__UART1_RXD_MUX	0x1e4
			>;
		};

		pinctrl_uart2: uart2grp {
			fsl,pins = <
				MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX	0x1e4
				MX53_PAD_PATA_DMARQ__UART2_TXD_MUX	0x1e4
			>;
		};

		pinctrl_uart3: uart3grp {
			fsl,pins = <
				MX53_PAD_PATA_CS_0__UART3_TXD_MUX	0x1e4
				MX53_PAD_PATA_CS_1__UART3_RXD_MUX	0x1e4
			>;
		};
	};
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	uart-has-rtscts;
	status = "disabled";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	status = "disabled";
};

&can1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_can1>;
	status = "disabled";
};

&can2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_can2>;
	status = "disabled";
};

&i2c3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "disabled";
};

&cspi {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_cspi>;
	cs-gpios = <&gpio1 18 0>, <&gpio1 19 0>,
		   <&gpio1 21 0>;
	status = "disabled";
};

&i2c2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";

	pmic: mc34708@8 {
		compatible = "fsl,mc34708";
		reg = <0x8>;
		fsl,mc13xxx-uses-rtc;
		interrupt-parent = <&gpio2>;
		interrupts = <6 4>; /* PATA_DATA6, active high */
	};

	sensor1: lm75@48 {
		compatible = "lm75";
		reg = <0x48>;
	};

	eeprom: 24c64@50 {
		compatible = "atmel,24c64";
		pagesize = <32>;
		reg = <0x50>;
	};
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_fec>;
	phy-mode = "rmii";
	status = "disabled";
};
Commit	Line	Data
fcaf2036	1	// SPDX-License-Identifier: GPL-2.0-or-later
b17d5169 SH	2	/*
	3	* Copyright 2012 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
	4	* Copyright 2012 Steffen Trumtrar <s.trumtrar@pengutronix.de>, Pengutronix
b17d5169 SH	5	*/
b17d5169 SH	6
36dffd8f	7	#include "imx53.dtsi"
b17d5169 SH	8
	9	/ {
	10	model = "TQ TQMa53";
	11	compatible = "tq,tqma53", "fsl,imx53";
	12
ad00e080	13	memory@70000000 {
e8fd17b9	14	device_type = "memory";
b17d5169 SH	15	reg = <0x70000000 0x40000000>; /* Up to 1GiB */
	16	};
	17
	18	regulators {
	19	compatible = "simple-bus";
352d318c SG	20	#address-cells = <1>;
352d318c SG	21	#size-cells = <0>;
b17d5169	22
352d318c	23	reg_3p3v: regulator@0 {
b17d5169	24	compatible = "regulator-fixed";
352d318c	25	reg = <0>;
b17d5169 SH	26	regulator-name = "3P3V";
	27	regulator-min-microvolt = <3300000>;
	28	regulator-max-microvolt = <3300000>;
	29	regulator-always-on;
	30	};
	31	};
	32	};
	33
	34	&esdhc2 {
	35	pinctrl-names = "default";
7ac0f700 SG	36	pinctrl-0 = <&pinctrl_esdhc2>,
7ac0f700 SG	37	<&pinctrl_esdhc2_cdwp>;
1cbf45e4	38	vmmc-supply = <&reg_3p3v>;
94d76946 DA	39	wp-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
94d76946 DA	40	cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
b17d5169 SH	41	status = "disabled";
	42	};
	43
	44	&uart3 {
	45	pinctrl-names = "default";
7ac0f700	46	pinctrl-0 = <&pinctrl_uart3>;
b17d5169 SH	47	status = "disabled";
	48	};
	49
	50	&ecspi1 {
	51	pinctrl-names = "default";
7ac0f700	52	pinctrl-0 = <&pinctrl_ecspi1>;
b17d5169 SH	53	cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>,
	54	<&gpio3 24 0>, <&gpio3 25 0>;
	55	status = "disabled";
	56	};
	57
	58	&esdhc3 { /* EMMC */
	59	pinctrl-names = "default";
7ac0f700	60	pinctrl-0 = <&pinctrl_esdhc3>;
b17d5169 SH	61	vmmc-supply = <&reg_3p3v>;
	62	non-removable;
	63	bus-width = <8>;
	64	status = "okay";
	65	};
	66
	67	&iomuxc {
	68	pinctrl-names = "default";
	69	pinctrl-0 = <&pinctrl_hog>;
	70
7ac0f700	71	imx53-tqma53 {
b17d5169 SH	72	pinctrl_hog: hoggrp {
b17d5169 SH	73	fsl,pins = <
ce2c243c	74	MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x80000000 /* SSI_MCLK */
87bcb12b PZ	75	MX53_PAD_PATA_DA_1__GPIO7_7 0x80000000 /* LCD_BLT_EN */
	76	MX53_PAD_PATA_DA_2__GPIO7_8 0x80000000 /* LCD_RESET */
	77	MX53_PAD_PATA_DATA5__GPIO2_5 0x80000000 /* LCD_POWER */
	78	MX53_PAD_PATA_DATA6__GPIO2_6 0x80000000 /* PMIC_INT */
	79	MX53_PAD_PATA_DATA14__GPIO2_14 0x80000000 /* CSI_RST */
	80	MX53_PAD_PATA_DATA15__GPIO2_15 0x80000000 /* CSI_PWDN */
ce2c243c	81	MX53_PAD_GPIO_19__GPIO4_5 0x80000000 /* #SYSTEM_DOWN */
87bcb12b	82	MX53_PAD_GPIO_3__GPIO1_3 0x80000000
ce2c243c PZ	83	MX53_PAD_PATA_DA_0__GPIO7_6 0x80000000 /* #PHY_RESET */
ce2c243c PZ	84	MX53_PAD_GPIO_1__PWM2_PWMO 0x80000000 /* LCD_CONTRAST */
b17d5169 SH	85	>;
b17d5169 SH	86	};
7ac0f700 SG	87
	88	pinctrl_audmux: audmuxgrp {
	89	fsl,pins = <
	90	MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC 0x80000000
	91	MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD 0x80000000
	92	MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS 0x80000000
	93	MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD 0x80000000
	94	>;
	95	};
	96
	97	pinctrl_can1: can1grp {
	98	fsl,pins = <
	99	MX53_PAD_KEY_COL2__CAN1_TXCAN 0x80000000
	100	MX53_PAD_KEY_ROW2__CAN1_RXCAN 0x80000000
	101	>;
	102	};
	103
	104	pinctrl_can2: can2grp {
	105	fsl,pins = <
	106	MX53_PAD_KEY_COL4__CAN2_TXCAN 0x80000000
	107	MX53_PAD_KEY_ROW4__CAN2_RXCAN 0x80000000
	108	>;
	109	};
	110
	111	pinctrl_cspi: cspigrp {
	112	fsl,pins = <
	113	MX53_PAD_SD1_DATA0__CSPI_MISO 0x1d5
	114	MX53_PAD_SD1_CMD__CSPI_MOSI 0x1d5
	115	MX53_PAD_SD1_CLK__CSPI_SCLK 0x1d5
	116	>;
	117	};
	118
	119	pinctrl_ecspi1: ecspi1grp {
	120	fsl,pins = <
	121	MX53_PAD_EIM_D16__ECSPI1_SCLK 0x80000000
	122	MX53_PAD_EIM_D17__ECSPI1_MISO 0x80000000
	123	MX53_PAD_EIM_D18__ECSPI1_MOSI 0x80000000
	124	>;
	125	};
	126
	127	pinctrl_esdhc2: esdhc2grp {
	128	fsl,pins = <
	129	MX53_PAD_SD2_CMD__ESDHC2_CMD 0x1d5
	130	MX53_PAD_SD2_CLK__ESDHC2_CLK 0x1d5
	131	MX53_PAD_SD2_DATA0__ESDHC2_DAT0 0x1d5
	132	MX53_PAD_SD2_DATA1__ESDHC2_DAT1 0x1d5
	133	MX53_PAD_SD2_DATA2__ESDHC2_DAT2 0x1d5
	134	MX53_PAD_SD2_DATA3__ESDHC2_DAT3 0x1d5
	135	>;
	136	};
	137
	138	pinctrl_esdhc2_cdwp: esdhc2cdwp {
	139	fsl,pins = <
	140	MX53_PAD_GPIO_4__GPIO1_4 0x80000000 /* SD2_CD */
	141	MX53_PAD_GPIO_2__GPIO1_2 0x80000000 /* SD2_WP */
	142	>;
	143	};
	144
	145	pinctrl_esdhc3: esdhc3grp {
	146	fsl,pins = <
	147	MX53_PAD_PATA_DATA8__ESDHC3_DAT0 0x1d5
	148	MX53_PAD_PATA_DATA9__ESDHC3_DAT1 0x1d5
	149	MX53_PAD_PATA_DATA10__ESDHC3_DAT2 0x1d5
	150	MX53_PAD_PATA_DATA11__ESDHC3_DAT3 0x1d5
151	MX53_PAD_PATA_DATA0__ESDHC3_DAT4 0x1d5
152	MX53_PAD_PATA_DATA1__ESDHC3_DAT5 0x1d5
153	MX53_PAD_PATA_DATA2__ESDHC3_DAT6 0x1d5
154	MX53_PAD_PATA_DATA3__ESDHC3_DAT7 0x1d5
155	MX53_PAD_PATA_RESET_B__ESDHC3_CMD 0x1d5
156	MX53_PAD_PATA_IORDY__ESDHC3_CLK 0x1d5
157	>;
158	};
159
160	pinctrl_fec: fecgrp {
161	fsl,pins = <
162	MX53_PAD_FEC_MDC__FEC_MDC 0x80000000
163	MX53_PAD_FEC_MDIO__FEC_MDIO 0x80000000
164	MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x80000000
165	MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x80000000
166	MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x80000000
167	MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x80000000
168	MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x80000000
169	MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000
170	MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x80000000
171	MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x80000000
172	>;
173	};
174
175	pinctrl_i2c2: i2c2grp {
176	fsl,pins = <
177	MX53_PAD_KEY_ROW3__I2C2_SDA 0xc0000000
178	MX53_PAD_KEY_COL3__I2C2_SCL 0xc0000000
179	>;
180	};
181
182	pinctrl_i2c3: i2c3grp {
183	fsl,pins = <
184	MX53_PAD_GPIO_6__I2C3_SDA 0xc0000000
185	MX53_PAD_GPIO_5__I2C3_SCL 0xc0000000
186	>;
187	};
188
189	pinctrl_uart1: uart1grp {
190	fsl,pins = <
191	MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1e4
192	MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4
193	>;
194	};
195
196	pinctrl_uart2: uart2grp {
197	fsl,pins = <
198	MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1e4
199	MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1e4
200	>;
201	};
202
203	pinctrl_uart3: uart3grp {
204	fsl,pins = <
205	MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4
206	MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4
207	>;
208	};
b17d5169 SH	209	};
	210	};
	211
	212	&uart1 {
	213	pinctrl-names = "default";
7ac0f700	214	pinctrl-0 = <&pinctrl_uart1>;
2e7c416c	215	uart-has-rtscts;
b17d5169 SH	216	status = "disabled";
	217	};
	218
	219	&uart2 {
	220	pinctrl-names = "default";
7ac0f700	221	pinctrl-0 = <&pinctrl_uart2>;
b17d5169 SH	222	status = "disabled";
	223	};
	224
	225	&can1 {
	226	pinctrl-names = "default";
7ac0f700	227	pinctrl-0 = <&pinctrl_can1>;
b17d5169 SH	228	status = "disabled";
	229	};
	230
	231	&can2 {
	232	pinctrl-names = "default";
7ac0f700	233	pinctrl-0 = <&pinctrl_can2>;
b17d5169 SH	234	status = "disabled";
	235	};
	236
	237	&i2c3 {
	238	pinctrl-names = "default";
7ac0f700	239	pinctrl-0 = <&pinctrl_i2c3>;
b17d5169 SH	240	status = "disabled";
	241	};
	242
	243	&cspi {
	244	pinctrl-names = "default";
7ac0f700	245	pinctrl-0 = <&pinctrl_cspi>;
b17d5169 SH	246	cs-gpios = <&gpio1 18 0>, <&gpio1 19 0>,
	247	<&gpio1 21 0>;
	248	status = "disabled";
	249	};
	250
	251	&i2c2 {
	252	pinctrl-names = "default";
7ac0f700	253	pinctrl-0 = <&pinctrl_i2c2>;
b17d5169 SH	254	status = "okay";
	255
	256	pmic: mc34708@8 {
	257	compatible = "fsl,mc34708";
	258	reg = <0x8>;
	259	fsl,mc13xxx-uses-rtc;
	260	interrupt-parent = <&gpio2>;
1aa6f57d	261	interrupts = <6 4>; /* PATA_DATA6, active high */
b17d5169 SH	262	};
	263
	264	sensor1: lm75@48 {
	265	compatible = "lm75";
	266	reg = <0x48>;
	267	};
	268
	269	eeprom: 24c64@50 {
30dd9fb9	270	compatible = "atmel,24c64";
b17d5169 SH	271	pagesize = <32>;
	272	reg = <0x50>;
	273	};
	274	};
	275
	276	&fec {
	277	pinctrl-names = "default";
7ac0f700	278	pinctrl-0 = <&pinctrl_fec>;
b17d5169 SH	279	phy-mode = "rmii";
	280	status = "disabled";
	281	};