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4f5b6ba6 LW |
1 | /* |
2 | * Copyright 2013 Lothar Waßmann <LW@KARO-electronics.de> | |
3 | * | |
4 | * The code contained herein is licensed under the GNU General Public | |
5 | * License. You may obtain a copy of the GNU General Public License | |
6 | * Version 2 at the following locations: | |
7 | * | |
8 | * http://www.opensource.org/licenses/gpl-license.html | |
9 | * http://www.gnu.org/copyleft/gpl.html | |
10 | */ | |
11 | ||
12 | /dts-v1/; | |
13 | #include "imx53-tx53.dtsi" | |
14 | #include <dt-bindings/input/input.h> | |
09bb4319 | 15 | #include <dt-bindings/interrupt-controller/irq.h> |
4f5b6ba6 LW |
16 | #include <dt-bindings/pwm/pwm.h> |
17 | ||
18 | / { | |
19 | model = "Ka-Ro electronics TX53 module (LCD)"; | |
20 | compatible = "karo,tx53", "fsl,imx53"; | |
21 | ||
22 | aliases { | |
23 | display = &display; | |
24 | }; | |
25 | ||
26 | soc { | |
27 | display: display@di0 { | |
28 | compatible = "fsl,imx-parallel-display"; | |
4f5b6ba6 LW |
29 | interface-pix-fmt = "rgb24"; |
30 | pinctrl-names = "default"; | |
31 | pinctrl-0 = <&pinctrl_rgb24_vga1>; | |
32 | status = "okay"; | |
33 | ||
0c658c48 SG |
34 | port { |
35 | display0_in: endpoint { | |
36 | remote-endpoint = <&ipu_di0_disp0>; | |
37 | }; | |
38 | }; | |
39 | ||
4f5b6ba6 LW |
40 | display-timings { |
41 | VGA { | |
42 | clock-frequency = <25200000>; | |
43 | hactive = <640>; | |
44 | vactive = <480>; | |
45 | hback-porch = <48>; | |
46 | hsync-len = <96>; | |
47 | hfront-porch = <16>; | |
48 | vback-porch = <31>; | |
49 | vsync-len = <2>; | |
50 | vfront-porch = <12>; | |
51 | hsync-active = <0>; | |
52 | vsync-active = <0>; | |
53 | de-active = <1>; | |
54 | pixelclk-active = <0>; | |
55 | }; | |
56 | ||
57 | ETV570 { | |
58 | clock-frequency = <25200000>; | |
59 | hactive = <640>; | |
60 | vactive = <480>; | |
61 | hback-porch = <114>; | |
62 | hsync-len = <30>; | |
63 | hfront-porch = <16>; | |
64 | vback-porch = <32>; | |
65 | vsync-len = <3>; | |
66 | vfront-porch = <10>; | |
67 | hsync-active = <0>; | |
68 | vsync-active = <0>; | |
69 | de-active = <1>; | |
70 | pixelclk-active = <0>; | |
71 | }; | |
72 | ||
73 | ET0350 { | |
74 | clock-frequency = <6413760>; | |
75 | hactive = <320>; | |
76 | vactive = <240>; | |
77 | hback-porch = <34>; | |
78 | hsync-len = <34>; | |
79 | hfront-porch = <20>; | |
80 | vback-porch = <15>; | |
81 | vsync-len = <3>; | |
82 | vfront-porch = <4>; | |
83 | hsync-active = <0>; | |
84 | vsync-active = <0>; | |
85 | de-active = <1>; | |
86 | pixelclk-active = <0>; | |
87 | }; | |
88 | ||
89 | ET0430 { | |
90 | clock-frequency = <9009000>; | |
91 | hactive = <480>; | |
92 | vactive = <272>; | |
93 | hback-porch = <2>; | |
94 | hsync-len = <41>; | |
95 | hfront-porch = <2>; | |
96 | vback-porch = <2>; | |
97 | vsync-len = <10>; | |
98 | vfront-porch = <2>; | |
99 | hsync-active = <0>; | |
100 | vsync-active = <0>; | |
101 | de-active = <1>; | |
102 | pixelclk-active = <1>; | |
103 | }; | |
104 | ||
105 | ET0500 { | |
106 | clock-frequency = <33264000>; | |
107 | hactive = <800>; | |
108 | vactive = <480>; | |
109 | hback-porch = <88>; | |
110 | hsync-len = <128>; | |
111 | hfront-porch = <40>; | |
112 | vback-porch = <33>; | |
113 | vsync-len = <2>; | |
114 | vfront-porch = <10>; | |
115 | hsync-active = <0>; | |
116 | vsync-active = <0>; | |
117 | de-active = <1>; | |
118 | pixelclk-active = <0>; | |
119 | }; | |
120 | ||
121 | ET0700 { /* same as ET0500 */ | |
122 | clock-frequency = <33264000>; | |
123 | hactive = <800>; | |
124 | vactive = <480>; | |
125 | hback-porch = <88>; | |
126 | hsync-len = <128>; | |
127 | hfront-porch = <40>; | |
128 | vback-porch = <33>; | |
129 | vsync-len = <2>; | |
130 | vfront-porch = <10>; | |
131 | hsync-active = <0>; | |
132 | vsync-active = <0>; | |
133 | de-active = <1>; | |
134 | pixelclk-active = <0>; | |
135 | }; | |
136 | ||
137 | ETQ570 { | |
138 | clock-frequency = <6596040>; | |
139 | hactive = <320>; | |
140 | vactive = <240>; | |
141 | hback-porch = <38>; | |
142 | hsync-len = <30>; | |
143 | hfront-porch = <30>; | |
144 | vback-porch = <16>; | |
145 | vsync-len = <3>; | |
146 | vfront-porch = <4>; | |
147 | hsync-active = <0>; | |
148 | vsync-active = <0>; | |
149 | de-active = <1>; | |
150 | pixelclk-active = <0>; | |
151 | }; | |
152 | }; | |
153 | }; | |
154 | }; | |
155 | ||
156 | backlight: backlight { | |
157 | compatible = "pwm-backlight"; | |
158 | pwms = <&pwm2 0 500000 PWM_POLARITY_INVERTED>; | |
159 | power-supply = <®_3v3>; | |
160 | brightness-levels = < | |
161 | 0 1 2 3 4 5 6 7 8 9 | |
162 | 10 11 12 13 14 15 16 17 18 19 | |
163 | 20 21 22 23 24 25 26 27 28 29 | |
164 | 30 31 32 33 34 35 36 37 38 39 | |
165 | 40 41 42 43 44 45 46 47 48 49 | |
166 | 50 51 52 53 54 55 56 57 58 59 | |
167 | 60 61 62 63 64 65 66 67 68 69 | |
168 | 70 71 72 73 74 75 76 77 78 79 | |
169 | 80 81 82 83 84 85 86 87 88 89 | |
170 | 90 91 92 93 94 95 96 97 98 99 | |
171 | 100 | |
172 | >; | |
173 | default-brightness-level = <50>; | |
174 | }; | |
175 | ||
176 | regulators { | |
177 | reg_lcd_pwr: regulator@5 { | |
178 | compatible = "regulator-fixed"; | |
179 | reg = <5>; | |
180 | regulator-name = "LCD POWER"; | |
181 | regulator-min-microvolt = <3300000>; | |
182 | regulator-max-microvolt = <3300000>; | |
183 | gpio = <&gpio2 31 GPIO_ACTIVE_HIGH>; | |
184 | enable-active-high; | |
185 | regulator-boot-on; | |
186 | }; | |
187 | ||
188 | reg_lcd_reset: regulator@6 { | |
189 | compatible = "regulator-fixed"; | |
190 | reg = <6>; | |
191 | regulator-name = "LCD RESET"; | |
192 | regulator-min-microvolt = <3300000>; | |
193 | regulator-max-microvolt = <3300000>; | |
194 | gpio = <&gpio3 29 GPIO_ACTIVE_HIGH>; | |
195 | enable-active-high; | |
196 | regulator-boot-on; | |
197 | }; | |
198 | }; | |
199 | }; | |
200 | ||
201 | &i2c3 { | |
202 | pinctrl-names = "default"; | |
203 | pinctrl-0 = <&pinctrl_i2c3>; | |
204 | status = "okay"; | |
205 | ||
206 | sgtl5000: codec@0a { | |
207 | compatible = "fsl,sgtl5000"; | |
208 | reg = <0x0a>; | |
209 | VDDA-supply = <®_2v5>; | |
210 | VDDIO-supply = <®_3v3>; | |
211 | clocks = <&mclk>; | |
212 | }; | |
213 | ||
214 | polytouch: edt-ft5x06@38 { | |
215 | compatible = "edt,edt-ft5x06"; | |
216 | reg = <0x38>; | |
217 | pinctrl-names = "default"; | |
218 | pinctrl-0 = <&pinctrl_edt_ft5x06_1>; | |
219 | interrupt-parent = <&gpio6>; | |
09bb4319 | 220 | interrupts = <15 IRQ_TYPE_EDGE_FALLING>; |
4f5b6ba6 LW |
221 | reset-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>; |
222 | wake-gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>; | |
223 | }; | |
224 | ||
225 | touchscreen: tsc2007@48 { | |
226 | compatible = "ti,tsc2007"; | |
227 | reg = <0x48>; | |
228 | pinctrl-names = "default"; | |
229 | pinctrl-0 = <&pinctrl_tsc2007>; | |
230 | interrupt-parent = <&gpio3>; | |
231 | interrupts = <26 0>; | |
232 | gpios = <&gpio3 26 GPIO_ACTIVE_LOW>; | |
233 | ti,x-plate-ohms = <660>; | |
26cefdd1 | 234 | wakeup-source; |
4f5b6ba6 LW |
235 | }; |
236 | }; | |
237 | ||
238 | &iomuxc { | |
239 | imx53-tx53-x03x { | |
240 | pinctrl_edt_ft5x06_1: edt-ft5x06grp-1 { | |
241 | fsl,pins = < | |
242 | MX53_PAD_NANDF_CS2__GPIO6_15 0x1f0 /* Interrupt */ | |
243 | MX53_PAD_EIM_A16__GPIO2_22 0x04 /* Reset */ | |
244 | MX53_PAD_EIM_A17__GPIO2_21 0x04 /* Wake */ | |
245 | >; | |
246 | }; | |
247 | ||
248 | pinctrl_kpp: kppgrp { | |
249 | fsl,pins = < | |
250 | MX53_PAD_GPIO_9__KPP_COL_6 0x1f4 | |
251 | MX53_PAD_GPIO_4__KPP_COL_7 0x1f4 | |
252 | MX53_PAD_KEY_COL2__KPP_COL_2 0x1f4 | |
253 | MX53_PAD_KEY_COL3__KPP_COL_3 0x1f4 | |
254 | MX53_PAD_GPIO_2__KPP_ROW_6 0x1f4 | |
255 | MX53_PAD_GPIO_5__KPP_ROW_7 0x1f4 | |
256 | MX53_PAD_KEY_ROW2__KPP_ROW_2 0x1f4 | |
257 | MX53_PAD_KEY_ROW3__KPP_ROW_3 0x1f4 | |
258 | >; | |
259 | }; | |
260 | ||
261 | pinctrl_rgb24_vga1: rgb24-vgagrp1 { | |
262 | fsl,pins = < | |
263 | MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK 0x5 | |
264 | MX53_PAD_DI0_PIN15__IPU_DI0_PIN15 0x5 | |
265 | MX53_PAD_DI0_PIN2__IPU_DI0_PIN2 0x5 | |
266 | MX53_PAD_DI0_PIN3__IPU_DI0_PIN3 0x5 | |
267 | MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0 0x5 | |
268 | MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1 0x5 | |
269 | MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2 0x5 | |
270 | MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3 0x5 | |
271 | MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4 0x5 | |
272 | MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5 0x5 | |
273 | MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6 0x5 | |
274 | MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7 0x5 | |
275 | MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8 0x5 | |
276 | MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9 0x5 | |
277 | MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10 0x5 | |
278 | MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11 0x5 | |
279 | MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12 0x5 | |
280 | MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13 0x5 | |
281 | MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14 0x5 | |
282 | MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15 0x5 | |
283 | MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16 0x5 | |
284 | MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17 0x5 | |
285 | MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18 0x5 | |
286 | MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19 0x5 | |
287 | MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20 0x5 | |
288 | MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21 0x5 | |
289 | MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22 0x5 | |
290 | MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23 0x5 | |
291 | >; | |
292 | }; | |
293 | ||
294 | pinctrl_tsc2007: tsc2007grp { | |
295 | fsl,pins = < | |
296 | MX53_PAD_EIM_D26__GPIO3_26 0x1f0 /* Interrupt */ | |
297 | >; | |
298 | }; | |
299 | }; | |
300 | }; | |
301 | ||
0c658c48 SG |
302 | &ipu_di0_disp0 { |
303 | remote-endpoint = <&display0_in>; | |
304 | }; | |
305 | ||
4f5b6ba6 LW |
306 | &kpp { |
307 | pinctrl-names = "default"; | |
308 | pinctrl-0 = <&pinctrl_kpp>; | |
309 | /* sample keymap */ | |
310 | /* row/col 0,1 are mapped to KPP row/col 6,7 */ | |
311 | linux,keymap = < | |
312 | MATRIX_KEY(6, 6, KEY_POWER) | |
313 | MATRIX_KEY(6, 7, KEY_KP0) | |
314 | MATRIX_KEY(6, 2, KEY_KP1) | |
315 | MATRIX_KEY(6, 3, KEY_KP2) | |
316 | MATRIX_KEY(7, 6, KEY_KP3) | |
317 | MATRIX_KEY(7, 7, KEY_KP4) | |
318 | MATRIX_KEY(7, 2, KEY_KP5) | |
319 | MATRIX_KEY(7, 3, KEY_KP6) | |
320 | MATRIX_KEY(2, 6, KEY_KP7) | |
321 | MATRIX_KEY(2, 7, KEY_KP8) | |
322 | MATRIX_KEY(2, 2, KEY_KP9) | |
323 | >; | |
324 | status = "okay"; | |
325 | }; |