[mirror_ubuntu-eoan-kernel.git] / arch / arm / boot / dts / imx53-tx53.dtsi

/*
 * Copyright 2012-2017 <LW@KARO-electronics.de>
 * based on imx53-qsb.dts
 *   Copyright 2011 Freescale Semiconductor, Inc.
 *   Copyright 2011 Linaro Ltd.
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License
 *     version 2 as published by the Free Software Foundation.
 *
 *     This file is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */

#include "imx53.dtsi"
#include <dt-bindings/gpio/gpio.h>

/ {
	model = "Ka-Ro electronics TX53 module";
	compatible = "karo,tx53", "fsl,imx53";

	/* Will be filled by the bootloader */
	memory@70000000 {
		reg = <0x70000000 0>;
	};

	aliases {
		can0 = &can2; /* Make the can interface indices consistent with TX28/TX48 modules */
		can1 = &can1;
		ipu = &ipu;
		reg-can-xcvr = &reg_can_xcvr;
		usbh1 = &usbh1;
		usbotg = &usbotg;
	};

	clocks {
		ckih1 {
			clock-frequency = <0>;
		};
	};

	mclk: clock-mclk {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <26000000>;
	};

	gpio-keys {
		compatible = "gpio-keys";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_key>;

		power {
			label = "Power Button";
			gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
			linux,code = <116>; /* KEY_POWER */
			wakeup-source;
		};
	};

	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_stk5led>;

		user {
			label = "Heartbeat";
			gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
		};
	};

	reg_2v5: regulator-2v5 {
		compatible = "regulator-fixed";
		regulator-name = "2V5";
		regulator-min-microvolt = <2500000>;
		regulator-max-microvolt = <2500000>;
	};

	reg_3v3: regulator-3v3 {
		compatible = "regulator-fixed";
		regulator-name = "3V3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};

	reg_can_xcvr: regulator-can-xcvr {
		compatible = "regulator-fixed";
		regulator-name = "CAN XCVR";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_can_xcvr>;
		gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
	};

	reg_usbh1_vbus: regulator-usbh1-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usbh1_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_usbh1_vbus>;
		gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_usbotg_vbus: regulator-usbotg-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usbotg_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_usbotg_vbus>;
		gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	sound {
		compatible = "karo,tx53-audio-sgtl5000", "fsl,imx-audio-sgtl5000";
		model = "tx53-audio-sgtl5000";
		ssi-controller = <&ssi1>;
		audio-codec = <&sgtl5000>;
		audio-routing =
			"MIC_IN", "Mic Jack",
			"Mic Jack", "Mic Bias",
			"Headphone Jack", "HP_OUT";
		/* '1' based port numbers according to datasheet names */
		mux-int-port = <1>;
		mux-ext-port = <5>;
	};
};

&audmux {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ssi1>;
	status = "okay";
};

&can1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_can1>;
	xceiver-supply = <&reg_can_xcvr>;
	status = "okay";
};

&can2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_can2>;
	xceiver-supply = <&reg_can_xcvr>;
	status = "okay";
};

&ecspi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi1>;
	status = "okay";

	cs-gpios = <
		&gpio2 30 GPIO_ACTIVE_HIGH
		&gpio3 19 GPIO_ACTIVE_HIGH
	>;

	spidev0: spi@0 {
		compatible = "spidev";
		reg = <0>;
		spi-max-frequency = <54000000>;
	};

	spidev1: spi@1 {
		compatible = "spidev";
		reg = <1>;
		spi-max-frequency = <54000000>;
	};
};

&esdhc1 {
	cd-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
	fsl,wp-controller;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_esdhc1>;
	status = "okay";
};

&esdhc2 {
	cd-gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
	fsl,wp-controller;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_esdhc2>;
	status = "okay";
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_fec>;
	phy-mode = "rmii";
	phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
	phy-handle = <&phy0>;
	mac-address = [000000000000]; /* placeholder; will be overwritten by bootloader */
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		phy0: ethernet-phy@0 {
			reg = <0>;
			interrupt-parent = <&gpio2>;
			interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
			device_type = "ethernet-phy";
		};
	};
};

&i2c1 {
	pinctrl-names = "default", "gpio";
	pinctrl-0 = <&pinctrl_i2c1>;
	pinctrl-0 = <&pinctrl_i2c1_gpio>;
	scl-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
	sda-gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>;
	clock-frequency = <400000>;
	status = "okay";

	rtc1: ds1339@68 {
		compatible = "dallas,ds1339";
		reg = <0x68>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_ds1339>;
		interrupt-parent = <&gpio4>;
		interrupts = <20 IRQ_TYPE_EDGE_FALLING>;
		trickle-resistor-ohms = <250>;
		trickle-diode-disable;
	};
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog>;

	imx53-tx53 {
		pinctrl_hog: hoggrp {
			/* pins not in use by any device on the Starterkit board series */
			fsl,pins = <
				/* CMOS Sensor Interface */
				MX53_PAD_CSI0_DAT12__GPIO5_30 0x1f4
				MX53_PAD_CSI0_DAT13__GPIO5_31 0x1f4
				MX53_PAD_CSI0_DAT14__GPIO6_0 0x1f4
				MX53_PAD_CSI0_DAT15__GPIO6_1 0x1f4
				MX53_PAD_CSI0_DAT16__GPIO6_2 0x1f4
				MX53_PAD_CSI0_DAT17__GPIO6_3 0x1f4
				MX53_PAD_CSI0_DAT18__GPIO6_4 0x1f4
				MX53_PAD_CSI0_DAT19__GPIO6_5 0x1f4
				MX53_PAD_CSI0_MCLK__GPIO5_19 0x1f4
				MX53_PAD_CSI0_VSYNC__GPIO5_21 0x1f4
				MX53_PAD_CSI0_PIXCLK__GPIO5_18 0x1f4
				MX53_PAD_GPIO_0__GPIO1_0 0x1f4
				/* Module Specific Signal */
				/* MX53_PAD_NANDF_CS2__GPIO6_15 0x1f4 maybe used by EDT-FT5x06 */
				/* MX53_PAD_EIM_A16__GPIO2_22 0x1f4 maybe used by EDT-FT5x06 */
				MX53_PAD_EIM_D29__GPIO3_29 0x1f4
				MX53_PAD_EIM_EB3__GPIO2_31 0x1f4
				/* MX53_PAD_EIM_A17__GPIO2_21 0x1f4 maybe used by EDT-FT5x06 */
				/* MX53_PAD_EIM_A18__GPIO2_20 0x1f4 used by LED */
				MX53_PAD_EIM_A19__GPIO2_19 0x1f4
				MX53_PAD_EIM_A20__GPIO2_18 0x1f4
				MX53_PAD_EIM_A21__GPIO2_17 0x1f4
				MX53_PAD_EIM_A22__GPIO2_16 0x1f4
				MX53_PAD_EIM_A23__GPIO6_6 0x1f4
				MX53_PAD_EIM_A24__GPIO5_4 0x1f4
				MX53_PAD_CSI0_DAT8__GPIO5_26 0x1f4
				MX53_PAD_CSI0_DAT9__GPIO5_27 0x1f4
				MX53_PAD_CSI0_DAT10__GPIO5_28 0x1f4
				MX53_PAD_CSI0_DAT11__GPIO5_29 0x1f4
				/* MX53_PAD_EIM_D22__GPIO3_22 0x1f4 maybe used by EETI touchpanel driver */
				/* MX53_PAD_EIM_D23__GPIO3_23 0x1f4 maybe used by EETI touchpanel driver */
				MX53_PAD_GPIO_13__GPIO4_3 0x1f4
				MX53_PAD_EIM_CS0__GPIO2_23 0x1f4
				MX53_PAD_EIM_CS1__GPIO2_24 0x1f4
				MX53_PAD_CSI0_DATA_EN__GPIO5_20 0x1f4
				MX53_PAD_EIM_WAIT__GPIO5_0 0x1f4
				MX53_PAD_EIM_EB0__GPIO2_28 0x1f4
				MX53_PAD_EIM_EB1__GPIO2_29 0x1f4
				MX53_PAD_EIM_OE__GPIO2_25 0x1f4
				MX53_PAD_EIM_LBA__GPIO2_27 0x1f4
				MX53_PAD_EIM_RW__GPIO2_26 0x1f4
				MX53_PAD_EIM_DA8__GPIO3_8 0x1f4
				MX53_PAD_EIM_DA9__GPIO3_9 0x1f4
				MX53_PAD_EIM_DA10__GPIO3_10 0x1f4
				MX53_PAD_EIM_DA11__GPIO3_11 0x1f4
				MX53_PAD_EIM_DA12__GPIO3_12 0x1f4
				MX53_PAD_EIM_DA13__GPIO3_13 0x1f4
				MX53_PAD_EIM_DA14__GPIO3_14 0x1f4
				MX53_PAD_EIM_DA15__GPIO3_15 0x1f4
				>;
		};

		pinctrl_can1: can1grp {
			fsl,pins = <
				MX53_PAD_GPIO_7__CAN1_TXCAN		0x80000000
				MX53_PAD_GPIO_8__CAN1_RXCAN		0x80000000
			>;
		};

		pinctrl_can2: can2grp {
			fsl,pins = <
				MX53_PAD_KEY_COL4__CAN2_TXCAN		0x80000000
				MX53_PAD_KEY_ROW4__CAN2_RXCAN		0x80000000
			>;
		};

		pinctrl_can_xcvr: can-xcvrgrp {
			fsl,pins = <MX53_PAD_DISP0_DAT0__GPIO4_21 0xe0>; /* Flexcan XCVR enable */
		};

		pinctrl_ds1339: ds1339grp {
			fsl,pins = <MX53_PAD_DI0_PIN4__GPIO4_20 0xe0>;
		};

		pinctrl_ecspi1: ecspi1grp {
			fsl,pins = <
				MX53_PAD_GPIO_19__ECSPI1_RDY		0x80000000
				MX53_PAD_EIM_EB2__ECSPI1_SS0		0x80000000
				MX53_PAD_EIM_D16__ECSPI1_SCLK		0x80000000
				MX53_PAD_EIM_D17__ECSPI1_MISO		0x80000000
				MX53_PAD_EIM_D18__ECSPI1_MOSI		0x80000000
				MX53_PAD_EIM_D19__ECSPI1_SS1		0x80000000
			>;
		};

		pinctrl_esdhc1: esdhc1grp {
			fsl,pins = <
				MX53_PAD_SD1_DATA0__ESDHC1_DAT0		0x1d5
				MX53_PAD_SD1_DATA1__ESDHC1_DAT1		0x1d5
				MX53_PAD_SD1_DATA2__ESDHC1_DAT2		0x1d5
				MX53_PAD_SD1_DATA3__ESDHC1_DAT3		0x1d5
				MX53_PAD_SD1_CMD__ESDHC1_CMD		0x1d5
				MX53_PAD_SD1_CLK__ESDHC1_CLK		0x1d5
				MX53_PAD_EIM_D24__GPIO3_24 0x1f0
			>;
		};

		pinctrl_esdhc2: esdhc2grp {
			fsl,pins = <
				MX53_PAD_SD2_CMD__ESDHC2_CMD		0x1d5
				MX53_PAD_SD2_CLK__ESDHC2_CLK		0x1d5
				MX53_PAD_SD2_DATA0__ESDHC2_DAT0		0x1d5
				MX53_PAD_SD2_DATA1__ESDHC2_DAT1		0x1d5
				MX53_PAD_SD2_DATA2__ESDHC2_DAT2		0x1d5
				MX53_PAD_SD2_DATA3__ESDHC2_DAT3		0x1d5
				MX53_PAD_EIM_D25__GPIO3_25 0x1f0
			>;
		};

		pinctrl_fec: fecgrp {
			fsl,pins = <
				MX53_PAD_FEC_MDC__FEC_MDC		0x80000000
				MX53_PAD_FEC_MDIO__FEC_MDIO		0x80000000
				MX53_PAD_FEC_REF_CLK__FEC_TX_CLK	0x80000000
				MX53_PAD_FEC_RX_ER__FEC_RX_ER		0x80000000
				MX53_PAD_FEC_CRS_DV__FEC_RX_DV		0x80000000
				MX53_PAD_FEC_RXD1__FEC_RDATA_1		0x80000000
				MX53_PAD_FEC_RXD0__FEC_RDATA_0		0x80000000
				MX53_PAD_FEC_TX_EN__FEC_TX_EN		0x80000000
				MX53_PAD_FEC_TXD1__FEC_TDATA_1		0x80000000
				MX53_PAD_FEC_TXD0__FEC_TDATA_0		0x80000000
			>;
		};

		pinctrl_gpio_key: gpio-keygrp {
			fsl,pins = <MX53_PAD_EIM_A25__GPIO5_2 0x1f4>;
		};

		pinctrl_i2c1: i2c1grp {
			fsl,pins = <
				MX53_PAD_EIM_D21__I2C1_SCL		0x400001e4
				MX53_PAD_EIM_D28__I2C1_SDA		0x400001e4
			>;
		};

		pinctrl_i2c1_gpio: i2c1-gpiogrp {
			fsl,pins = <
				MX53_PAD_EIM_D21__GPIO3_21		0x400001e6
				MX53_PAD_EIM_D28__GPIO3_28		0x400001e6
			>;
		};

		pinctrl_i2c3: i2c3grp {
			fsl,pins = <
				MX53_PAD_GPIO_3__I2C3_SCL		0x400001e4
				MX53_PAD_GPIO_6__I2C3_SDA		0x400001e4
			>;
		};

		pinctrl_i2c3_gpio: i2c3-gpiogrp {
			fsl,pins = <
				MX53_PAD_GPIO_3__GPIO1_3		0x400001e6
				MX53_PAD_GPIO_6__GPIO1_6		0x400001e6
			>;
		};

		pinctrl_nand: nandgrp {
			fsl,pins = <
				MX53_PAD_NANDF_WE_B__EMI_NANDF_WE_B	0x4
				MX53_PAD_NANDF_RE_B__EMI_NANDF_RE_B	0x4
				MX53_PAD_NANDF_CLE__EMI_NANDF_CLE	0x4
				MX53_PAD_NANDF_ALE__EMI_NANDF_ALE	0x4
				MX53_PAD_NANDF_WP_B__EMI_NANDF_WP_B	0xe0
				MX53_PAD_NANDF_RB0__EMI_NANDF_RB_0	0xe0
				MX53_PAD_NANDF_CS0__EMI_NANDF_CS_0	0x4
				MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0	0xa4
				MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1	0xa4
				MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2	0xa4
				MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3	0xa4
				MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4	0xa4
				MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5	0xa4
				MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6	0xa4
				MX53_PAD_EIM_DA7__EMI_NAND_WEIM_DA_7	0xa4
			>;
		};

		pinctrl_pwm2: pwm2grp {
			fsl,pins = <
				MX53_PAD_GPIO_1__PWM2_PWMO		0x80000000
			>;
		};

		pinctrl_ssi1: ssi1grp {
			fsl,pins = <
				MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC	0x80000000
				MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD	0x80000000
				MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS	0x80000000
				MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD	0x80000000
			>;
		};

		pinctrl_ssi2: ssi2grp {
			fsl,pins = <
				MX53_PAD_CSI0_DAT4__AUDMUX_AUD3_TXC	0x80000000
				MX53_PAD_CSI0_DAT5__AUDMUX_AUD3_TXD	0x80000000
				MX53_PAD_CSI0_DAT6__AUDMUX_AUD3_TXFS	0x80000000
				MX53_PAD_CSI0_DAT7__AUDMUX_AUD3_RXD	0x80000000
				MX53_PAD_EIM_D27__GPIO3_27 0x1f0
			>;
		};

		pinctrl_stk5led: stk5ledgrp {
			fsl,pins = <MX53_PAD_EIM_A18__GPIO2_20 0xc0>;
		};

		pinctrl_uart1: uart1grp {
			fsl,pins = <
				MX53_PAD_PATA_DIOW__UART1_TXD_MUX	0x1e4
				MX53_PAD_PATA_DMACK__UART1_RXD_MUX	0x1e4
				MX53_PAD_PATA_RESET_B__UART1_CTS	0x1c5
				MX53_PAD_PATA_IORDY__UART1_RTS		0x1c5
			>;
		};

		pinctrl_uart2: uart2grp {
			fsl,pins = <
				MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX	0x1c5
				MX53_PAD_PATA_DMARQ__UART2_TXD_MUX	0x1c5
				MX53_PAD_PATA_DIOR__UART2_RTS		0x1c5
				MX53_PAD_PATA_INTRQ__UART2_CTS		0x1c5
			>;
		};

		pinctrl_uart3: uart3grp {
			fsl,pins = <
				MX53_PAD_PATA_CS_0__UART3_TXD_MUX	0x1e4
				MX53_PAD_PATA_CS_1__UART3_RXD_MUX	0x1e4
				MX53_PAD_PATA_DA_1__UART3_CTS		0x1e4
				MX53_PAD_PATA_DA_2__UART3_RTS		0x1e4
			>;
		};

		pinctrl_usbh1: usbh1grp {
			fsl,pins = <
				MX53_PAD_EIM_D30__GPIO3_30 0x100 /* OC */
			>;
		};

		pinctrl_usbh1_vbus: usbh1-vbusgrp {
			fsl,pins = <
				MX53_PAD_EIM_D31__GPIO3_31 0xe0 /* VBUS ENABLE */
			>;
		};

		pinctrl_usbotg_vbus: usbotg-vbusgrp {
			fsl,pins = <
				MX53_PAD_GPIO_7__GPIO1_7 0xe0 /* VBUS ENABLE */
				MX53_PAD_GPIO_8__GPIO1_8 0x100 /* OC */
			>;
		};
	};
};

&ipu {
	status = "okay";
};

&nfc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_nand>;
	nand-bus-width = <8>;
	nand-ecc-mode = "hw";
	nand-on-flash-bbt;
	status = "okay";
};

&pwm2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm2>;
	#pwm-cells = <3>;
};

&sdma {
	fsl,sdma-ram-script-name = "sdma-imx53.bin";
};

&ssi1 {
	status = "okay";
};

&ssi2 {
	status = "disabled";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	uart-has-rtscts;
	status = "okay";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	uart-has-rtscts;
	status = "okay";
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart3>;
	uart-has-rtscts;
	status = "okay";
};

&usbh1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbh1>;
	phy_type = "utmi";
	disable-over-current;
	vbus-supply = <&reg_usbh1_vbus>;
	status = "okay";
};

&usbotg {
	phy_type = "utmi";
	dr_mode = "peripheral";
	disable-over-current;
	vbus-supply = <&reg_usbotg_vbus>;
	status = "okay";
};
Commit	Line	Data
260cb6a6	1	/*
8771c749	2	* Copyright 2012-2017 <LW@KARO-electronics.de>
4f5b6ba6 LW	3	* based on imx53-qsb.dts
	4	* Copyright 2011 Freescale Semiconductor, Inc.
	5	* Copyright 2011 Linaro Ltd.
260cb6a6	6	*
8771c749 LW	7	* This file is dual-licensed: you can use it either under the terms
	8	* of the GPL or the X11 license, at your option. Note that this dual
	9	* licensing only applies to this file, and not this project as a
	10	* whole.
260cb6a6	11	*
8771c749 LW	12	* a) This file is free software; you can redistribute it and/or
	13	* modify it under the terms of the GNU General Public License
	14	* version 2 as published by the Free Software Foundation.
	15	*
	16	* This file is distributed in the hope that it will be useful,
	17	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	* GNU General Public License for more details.
	20	*
	21	* Or, alternatively,
	22	*
	23	* b) Permission is hereby granted, free of charge, to any person
	24	* obtaining a copy of this software and associated documentation
	25	* files (the "Software"), to deal in the Software without
	26	* restriction, including without limitation the rights to use,
	27	* copy, modify, merge, publish, distribute, sublicense, and/or
	28	* sell copies of the Software, and to permit persons to whom the
	29	* Software is furnished to do so, subject to the following
	30	* conditions:
	31	*
	32	* The above copyright notice and this permission notice shall be
	33	* included in all copies or substantial portions of the Software.
	34	*
	35	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	36	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
	37	* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	38	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
	39	* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
	40	* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	41	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	42	* OTHER DEALINGS IN THE SOFTWARE.
260cb6a6 ST	43	*/
260cb6a6 ST	44
4f5b6ba6 LW	45	#include "imx53.dtsi"
4f5b6ba6 LW	46	#include <dt-bindings/gpio/gpio.h>
260cb6a6 ST	47
260cb6a6 ST	48	/ {
4f5b6ba6	49	model = "Ka-Ro electronics TX53 module";
260cb6a6 ST	50	compatible = "karo,tx53", "fsl,imx53";
260cb6a6 ST	51
6de57233	52	/* Will be filled by the bootloader */
c08be1ad FE	53	memory@70000000 {
c08be1ad FE	54	reg = <0x70000000 0>;
6de57233 MF	55	};
6de57233 MF	56
4f5b6ba6 LW	57	aliases {
	58	can0 = &can2; /* Make the can interface indices consistent with TX28/TX48 modules */
	59	can1 = &can1;
	60	ipu = &ipu;
db7e1772	61	reg-can-xcvr = &reg_can_xcvr;
4f5b6ba6 LW	62	usbh1 = &usbh1;
	63	usbotg = &usbotg;
	64	};
	65
	66	clocks {
	67	ckih1 {
	68	clock-frequency = <0>;
	69	};
8799b5d5	70	};
4f5b6ba6	71
8799b5d5 SG	72	mclk: clock-mclk {
	73	compatible = "fixed-clock";
	74	#clock-cells = <0>;
	75	clock-frequency = <26000000>;
4f5b6ba6 LW	76	};
	77
	78	gpio-keys {
	79	compatible = "gpio-keys";
	80	pinctrl-names = "default";
	81	pinctrl-0 = <&pinctrl_gpio_key>;
	82
	83	power {
	84	label = "Power Button";
	85	gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
	86	linux,code = <116>; /* KEY_POWER */
26cefdd1	87	wakeup-source;
4f5b6ba6 LW	88	};
	89	};
	90
	91	leds {
	92	compatible = "gpio-leds";
	93	pinctrl-names = "default";
	94	pinctrl-0 = <&pinctrl_stk5led>;
	95
	96	user {
	97	label = "Heartbeat";
	98	gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
	99	linux,default-trigger = "heartbeat";
	100	};
260cb6a6 ST	101	};
260cb6a6 ST	102
08f8275d LW	103	reg_2v5: regulator-2v5 {
	104	compatible = "regulator-fixed";
	105	regulator-name = "2V5";
	106	regulator-min-microvolt = <2500000>;
	107	regulator-max-microvolt = <2500000>;
	108	};
4f5b6ba6	109
08f8275d LW	110	reg_3v3: regulator-3v3 {
	111	compatible = "regulator-fixed";
	112	regulator-name = "3V3";
	113	regulator-min-microvolt = <3300000>;
	114	regulator-max-microvolt = <3300000>;
	115	};
4f5b6ba6	116
08f8275d LW	117	reg_can_xcvr: regulator-can-xcvr {
	118	compatible = "regulator-fixed";
	119	regulator-name = "CAN XCVR";
	120	regulator-min-microvolt = <3300000>;
	121	regulator-max-microvolt = <3300000>;
	122	pinctrl-names = "default";
	123	pinctrl-0 = <&pinctrl_can_xcvr>;
	124	gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
	125	};
4f5b6ba6	126
08f8275d LW	127	reg_usbh1_vbus: regulator-usbh1-vbus {
	128	compatible = "regulator-fixed";
	129	regulator-name = "usbh1_vbus";
	130	regulator-min-microvolt = <5000000>;
	131	regulator-max-microvolt = <5000000>;
	132	pinctrl-names = "default";
	133	pinctrl-0 = <&pinctrl_usbh1_vbus>;
	134	gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>;
	135	enable-active-high;
	136	};
4f5b6ba6	137
08f8275d LW	138	reg_usbotg_vbus: regulator-usbotg-vbus {
	139	compatible = "regulator-fixed";
	140	regulator-name = "usbotg_vbus";
	141	regulator-min-microvolt = <5000000>;
	142	regulator-max-microvolt = <5000000>;
	143	pinctrl-names = "default";
	144	pinctrl-0 = <&pinctrl_usbotg_vbus>;
	145	gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
	146	enable-active-high;
4f5b6ba6 LW	147	};
	148
	149	sound {
	150	compatible = "karo,tx53-audio-sgtl5000", "fsl,imx-audio-sgtl5000";
	151	model = "tx53-audio-sgtl5000";
	152	ssi-controller = <&ssi1>;
	153	audio-codec = <&sgtl5000>;
	154	audio-routing =
	155	"MIC_IN", "Mic Jack",
	156	"Mic Jack", "Mic Bias",
	157	"Headphone Jack", "HP_OUT";
	158	/* '1' based port numbers according to datasheet names */
	159	mux-int-port = <1>;
	160	mux-ext-port = <5>;
260cb6a6 ST	161	};
	162	};
	163
4f5b6ba6 LW	164	&audmux {
	165	pinctrl-names = "default";
	166	pinctrl-0 = <&pinctrl_ssi1>;
	167	status = "okay";
	168	};
	169
260cb6a6 ST	170	&can1 {
260cb6a6 ST	171	pinctrl-names = "default";
4f5b6ba6 LW	172	pinctrl-0 = <&pinctrl_can1>;
	173	xceiver-supply = <&reg_can_xcvr>;
	174	status = "okay";
260cb6a6 ST	175	};
	176
	177	&can2 {
	178	pinctrl-names = "default";
4f5b6ba6 LW	179	pinctrl-0 = <&pinctrl_can2>;
	180	xceiver-supply = <&reg_can_xcvr>;
	181	status = "okay";
260cb6a6 ST	182	};
	183
	184	&ecspi1 {
	185	pinctrl-names = "default";
4f5b6ba6	186	pinctrl-0 = <&pinctrl_ecspi1>;
4f5b6ba6 LW	187	status = "okay";
	188
	189	cs-gpios = <
	190	&gpio2 30 GPIO_ACTIVE_HIGH
	191	&gpio3 19 GPIO_ACTIVE_HIGH
	192	>;
	193
	194	spidev0: spi@0 {
	195	compatible = "spidev";
	196	reg = <0>;
	197	spi-max-frequency = <54000000>;
	198	};
	199
	200	spidev1: spi@1 {
	201	compatible = "spidev";
	202	reg = <1>;
	203	spi-max-frequency = <54000000>;
	204	};
260cb6a6 ST	205	};
	206
	207	&esdhc1 {
94d76946	208	cd-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
4f5b6ba6	209	fsl,wp-controller;
260cb6a6	210	pinctrl-names = "default";
4f5b6ba6 LW	211	pinctrl-0 = <&pinctrl_esdhc1>;
4f5b6ba6 LW	212	status = "okay";
260cb6a6 ST	213	};
	214
	215	&esdhc2 {
94d76946	216	cd-gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
4f5b6ba6	217	fsl,wp-controller;
260cb6a6	218	pinctrl-names = "default";
4f5b6ba6 LW	219	pinctrl-0 = <&pinctrl_esdhc2>;
4f5b6ba6 LW	220	status = "okay";
260cb6a6 ST	221	};
	222
	223	&fec {
	224	pinctrl-names = "default";
4f5b6ba6	225	pinctrl-0 = <&pinctrl_fec>;
260cb6a6	226	phy-mode = "rmii";
12de44f5	227	phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
4f5b6ba6 LW	228	phy-handle = <&phy0>;
	229	mac-address = [000000000000]; /* placeholder; will be overwritten by bootloader */
	230	status = "okay";
	231
faee0fe2 MF	232	mdio {
	233	#address-cells = <1>;
	234	#size-cells = <0>;
	235
	236	phy0: ethernet-phy@0 {
	237	reg = <0>;
	238	interrupt-parent = <&gpio2>;
	239	interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
	240	device_type = "ethernet-phy";
	241	};
4f5b6ba6	242	};
260cb6a6 ST	243	};
260cb6a6 ST	244
4f5b6ba6	245	&i2c1 {
ef4eec2b	246	pinctrl-names = "default", "gpio";
4f5b6ba6	247	pinctrl-0 = <&pinctrl_i2c1>;
ef4eec2b LW	248	pinctrl-0 = <&pinctrl_i2c1_gpio>;
	249	scl-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
	250	sda-gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>;
4f5b6ba6 LW	251	clock-frequency = <400000>;
	252	status = "okay";
	253
	254	rtc1: ds1339@68 {
	255	compatible = "dallas,ds1339";
	256	reg = <0x68>;
	257	pinctrl-names = "default";
	258	pinctrl-0 = <&pinctrl_ds1339>;
	259	interrupt-parent = <&gpio4>;
27e1acb7	260	interrupts = <20 IRQ_TYPE_EDGE_FALLING>;
a2802e65 LW	261	trickle-resistor-ohms = <250>;
a2802e65 LW	262	trickle-diode-disable;
4f5b6ba6	263	};
260cb6a6 ST	264	};
260cb6a6 ST	265
4f5b6ba6	266	&iomuxc {
260cb6a6	267	pinctrl-names = "default";
4f5b6ba6 LW	268	pinctrl-0 = <&pinctrl_hog>;
	269
	270	imx53-tx53 {
	271	pinctrl_hog: hoggrp {
	272	/* pins not in use by any device on the Starterkit board series */
	273	fsl,pins = <
	274	/* CMOS Sensor Interface */
	275	MX53_PAD_CSI0_DAT12__GPIO5_30 0x1f4
	276	MX53_PAD_CSI0_DAT13__GPIO5_31 0x1f4
	277	MX53_PAD_CSI0_DAT14__GPIO6_0 0x1f4
	278	MX53_PAD_CSI0_DAT15__GPIO6_1 0x1f4
	279	MX53_PAD_CSI0_DAT16__GPIO6_2 0x1f4
	280	MX53_PAD_CSI0_DAT17__GPIO6_3 0x1f4
	281	MX53_PAD_CSI0_DAT18__GPIO6_4 0x1f4
	282	MX53_PAD_CSI0_DAT19__GPIO6_5 0x1f4
	283	MX53_PAD_CSI0_MCLK__GPIO5_19 0x1f4
	284	MX53_PAD_CSI0_VSYNC__GPIO5_21 0x1f4
	285	MX53_PAD_CSI0_PIXCLK__GPIO5_18 0x1f4
	286	MX53_PAD_GPIO_0__GPIO1_0 0x1f4
	287	/* Module Specific Signal */
	288	/* MX53_PAD_NANDF_CS2__GPIO6_15 0x1f4 maybe used by EDT-FT5x06 */
	289	/* MX53_PAD_EIM_A16__GPIO2_22 0x1f4 maybe used by EDT-FT5x06 */
	290	MX53_PAD_EIM_D29__GPIO3_29 0x1f4
	291	MX53_PAD_EIM_EB3__GPIO2_31 0x1f4
	292	/* MX53_PAD_EIM_A17__GPIO2_21 0x1f4 maybe used by EDT-FT5x06 */
	293	/* MX53_PAD_EIM_A18__GPIO2_20 0x1f4 used by LED */
	294	MX53_PAD_EIM_A19__GPIO2_19 0x1f4
	295	MX53_PAD_EIM_A20__GPIO2_18 0x1f4
	296	MX53_PAD_EIM_A21__GPIO2_17 0x1f4
	297	MX53_PAD_EIM_A22__GPIO2_16 0x1f4
	298	MX53_PAD_EIM_A23__GPIO6_6 0x1f4
	299	MX53_PAD_EIM_A24__GPIO5_4 0x1f4
	300	MX53_PAD_CSI0_DAT8__GPIO5_26 0x1f4
	301	MX53_PAD_CSI0_DAT9__GPIO5_27 0x1f4
	302	MX53_PAD_CSI0_DAT10__GPIO5_28 0x1f4
	303	MX53_PAD_CSI0_DAT11__GPIO5_29 0x1f4
	304	/* MX53_PAD_EIM_D22__GPIO3_22 0x1f4 maybe used by EETI touchpanel driver */
	305	/* MX53_PAD_EIM_D23__GPIO3_23 0x1f4 maybe used by EETI touchpanel driver */
	306	MX53_PAD_GPIO_13__GPIO4_3 0x1f4
	307	MX53_PAD_EIM_CS0__GPIO2_23 0x1f4
	308	MX53_PAD_EIM_CS1__GPIO2_24 0x1f4
	309	MX53_PAD_CSI0_DATA_EN__GPIO5_20 0x1f4
	310	MX53_PAD_EIM_WAIT__GPIO5_0 0x1f4
	311	MX53_PAD_EIM_EB0__GPIO2_28 0x1f4
	312	MX53_PAD_EIM_EB1__GPIO2_29 0x1f4
	313	MX53_PAD_EIM_OE__GPIO2_25 0x1f4
	314	MX53_PAD_EIM_LBA__GPIO2_27 0x1f4
	315	MX53_PAD_EIM_RW__GPIO2_26 0x1f4
	316	MX53_PAD_EIM_DA8__GPIO3_8 0x1f4
	317	MX53_PAD_EIM_DA9__GPIO3_9 0x1f4
	318	MX53_PAD_EIM_DA10__GPIO3_10 0x1f4
	319	MX53_PAD_EIM_DA11__GPIO3_11 0x1f4
	320	MX53_PAD_EIM_DA12__GPIO3_12 0x1f4
	321	MX53_PAD_EIM_DA13__GPIO3_13 0x1f4
	322	MX53_PAD_EIM_DA14__GPIO3_14 0x1f4
	323	MX53_PAD_EIM_DA15__GPIO3_15 0x1f4
	324	>;
	325	};
	326
	327	pinctrl_can1: can1grp {
	328	fsl,pins = <
	329	MX53_PAD_GPIO_7__CAN1_TXCAN 0x80000000
	330	MX53_PAD_GPIO_8__CAN1_RXCAN 0x80000000
	331	>;
332	};
333
334	pinctrl_can2: can2grp {
335	fsl,pins = <
336	MX53_PAD_KEY_COL4__CAN2_TXCAN 0x80000000
337	MX53_PAD_KEY_ROW4__CAN2_RXCAN 0x80000000
338	>;
339	};
340
341	pinctrl_can_xcvr: can-xcvrgrp {
342	fsl,pins = <MX53_PAD_DISP0_DAT0__GPIO4_21 0xe0>; /* Flexcan XCVR enable */
343	};
344
345	pinctrl_ds1339: ds1339grp {
346	fsl,pins = <MX53_PAD_DI0_PIN4__GPIO4_20 0xe0>;
347	};
348
349	pinctrl_ecspi1: ecspi1grp {
350	fsl,pins = <
351	MX53_PAD_GPIO_19__ECSPI1_RDY 0x80000000
352	MX53_PAD_EIM_EB2__ECSPI1_SS0 0x80000000
353	MX53_PAD_EIM_D16__ECSPI1_SCLK 0x80000000
354	MX53_PAD_EIM_D17__ECSPI1_MISO 0x80000000
355	MX53_PAD_EIM_D18__ECSPI1_MOSI 0x80000000
356	MX53_PAD_EIM_D19__ECSPI1_SS1 0x80000000
357	>;
358	};
359
360	pinctrl_esdhc1: esdhc1grp {
361	fsl,pins = <
362	MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5
363	MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5
364	MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5
365	MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5
366	MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5
367	MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5
368	MX53_PAD_EIM_D24__GPIO3_24 0x1f0
369	>;
370	};
371
372	pinctrl_esdhc2: esdhc2grp {
373	fsl,pins = <
374	MX53_PAD_SD2_CMD__ESDHC2_CMD 0x1d5
375	MX53_PAD_SD2_CLK__ESDHC2_CLK 0x1d5
376	MX53_PAD_SD2_DATA0__ESDHC2_DAT0 0x1d5
377	MX53_PAD_SD2_DATA1__ESDHC2_DAT1 0x1d5
378	MX53_PAD_SD2_DATA2__ESDHC2_DAT2 0x1d5
379	MX53_PAD_SD2_DATA3__ESDHC2_DAT3 0x1d5
380	MX53_PAD_EIM_D25__GPIO3_25 0x1f0
381	>;
382	};
383
384	pinctrl_fec: fecgrp {
385	fsl,pins = <
386	MX53_PAD_FEC_MDC__FEC_MDC 0x80000000
387	MX53_PAD_FEC_MDIO__FEC_MDIO 0x80000000
388	MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x80000000
389	MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x80000000
390	MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x80000000
391	MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x80000000
392	MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x80000000
393	MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000
394	MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x80000000
395	MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x80000000
396	>;
397	};
398
399	pinctrl_gpio_key: gpio-keygrp {
400	fsl,pins = <MX53_PAD_EIM_A25__GPIO5_2 0x1f4>;
401	};
402
403	pinctrl_i2c1: i2c1grp {
404	fsl,pins = <
d5191607 LW	405	MX53_PAD_EIM_D21__I2C1_SCL 0x400001e4
d5191607 LW	406	MX53_PAD_EIM_D28__I2C1_SDA 0x400001e4
4f5b6ba6 LW	407	>;
	408	};
	409
ef4eec2b LW	410	pinctrl_i2c1_gpio: i2c1-gpiogrp {
	411	fsl,pins = <
	412	MX53_PAD_EIM_D21__GPIO3_21 0x400001e6
	413	MX53_PAD_EIM_D28__GPIO3_28 0x400001e6
	414	>;
	415	};
	416
4f5b6ba6 LW	417	pinctrl_i2c3: i2c3grp {
4f5b6ba6 LW	418	fsl,pins = <
d5191607 LW	419	MX53_PAD_GPIO_3__I2C3_SCL 0x400001e4
d5191607 LW	420	MX53_PAD_GPIO_6__I2C3_SDA 0x400001e4
4f5b6ba6 LW	421	>;
	422	};
	423
ef4eec2b LW	424	pinctrl_i2c3_gpio: i2c3-gpiogrp {
	425	fsl,pins = <
	426	MX53_PAD_GPIO_3__GPIO1_3 0x400001e6
	427	MX53_PAD_GPIO_6__GPIO1_6 0x400001e6
	428	>;
	429	};
	430
4f5b6ba6 LW	431	pinctrl_nand: nandgrp {
	432	fsl,pins = <
	433	MX53_PAD_NANDF_WE_B__EMI_NANDF_WE_B 0x4
	434	MX53_PAD_NANDF_RE_B__EMI_NANDF_RE_B 0x4
	435	MX53_PAD_NANDF_CLE__EMI_NANDF_CLE 0x4
	436	MX53_PAD_NANDF_ALE__EMI_NANDF_ALE 0x4
	437	MX53_PAD_NANDF_WP_B__EMI_NANDF_WP_B 0xe0
	438	MX53_PAD_NANDF_RB0__EMI_NANDF_RB_0 0xe0
	439	MX53_PAD_NANDF_CS0__EMI_NANDF_CS_0 0x4
	440	MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0 0xa4
	441	MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1 0xa4
	442	MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2 0xa4
	443	MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3 0xa4
	444	MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4 0xa4
	445	MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5 0xa4
	446	MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 0xa4
	447	MX53_PAD_EIM_DA7__EMI_NAND_WEIM_DA_7 0xa4
	448	>;
	449	};
	450
	451	pinctrl_pwm2: pwm2grp {
	452	fsl,pins = <
	453	MX53_PAD_GPIO_1__PWM2_PWMO 0x80000000
	454	>;
	455	};
	456
	457	pinctrl_ssi1: ssi1grp {
	458	fsl,pins = <
	459	MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC 0x80000000
	460	MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD 0x80000000
	461	MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS 0x80000000
	462	MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD 0x80000000
	463	>;
	464	};
	465
	466	pinctrl_ssi2: ssi2grp {
	467	fsl,pins = <
	468	MX53_PAD_CSI0_DAT4__AUDMUX_AUD3_TXC 0x80000000
	469	MX53_PAD_CSI0_DAT5__AUDMUX_AUD3_TXD 0x80000000
	470	MX53_PAD_CSI0_DAT6__AUDMUX_AUD3_TXFS 0x80000000
	471	MX53_PAD_CSI0_DAT7__AUDMUX_AUD3_RXD 0x80000000
	472	MX53_PAD_EIM_D27__GPIO3_27 0x1f0
	473	>;
	474	};
	475
	476	pinctrl_stk5led: stk5ledgrp {
	477	fsl,pins = <MX53_PAD_EIM_A18__GPIO2_20 0xc0>;
	478	};
	479
	480	pinctrl_uart1: uart1grp {
	481	fsl,pins = <
	482	MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1e4
	483	MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4
	484	MX53_PAD_PATA_RESET_B__UART1_CTS 0x1c5
	485	MX53_PAD_PATA_IORDY__UART1_RTS 0x1c5
	486	>;
	487	};
	488
	489	pinctrl_uart2: uart2grp {
	490	fsl,pins = <
	491	MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1c5
	492	MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1c5
	493	MX53_PAD_PATA_DIOR__UART2_RTS 0x1c5
	494	MX53_PAD_PATA_INTRQ__UART2_CTS 0x1c5
495	>;
496	};
497
498	pinctrl_uart3: uart3grp {
499	fsl,pins = <
500	MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4
501	MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4
502	MX53_PAD_PATA_DA_1__UART3_CTS 0x1e4
503	MX53_PAD_PATA_DA_2__UART3_RTS 0x1e4
504	>;
505	};
506
507	pinctrl_usbh1: usbh1grp {
508	fsl,pins = <
509	MX53_PAD_EIM_D30__GPIO3_30 0x100 /* OC */
510	>;
511	};
512
513	pinctrl_usbh1_vbus: usbh1-vbusgrp {
514	fsl,pins = <
515	MX53_PAD_EIM_D31__GPIO3_31 0xe0 /* VBUS ENABLE */
516	>;
517	};
518
519	pinctrl_usbotg_vbus: usbotg-vbusgrp {
520	fsl,pins = <
521	MX53_PAD_GPIO_7__GPIO1_7 0xe0 /* VBUS ENABLE */
522	MX53_PAD_GPIO_8__GPIO1_8 0x100 /* OC */
523	>;
524	};
525	};
526	};
527
528	&ipu {
529	status = "okay";
530	};
531
532	&nfc {
533	pinctrl-names = "default";
534	pinctrl-0 = <&pinctrl_nand>;
535	nand-bus-width = <8>;
536	nand-ecc-mode = "hw";
537	nand-on-flash-bbt;
538	status = "okay";
260cb6a6 ST	539	};
	540
	541	&pwm2 {
	542	pinctrl-names = "default";
4f5b6ba6 LW	543	pinctrl-0 = <&pinctrl_pwm2>;
	544	#pwm-cells = <3>;
	545	};
	546
	547	&sdma {
	548	fsl,sdma-ram-script-name = "sdma-imx53.bin";
260cb6a6 ST	549	};
	550
	551	&ssi1 {
4f5b6ba6	552	status = "okay";
260cb6a6 ST	553	};
	554
	555	&ssi2 {
260cb6a6 ST	556	status = "disabled";
	557	};
	558
	559	&uart1 {
	560	pinctrl-names = "default";
4f5b6ba6	561	pinctrl-0 = <&pinctrl_uart1>;
2e7c416c	562	uart-has-rtscts;
4f5b6ba6	563	status = "okay";
260cb6a6 ST	564	};
	565
	566	&uart2 {
	567	pinctrl-names = "default";
4f5b6ba6	568	pinctrl-0 = <&pinctrl_uart2>;
2e7c416c	569	uart-has-rtscts;
4f5b6ba6	570	status = "okay";
260cb6a6 ST	571	};
	572
	573	&uart3 {
	574	pinctrl-names = "default";
4f5b6ba6	575	pinctrl-0 = <&pinctrl_uart3>;
2e7c416c	576	uart-has-rtscts;
4f5b6ba6 LW	577	status = "okay";
	578	};
	579
	580	&usbh1 {
	581	pinctrl-names = "default";
	582	pinctrl-0 = <&pinctrl_usbh1>;
	583	phy_type = "utmi";
	584	disable-over-current;
	585	vbus-supply = <&reg_usbh1_vbus>;
	586	status = "okay";
	587	};
	588
	589	&usbotg {
	590	phy_type = "utmi";
	591	dr_mode = "peripheral";
	592	disable-over-current;
	593	vbus-supply = <&reg_usbotg_vbus>;
	594	status = "okay";
260cb6a6	595	};