[mirror_ubuntu-eoan-kernel.git] / arch / arm / boot / dts / imx6q-cm-fx6.dts

/*
 * Copyright 2013 CompuLab Ltd.
 *
 * Author: Valentin Raevsky <valentin@compulab.co.il>
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License
 *     version 2 as published by the Free Software Foundation.
 *
 *     This file is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */

/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/sound/fsl-imx-audmux.h>
#include "imx6q.dtsi"

/ {
	model = "CompuLab CM-FX6";
	compatible = "compulab,cm-fx6", "fsl,imx6q";

	memory@10000000 {
		reg = <0x10000000 0x80000000>;
	};

	leds {
		compatible = "gpio-leds";

		heartbeat-led {
			label = "Heartbeat";
			gpios = <&gpio2 31 0>;
			linux,default-trigger = "heartbeat";
		};
	};

	awnh387_pwrseq: pwrseq {
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_pwrseq>;
		compatible = "mmc-pwrseq-sd8787";
		powerdown-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>;
		reset-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>;
	};

	reg_pcie_power_on_gpio: regulator-pcie-power-on-gpio {
		compatible = "regulator-fixed";
		regulator-name = "regulator-pcie-power-on-gpio";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&gpio2 24 GPIO_ACTIVE_LOW>;
	};

	reg_usb_h1_vbus: usb_h1_vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb_h1_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_usb_otg_vbus: usb_otg_vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb_otg_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	sound-analog {
		compatible = "simple-audio-card";
		simple-audio-card,name = "On-board analog audio";
		simple-audio-card,widgets =
			"Headphone", "Headphone Jack",
			"Line", "Line Out",
			"Microphone", "Mic Jack",
			"Line", "Line In";
		simple-audio-card,routing =
			"Headphone Jack", "RHPOUT",
			"Headphone Jack", "LHPOUT",
			"MICIN", "Mic Bias",
			"Mic Bias", "Mic Jack";
		simple-audio-card,format = "i2s";
		simple-audio-card,bitclock-master = <&sound_master>;
		simple-audio-card,frame-master = <&sound_master>;
		simple-audio-card,bitclock-inversion;

		sound_master: simple-audio-card,cpu {
			sound-dai = <&ssi2>;
			system-clock-frequency = <2822400>;
		};

		simple-audio-card,codec {
			sound-dai = <&wm8731>;
		};
	};

	sound-spdif {
		compatible = "fsl,imx-audio-spdif";
		model = "imx-spdif";
		spdif-controller = <&spdif>;
		spdif-out;
		spdif-in;
	};
};

&audmux {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_audmux>;
	status = "okay";

	ssi2 {
		fsl,audmux-port = <1>;
		fsl,port-config = <
			(IMX_AUDMUX_V2_PTCR_RCLKDIR |
			IMX_AUDMUX_V2_PTCR_RCSEL(3 | 0x8) |
			IMX_AUDMUX_V2_PTCR_TCLKDIR |
			IMX_AUDMUX_V2_PTCR_TCSEL(3))
			IMX_AUDMUX_V2_PDCR_RXDSEL(3)
		>;
	};

	audmux4 {
		fsl,audmux-port = <3>;
		fsl,port-config = <
			(IMX_AUDMUX_V2_PTCR_TFSDIR |
			IMX_AUDMUX_V2_PTCR_TFSEL(1) |
			IMX_AUDMUX_V2_PTCR_RCLKDIR |
			IMX_AUDMUX_V2_PTCR_RCSEL(1 | 0x8) |
			IMX_AUDMUX_V2_PTCR_TCLKDIR |
			IMX_AUDMUX_V2_PTCR_TCSEL(1))
			IMX_AUDMUX_V2_PDCR_RXDSEL(1)
		>;
	};
};

&cpu0 {
	/*
	 * Although the imx6q fuse indicates that 1.2GHz operation is possible,
	 * the module behaves unstable at this frequency. Hence, remove the
	 * 1.2GHz operation point here.
	 */
	operating-points = <
		/* kHz	uV */
		996000	1250000
		852000	1250000
		792000	1175000
		396000	975000
	>;
	fsl,soc-operating-points = <
		/* ARM kHz	SOC-PU uV */
		996000		1250000
		852000		1250000
		792000		1175000
		396000		1175000
	>;
};

&ecspi1 {
	cs-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>, <&gpio3 19 GPIO_ACTIVE_HIGH>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi1>;
	status = "okay";

	m25p80@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "st,m25p", "jedec,spi-nor";
		spi-max-frequency = <20000000>;
		reg = <0>;
	};
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-mode = "rgmii";
	status = "okay";
};

&gpmi {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_gpmi_nand>;
	status = "okay";
};

&i2c3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";
	clock-frequency = <100000>;

	eeprom@50 {
		compatible = "atmel,24c02";
		reg = <0x50>;
		pagesize = <16>;
	};

	wm8731: codec@1a {
		#sound-dai-cells = <0>;
		compatible = "wlf,wm8731";
		reg = <0x1a>;
	};
};

&iomuxc {
	pinctrl_audmux: audmuxgrp {
		fsl,pins = <
			MX6QDL_PAD_SD2_CMD__AUD4_RXC   0x17059
			MX6QDL_PAD_SD2_DAT0__AUD4_RXD  0x17059
			MX6QDL_PAD_SD2_DAT3__AUD4_TXC  0x17059
			MX6QDL_PAD_SD2_DAT2__AUD4_TXD  0x17059
			MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x17059
		>;
	};

	pinctrl_ecspi1: ecspi1grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D16__ECSPI1_SCLK	0x100b1
			MX6QDL_PAD_EIM_D17__ECSPI1_MISO	0x100b1
			MX6QDL_PAD_EIM_D18__ECSPI1_MOSI	0x100b1
			MX6QDL_PAD_EIM_EB2__GPIO2_IO30	0x100b1
			MX6QDL_PAD_EIM_D19__GPIO3_IO19	0x100b1
		>;
	};

	pinctrl_enet: enetgrp {
		fsl,pins = <
			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030
			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030
			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030
			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030
			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030
			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030
			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030
			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030
			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030
			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030
			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030
			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030
			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
		>;
	};

	pinctrl_gpmi_nand: gpminandgrp {
		fsl,pins = <
			MX6QDL_PAD_NANDF_CLE__NAND_CLE		0xb0b1
			MX6QDL_PAD_NANDF_ALE__NAND_ALE		0xb0b1
			MX6QDL_PAD_NANDF_WP_B__NAND_WP_B	0xb0b1
			MX6QDL_PAD_NANDF_RB0__NAND_READY_B	0xb000
			MX6QDL_PAD_NANDF_CS0__NAND_CE0_B	0xb0b1
			MX6QDL_PAD_NANDF_CS1__NAND_CE1_B	0xb0b1
			MX6QDL_PAD_SD4_CMD__NAND_RE_B		0xb0b1
			MX6QDL_PAD_SD4_CLK__NAND_WE_B		0xb0b1
			MX6QDL_PAD_NANDF_D0__NAND_DATA00	0xb0b1
			MX6QDL_PAD_NANDF_D1__NAND_DATA01	0xb0b1
			MX6QDL_PAD_NANDF_D2__NAND_DATA02	0xb0b1
			MX6QDL_PAD_NANDF_D3__NAND_DATA03	0xb0b1
			MX6QDL_PAD_NANDF_D4__NAND_DATA04	0xb0b1
			MX6QDL_PAD_NANDF_D5__NAND_DATA05	0xb0b1
			MX6QDL_PAD_NANDF_D6__NAND_DATA06	0xb0b1
			MX6QDL_PAD_NANDF_D7__NAND_DATA07	0xb0b1
			MX6QDL_PAD_SD4_DAT0__NAND_DQS		0x00b1
		>;
	};

	pinctrl_i2c3: i2c3grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_3__I2C3_SCL	0x4001b8b1
			MX6QDL_PAD_GPIO_6__I2C3_SDA	0x4001b8b1
		>;
	};

	pinctrl_pcie: pciegrp {
		fsl,pins = <
			MX6QDL_PAD_ENET_RXD1__GPIO1_IO26	0x1b0b1
			MX6QDL_PAD_EIM_CS1__GPIO2_IO24	0x1b0b1
		>;
	};

	pinctrl_pwrseq: pwrseqgrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_17__GPIO7_IO12		0x1b0b0
			MX6QDL_PAD_NANDF_CS3__GPIO6_IO16	0x1b0b0
		>;
	};

	pinctrl_spdif: spdifgrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_16__SPDIF_IN  0x1b0b0
			MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0
		>;
	};

	pinctrl_uart4: uart4grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL0__UART4_TX_DATA	0x1b0b1
			MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA	0x1b0b1
		>;
	};

	pinctrl_usbh1: usbh1grp {
		fsl,pins = <
			MX6QDL_PAD_SD3_RST__GPIO7_IO08	0x1b0b1
		>;
	};

	pinctrl_usbotg: usbotggrp {
		fsl,pins = <
			MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID	0x17059
			MX6QDL_PAD_EIM_D22__GPIO3_IO22	0x130b0
		>;
	};

	pinctrl_usdhc1: usdhc1grp {
		fsl,pins = <
			MX6QDL_PAD_SD1_CMD__SD1_CMD	0x17071
			MX6QDL_PAD_SD1_CLK__SD1_CLK	0x10071
			MX6QDL_PAD_SD1_DAT0__SD1_DATA0	0x17071
			MX6QDL_PAD_SD1_DAT1__SD1_DATA1	0x17071
			MX6QDL_PAD_SD1_DAT2__SD1_DATA2	0x17071
			MX6QDL_PAD_SD1_DAT3__SD1_DATA3	0x17071
		>;
	};
};

&pcie {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pcie>;
	reset-gpio = <&gpio1 26 GPIO_ACTIVE_LOW>;
	vpcie-supply = <&reg_pcie_power_on_gpio>;
	status = "okay";
};

&sata {
	status = "okay";
};

&snvs_poweroff {
	status = "okay";
};

&spdif {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_spdif>;
	status = "okay";
};

&ssi2 {
	assigned-clocks = <&clks IMX6QDL_CLK_SSI2_SEL>,
			<&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>;
	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>;
	assigned-clock-rates = <0>, <786432000>;
	status = "okay";
};

&uart4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart4>;
	status = "okay";
};

&usbh1 {
	vbus-supply = <&reg_usb_h1_vbus>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbh1>;
	status = "okay";
};

&usbotg {
	vbus-supply = <&reg_usb_otg_vbus>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg>;
	dr_mode = "otg";
	status = "okay";
};

&usdhc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc1>;
	mmc-pwrseq = <&awnh387_pwrseq>;
	non-removable;
	/*
	 * If the OS probes the Bluetooth AMP function advertised on this bus
	 * but the firmware in place does not support it, the WiFi/BT module
	 * gets unresponsive.
	 * Users who configured their OS properly can enable this node to gain
	 * WiFi and/or plain Bluetooth support.
	 */
	status = "disabled";
};
Commit	Line	Data
682d055e VR	1	/*
	2	* Copyright 2013 CompuLab Ltd.
	3	*
	4	* Author: Valentin Raevsky <valentin@compulab.co.il>
	5	*
a98704b4 CS	6	* This file is dual-licensed: you can use it either under the terms
	7	* of the GPL or the X11 license, at your option. Note that this dual
	8	* licensing only applies to this file, and not this project as a
	9	* whole.
682d055e	10	*
a98704b4 CS	11	* a) This file is free software; you can redistribute it and/or
	12	* modify it under the terms of the GNU General Public License
	13	* version 2 as published by the Free Software Foundation.
	14	*
13283626	15	* This file is distributed in the hope that it will be useful,
a98704b4 CS	16	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	17	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	18	* GNU General Public License for more details.
	19	*
13283626	20	* Or, alternatively,
a98704b4 CS	21	*
	22	* b) Permission is hereby granted, free of charge, to any person
	23	* obtaining a copy of this software and associated documentation
	24	* files (the "Software"), to deal in the Software without
13283626	25	* restriction, including without limitation the rights to use,
a98704b4 CS	26	* copy, modify, merge, publish, distribute, sublicense, and/or
	27	* sell copies of the Software, and to permit persons to whom the
	28	* Software is furnished to do so, subject to the following
	29	* conditions:
	30	*
	31	* The above copyright notice and this permission notice shall be
	32	* included in all copies or substantial portions of the Software.
	33	*
13283626	34	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
a98704b4 CS	35	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
	36	* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	37	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
13283626	38	* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
a98704b4 CS	39	* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	40	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	41	* OTHER DEALINGS IN THE SOFTWARE.
682d055e VR	42	*/
	43
	44	/dts-v1/;
669c940a	45	#include <dt-bindings/gpio/gpio.h>
937d9a01	46	#include <dt-bindings/sound/fsl-imx-audmux.h>
682d055e VR	47	#include "imx6q.dtsi"
	48
	49	/ {
	50	model = "CompuLab CM-FX6";
	51	compatible = "compulab,cm-fx6", "fsl,imx6q";
	52
ad00e080	53	memory@10000000 {
682d055e VR	54	reg = <0x10000000 0x80000000>;
	55	};
	56
	57	leds {
	58	compatible = "gpio-leds";
	59
	60	heartbeat-led {
	61	label = "Heartbeat";
	62	gpios = <&gpio2 31 0>;
	63	linux,default-trigger = "heartbeat";
	64	};
	65	};
669c940a	66
d8710c3f CS	67	awnh387_pwrseq: pwrseq {
	68	pinctrl-names = "default";
	69	pinctrl-0 = <&pinctrl_pwrseq>;
	70	compatible = "mmc-pwrseq-sd8787";
	71	powerdown-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>;
	72	reset-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>;
	73	};
	74
669c940a CS	75	reg_pcie_power_on_gpio: regulator-pcie-power-on-gpio {
	76	compatible = "regulator-fixed";
	77	regulator-name = "regulator-pcie-power-on-gpio";
	78	regulator-min-microvolt = <3300000>;
	79	regulator-max-microvolt = <3300000>;
02839915	80	gpio = <&gpio2 24 GPIO_ACTIVE_LOW>;
669c940a CS	81	};
	82
	83	reg_usb_h1_vbus: usb_h1_vbus {
	84	compatible = "regulator-fixed";
	85	regulator-name = "usb_h1_vbus";
	86	regulator-min-microvolt = <5000000>;
	87	regulator-max-microvolt = <5000000>;
	88	gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>;
	89	enable-active-high;
	90	};
	91
	92	reg_usb_otg_vbus: usb_otg_vbus {
	93	compatible = "regulator-fixed";
	94	regulator-name = "usb_otg_vbus";
	95	regulator-min-microvolt = <5000000>;
	96	regulator-max-microvolt = <5000000>;
	97	gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
	98	enable-active-high;
	99	};
1eac1e3d	100
937d9a01 VR	101	sound-analog {
	102	compatible = "simple-audio-card";
	103	simple-audio-card,name = "On-board analog audio";
	104	simple-audio-card,widgets =
	105	"Headphone", "Headphone Jack",
	106	"Line", "Line Out",
	107	"Microphone", "Mic Jack",
	108	"Line", "Line In";
	109	simple-audio-card,routing =
	110	"Headphone Jack", "RHPOUT",
	111	"Headphone Jack", "LHPOUT",
	112	"MICIN", "Mic Bias",
	113	"Mic Bias", "Mic Jack";
	114	simple-audio-card,format = "i2s";
	115	simple-audio-card,bitclock-master = <&sound_master>;
	116	simple-audio-card,frame-master = <&sound_master>;
	117	simple-audio-card,bitclock-inversion;
	118
	119	sound_master: simple-audio-card,cpu {
	120	sound-dai = <&ssi2>;
	121	system-clock-frequency = <2822400>;
	122	};
	123
	124	simple-audio-card,codec {
	125	sound-dai = <&wm8731>;
	126	};
	127	};
	128
1eac1e3d CS	129	sound-spdif {
	130	compatible = "fsl,imx-audio-spdif";
	131	model = "imx-spdif";
	132	spdif-controller = <&spdif>;
	133	spdif-out;
	134	spdif-in;
	135	};
669c940a CS	136	};
669c940a CS	137
937d9a01 VR	138	&audmux {
	139	pinctrl-names = "default";
	140	pinctrl-0 = <&pinctrl_audmux>;
	141	status = "okay";
	142
	143	ssi2 {
	144	fsl,audmux-port = <1>;
	145	fsl,port-config = <
	146	(IMX_AUDMUX_V2_PTCR_RCLKDIR \|
	147	IMX_AUDMUX_V2_PTCR_RCSEL(3 \| 0x8) \|
	148	IMX_AUDMUX_V2_PTCR_TCLKDIR \|
	149	IMX_AUDMUX_V2_PTCR_TCSEL(3))
	150	IMX_AUDMUX_V2_PDCR_RXDSEL(3)
	151	>;
	152	};
	153
	154	audmux4 {
	155	fsl,audmux-port = <3>;
	156	fsl,port-config = <
	157	(IMX_AUDMUX_V2_PTCR_TFSDIR \|
	158	IMX_AUDMUX_V2_PTCR_TFSEL(1) \|
	159	IMX_AUDMUX_V2_PTCR_RCLKDIR \|
	160	IMX_AUDMUX_V2_PTCR_RCSEL(1 \| 0x8) \|
	161	IMX_AUDMUX_V2_PTCR_TCLKDIR \|
	162	IMX_AUDMUX_V2_PTCR_TCSEL(1))
	163	IMX_AUDMUX_V2_PDCR_RXDSEL(1)
	164	>;
	165	};
	166	};
	167
5bca20f7 VR	168	&cpu0 {
	169	/*
	170	* Although the imx6q fuse indicates that 1.2GHz operation is possible,
	171	* the module behaves unstable at this frequency. Hence, remove the
	172	* 1.2GHz operation point here.
	173	*/
	174	operating-points = <
	175	/* kHz uV */
	176	996000 1250000
	177	852000 1250000
	178	792000 1175000
	179	396000 975000
	180	>;
	181	fsl,soc-operating-points = <
	182	/* ARM kHz SOC-PU uV */
	183	996000 1250000
	184	852000 1250000
	185	792000 1175000
	186	396000 1175000
	187	>;
	188	};
	189
669c940a	190	&ecspi1 {
669c940a CS	191	cs-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>, <&gpio3 19 GPIO_ACTIVE_HIGH>;
	192	pinctrl-names = "default";
	193	pinctrl-0 = <&pinctrl_ecspi1>;
	194	status = "okay";
	195
	196	m25p80@0 {
	197	#address-cells = <1>;
	198	#size-cells = <1>;
	199	compatible = "st,m25p", "jedec,spi-nor";
	200	spi-max-frequency = <20000000>;
	201	reg = <0>;
	202	};
682d055e VR	203	};
	204
	205	&fec {
	206	pinctrl-names = "default";
	207	pinctrl-0 = <&pinctrl_enet>;
	208	phy-mode = "rgmii";
	209	status = "okay";
	210	};
	211
	212	&gpmi {
	213	pinctrl-names = "default";
	214	pinctrl-0 = <&pinctrl_gpmi_nand>;
	215	status = "okay";
	216	};
	217
669c940a CS	218	&i2c3 {
	219	pinctrl-names = "default";
	220	pinctrl-0 = <&pinctrl_i2c3>;
	221	status = "okay";
	222	clock-frequency = <100000>;
	223
	224	eeprom@50 {
30dd9fb9	225	compatible = "atmel,24c02";
669c940a CS	226	reg = <0x50>;
	227	pagesize = <16>;
	228	};
937d9a01 VR	229
	230	wm8731: codec@1a {
	231	#sound-dai-cells = <0>;
	232	compatible = "wlf,wm8731";
	233	reg = <0x1a>;
	234	};
669c940a CS	235	};
669c940a CS	236
682d055e	237	&iomuxc {
937d9a01 VR	238	pinctrl_audmux: audmuxgrp {
	239	fsl,pins = <
	240	MX6QDL_PAD_SD2_CMD__AUD4_RXC 0x17059
	241	MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x17059
	242	MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x17059
	243	MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x17059
	244	MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x17059
	245	>;
	246	};
	247
669c940a CS	248	pinctrl_ecspi1: ecspi1grp {
	249	fsl,pins = <
	250	MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
	251	MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
	252	MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
	253	MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x100b1
	254	MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x100b1
	255	>;
	256	};
	257
0c3bc8c9 CS	258	pinctrl_enet: enetgrp {
0c3bc8c9 CS	259	fsl,pins = <
c007b3a6 UKK	260	MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
	261	MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
	262	MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
	263	MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
	264	MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
	265	MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
	266	MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
	267	MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
	268	MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
	269	MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
	270	MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
	271	MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
0c3bc8c9 CS	272	MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
	273	MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
	274	MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
0c3bc8c9 CS	275	>;
0c3bc8c9 CS	276	};
682d055e	277
0c3bc8c9 CS	278	pinctrl_gpmi_nand: gpminandgrp {
	279	fsl,pins = <
	280	MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
	281	MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
	282	MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
	283	MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
	284	MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
	285	MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
	286	MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
	287	MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
	288	MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
	289	MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
	290	MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
	291	MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
	292	MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
	293	MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
	294	MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
	295	MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
	296	MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1
	297	>;
	298	};
682d055e	299
669c940a CS	300	pinctrl_i2c3: i2c3grp {
	301	fsl,pins = <
	302	MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
	303	MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
	304	>;
	305	};
	306
	307	pinctrl_pcie: pciegrp {
	308	fsl,pins = <
	309	MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
	310	MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x1b0b1
	311	>;
	312	};
	313
d8710c3f CS	314	pinctrl_pwrseq: pwrseqgrp {
	315	fsl,pins = <
	316	MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0
	317	MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x1b0b0
	318	>;
	319	};
	320
1eac1e3d CS	321	pinctrl_spdif: spdifgrp {
	322	fsl,pins = <
	323	MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0
	324	MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0
	325	>;
	326	};
	327
0c3bc8c9 CS	328	pinctrl_uart4: uart4grp {
	329	fsl,pins = <
	330	MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
	331	MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
	332	>;
682d055e	333	};
669c940a CS	334
	335	pinctrl_usbh1: usbh1grp {
	336	fsl,pins = <
	337	MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x1b0b1
	338	>;
	339	};
	340
	341	pinctrl_usbotg: usbotggrp {
	342	fsl,pins = <
	343	MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
	344	MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x130b0
	345	>;
	346	};
d8710c3f CS	347
	348	pinctrl_usdhc1: usdhc1grp {
	349	fsl,pins = <
	350	MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
	351	MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
	352	MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
	353	MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
	354	MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
	355	MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
	356	>;
	357	};
669c940a CS	358	};
	359
	360	&pcie {
	361	pinctrl-names = "default";
	362	pinctrl-0 = <&pinctrl_pcie>;
	363	reset-gpio = <&gpio1 26 GPIO_ACTIVE_LOW>;
02839915	364	vpcie-supply = <&reg_pcie_power_on_gpio>;
669c940a CS	365	status = "okay";
	366	};
	367
	368	&sata {
	369	status = "okay";
	370	};
	371
	372	&snvs_poweroff {
	373	status = "okay";
682d055e VR	374	};
682d055e VR	375
1eac1e3d CS	376	&spdif {
	377	pinctrl-names = "default";
	378	pinctrl-0 = <&pinctrl_spdif>;
	379	status = "okay";
	380	};
	381
937d9a01 VR	382	&ssi2 {
	383	assigned-clocks = <&clks IMX6QDL_CLK_SSI2_SEL>,
	384	<&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>;
	385	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>;
	386	assigned-clock-rates = <0>, <786432000>;
	387	status = "okay";
	388	};
	389
682d055e VR	390	&uart4 {
	391	pinctrl-names = "default";
	392	pinctrl-0 = <&pinctrl_uart4>;
	393	status = "okay";
	394	};
669c940a CS	395
	396	&usbh1 {
	397	vbus-supply = <&reg_usb_h1_vbus>;
	398	pinctrl-names = "default";
	399	pinctrl-0 = <&pinctrl_usbh1>;
	400	status = "okay";
	401	};
	402
	403	&usbotg {
	404	vbus-supply = <&reg_usb_otg_vbus>;
	405	pinctrl-names = "default";
	406	pinctrl-0 = <&pinctrl_usbotg>;
	407	dr_mode = "otg";
	408	status = "okay";
	409	};
d8710c3f CS	410
	411	&usdhc1 {
	412	pinctrl-names = "default";
	413	pinctrl-0 = <&pinctrl_usdhc1>;
	414	mmc-pwrseq = <&awnh387_pwrseq>;
	415	non-removable;
	416	/*
	417	* If the OS probes the Bluetooth AMP function advertised on this bus
	418	* but the firmware in place does not support it, the WiFi/BT module
	419	* gets unresponsive.
	420	* Users who configured their OS properly can enable this node to gain
	421	* WiFi and/or plain Bluetooth support.
	422	*/
	423	status = "disabled";
	424	};