[mirror_ubuntu-eoan-kernel.git] / arch / arm / boot / dts / imx6q-dmo-edmqmx6.dts

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright 2013 Data Modul AG
 */

/dts-v1/;

#include <dt-bindings/gpio/gpio.h>
#include "imx6q.dtsi"

/ {
	model = "Data Modul eDM-QMX6 Board";
	compatible = "dmo,imx6q-edmqmx6", "fsl,imx6q";

	chosen {
		stdout-path = &uart2;
	};

	aliases {
		gpio7 = &stmpe_gpio1;
		gpio8 = &stmpe_gpio2;
		stmpe-i2c0 = &stmpe1;
		stmpe-i2c1 = &stmpe2;
	};

	memory@10000000 {
		device_type = "memory";
		reg = <0x10000000 0x80000000>;
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		reg_3p3v: regulator@0 {
			compatible = "regulator-fixed";
			reg = <0>;
			regulator-name = "3P3V";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			regulator-always-on;
		};

		reg_usb_otg_switch: regulator@1 {
			compatible = "regulator-fixed";
			reg = <1>;
			regulator-name = "usb_otg_switch";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			gpio = <&gpio7 12 0>;
			regulator-boot-on;
			regulator-always-on;
		};

		reg_usb_host1: regulator@2 {
			compatible = "regulator-fixed";
			reg = <2>;
			regulator-name = "usb_host1_en";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			gpio = <&gpio3 31 0>;
			enable-active-high;
		};
	};

	gpio-leds {
		compatible = "gpio-leds";

		led-blue {
			label = "blue";
			gpios = <&stmpe_gpio1 8 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
		};

		led-green {
			label = "green";
			gpios = <&stmpe_gpio1 9 GPIO_ACTIVE_HIGH>;
		};

		led-pink {
			label = "pink";
			gpios = <&stmpe_gpio1 10 GPIO_ACTIVE_HIGH>;
		};

		led-red {
			label = "red";
			gpios = <&stmpe_gpio1 11 GPIO_ACTIVE_HIGH>;
		};
	};
};

&can1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_can1>;
	status = "okay";
};

&ecspi5 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi5>;
	cs-gpios = <&gpio1 12 0>;
	status = "okay";

	flash: m25p80@0 {
		compatible = "m25p80", "jedec,spi-nor";
		spi-max-frequency = <40000000>;
		reg = <0>;
	};
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-mode = "rgmii";
	phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
	phy-supply = <&vgen2_1v2_eth>;
	status = "okay";
};

&i2c1 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2
		     &pinctrl_stmpe1
		     &pinctrl_stmpe2
		     &pinctrl_pfuze>;
	status = "okay";

	pmic: pfuze100@8 {
		compatible = "fsl,pfuze100";
		reg = <0x08>;
		interrupt-parent = <&gpio3>;
		interrupts = <20 8>;

		regulators {
			sw1a_reg: sw1ab {
				regulator-min-microvolt = <300000>;
				regulator-max-microvolt = <1875000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw1c_reg: sw1c {
				regulator-min-microvolt = <300000>;
				regulator-max-microvolt = <1875000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw2_reg: sw2 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw3a_reg: sw3a {
				regulator-min-microvolt = <400000>;
				regulator-max-microvolt = <1975000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw3b_reg: sw3b {
				regulator-min-microvolt = <400000>;
				regulator-max-microvolt = <1975000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw4_reg: sw4 {
				regulator-min-microvolt = <400000>;
				regulator-max-microvolt = <1975000>;
				regulator-always-on;
			};

			swbst_reg: swbst {
				regulator-min-microvolt = <5000000>;
				regulator-max-microvolt = <5150000>;
				regulator-always-on;
			};

			snvs_reg: vsnvs {
				regulator-min-microvolt = <1000000>;
				regulator-max-microvolt = <3000000>;
				regulator-boot-on;
				regulator-always-on;
			};

			vref_reg: vrefddr {
				regulator-boot-on;
				regulator-always-on;
			};

			vgen1_reg: vgen1 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1550000>;
			};

			vgen2_1v2_eth: vgen2 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1550000>;
			};

			vdd_high_in: vgen3 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
			};

			vgen4_reg: vgen4 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen5_reg: vgen5 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen6_reg: vgen6 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};
		};
	};

	stmpe1: stmpe1601@40 {
		compatible = "st,stmpe1601";
		reg = <0x40>;
		interrupts = <30 0>;
		interrupt-parent = <&gpio3>;
		vcc-supply = <&sw2_reg>;
		vio-supply = <&sw2_reg>;

		stmpe_gpio1: stmpe_gpio {
			#gpio-cells = <2>;
			compatible = "st,stmpe-gpio";
		};
	};

	stmpe2: stmpe1601@44 {
		compatible = "st,stmpe1601";
		reg = <0x44>;
		interrupts = <2 0>;
		interrupt-parent = <&gpio5>;
		vcc-supply = <&sw2_reg>;
		vio-supply = <&sw2_reg>;

		stmpe_gpio2: stmpe_gpio {
			#gpio-cells = <2>;
			compatible = "st,stmpe-gpio";
		};
	};

	temp1: ad7414@4c {
		compatible = "ad,ad7414";
		reg = <0x4c>;
	};

	temp2: ad7414@4d {
		compatible = "ad,ad7414";
		reg = <0x4d>;
	};

	rtc: m41t62@68 {
		compatible = "st,m41t62";
		reg = <0x68>;
	};
};

&i2c3 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog>;

	imx6q-dmo-edmqmx6 {
		pinctrl_hog: hoggrp {
			fsl,pins = <
				MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x80000000
				MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x80000000
			>;
		};

		pinctrl_can1: can1grp {
			fsl,pins = <
				MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b0b0
				MX6QDL_PAD_GPIO_7__FLEXCAN1_TX		0x1b0b0
			>;
		};

		pinctrl_ecspi5: ecspi5rp-1 {
			fsl,pins = <
				MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO	0x80000000
				MX6QDL_PAD_SD1_CMD__ECSPI5_MOSI		0x80000000
				MX6QDL_PAD_SD1_CLK__ECSPI5_SCLK		0x80000000
				MX6QDL_PAD_SD2_DAT3__GPIO1_IO12		0x80000000
			>;
		};

		pinctrl_enet: enetgrp {
			fsl,pins = <
				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030
				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030
				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030
				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030
				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030
				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030
				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030
				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030
				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030
				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030
				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030
				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030
				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
				MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25	0x1b0b0
				MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8
			>;
		};

		pinctrl_i2c1: i2c1grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1
				MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1
			>;
		};

		pinctrl_i2c2: i2c2grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_EB2__I2C2_SCL		0x4001b8b1
				MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
			>;
		};

		pinctrl_i2c3: i2c3grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_D17__I2C3_SCL		0x4001b8b1
				MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1
			>;
		};

		pinctrl_pcie: pciegrp {
			fsl,pins = <
				MX6QDL_PAD_KEY_COL1__GPIO4_IO08		0x100b1
			>;
		};

		pinctrl_pfuze: pfuze100grp1 {
			fsl,pins = <
				MX6QDL_PAD_EIM_D20__GPIO3_IO20		0x80000000
			>;
		};

		pinctrl_stmpe1: stmpe1grp {
			fsl,pins = <MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x80000000>;
		};

		pinctrl_stmpe2: stmpe2grp {
			fsl,pins = <MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000>;
		};

		pinctrl_uart1: uart1grp {
			fsl,pins = <
				MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA	0x1b0b1
				MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	0x1b0b1
			>;
		};

		pinctrl_uart2: uart2grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_D26__UART2_TX_DATA	0x1b0b1
				MX6QDL_PAD_EIM_D27__UART2_RX_DATA	0x1b0b1
			>;
		};

		pinctrl_usbotg: usbotggrp {
			fsl,pins = <
				MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID	0x17059
			>;
		};

		pinctrl_usdhc3: usdhc3grp {
			fsl,pins = <
				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
			>;
		};

		pinctrl_usdhc4: usdhc4grp {
			fsl,pins = <
				MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059
				MX6QDL_PAD_SD4_CLK__SD4_CLK		0x10059
				MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059
				MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059
				MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059
				MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059
				MX6QDL_PAD_SD4_DAT4__SD4_DATA4		0x17059
				MX6QDL_PAD_SD4_DAT5__SD4_DATA5		0x17059
				MX6QDL_PAD_SD4_DAT6__SD4_DATA6		0x17059
				MX6QDL_PAD_SD4_DAT7__SD4_DATA7		0x17059
			>;
		};
	};
};

&pcie {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pcie>;
	reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&sata {
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	status = "okay";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	status = "okay";
};

&usbh1 {
	vbus-supply = <&reg_usb_host1>;
	disable-over-current;
	dr_mode = "host";
	status = "okay";
};

&usbotg {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg>;
	disable-over-current;
	status = "okay";
};

&usdhc3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3>;
	vmmc-supply = <&reg_3p3v>;
	status = "okay";
};

&usdhc4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc4>;
	vmmc-supply = <&reg_3p3v>;
	non-removable;
	bus-width = <8>;
	status = "okay";
};
Commit	Line	Data
fcaf2036	1	// SPDX-License-Identifier: GPL-2.0-or-later
c1f77e73 S	2	/*
c1f77e73 S	3	* Copyright 2013 Data Modul AG
c1f77e73 S	4	*/
	5
	6	/dts-v1/;
	7
	8	#include <dt-bindings/gpio/gpio.h>
	9	#include "imx6q.dtsi"
	10
	11	/ {
	12	model = "Data Modul eDM-QMX6 Board";
	13	compatible = "dmo,imx6q-edmqmx6", "fsl,imx6q";
	14
48f51963 SH	15	chosen {
	16	stdout-path = &uart2;
	17	};
	18
c1f77e73	19	aliases {
52d13453 LS	20	gpio7 = &stmpe_gpio1;
	21	gpio8 = &stmpe_gpio2;
	22	stmpe-i2c0 = &stmpe1;
	23	stmpe-i2c1 = &stmpe2;
c1f77e73 S	24	};
c1f77e73 S	25
ad00e080	26	memory@10000000 {
404c0c93	27	device_type = "memory";
c1f77e73 S	28	reg = <0x10000000 0x80000000>;
	29	};
	30
	31	regulators {
	32	compatible = "simple-bus";
	33	#address-cells = <1>;
	34	#size-cells = <0>;
	35
	36	reg_3p3v: regulator@0 {
	37	compatible = "regulator-fixed";
	38	reg = <0>;
	39	regulator-name = "3P3V";
	40	regulator-min-microvolt = <3300000>;
	41	regulator-max-microvolt = <3300000>;
	42	regulator-always-on;
	43	};
	44
465ca5dc	45	reg_usb_otg_switch: regulator@1 {
c1f77e73 S	46	compatible = "regulator-fixed";
c1f77e73 S	47	reg = <1>;
465ca5dc	48	regulator-name = "usb_otg_switch";
c1f77e73 S	49	regulator-min-microvolt = <5000000>;
	50	regulator-max-microvolt = <5000000>;
	51	gpio = <&gpio7 12 0>;
465ca5dc SH	52	regulator-boot-on;
465ca5dc SH	53	regulator-always-on;
c1f77e73 S	54	};
	55
	56	reg_usb_host1: regulator@2 {
	57	compatible = "regulator-fixed";
	58	reg = <2>;
	59	regulator-name = "usb_host1_en";
	60	regulator-min-microvolt = <3300000>;
	61	regulator-max-microvolt = <3300000>;
	62	gpio = <&gpio3 31 0>;
	63	enable-active-high;
	64	};
	65	};
	66
	67	gpio-leds {
	68	compatible = "gpio-leds";
	69
	70	led-blue {
	71	label = "blue";
52d13453	72	gpios = <&stmpe_gpio1 8 GPIO_ACTIVE_HIGH>;
c1f77e73 S	73	linux,default-trigger = "heartbeat";
	74	};
	75
	76	led-green {
	77	label = "green";
52d13453	78	gpios = <&stmpe_gpio1 9 GPIO_ACTIVE_HIGH>;
c1f77e73 S	79	};
	80
	81	led-pink {
	82	label = "pink";
52d13453	83	gpios = <&stmpe_gpio1 10 GPIO_ACTIVE_HIGH>;
c1f77e73 S	84	};
	85
	86	led-red {
	87	label = "red";
52d13453	88	gpios = <&stmpe_gpio1 11 GPIO_ACTIVE_HIGH>;
c1f77e73 S	89	};
	90	};
	91	};
	92
37183793 SF	93	&can1 {
	94	pinctrl-names = "default";
	95	pinctrl-0 = <&pinctrl_can1>;
	96	status = "okay";
	97	};
	98
819826a1 LS	99	&ecspi5 {
	100	pinctrl-names = "default";
	101	pinctrl-0 = <&pinctrl_ecspi5>;
819826a1 LS	102	cs-gpios = <&gpio1 12 0>;
	103	status = "okay";
	104
	105	flash: m25p80@0 {
79826ac6	106	compatible = "m25p80", "jedec,spi-nor";
819826a1 LS	107	spi-max-frequency = <40000000>;
	108	reg = <0>;
	109	};
	110	};
	111
c1f77e73 S	112	&fec {
	113	pinctrl-names = "default";
	114	pinctrl-0 = <&pinctrl_enet>;
	115	phy-mode = "rgmii";
12de44f5	116	phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
c1f77e73 S	117	phy-supply = <&vgen2_1v2_eth>;
	118	status = "okay";
	119	};
	120
3c6c8685 SF	121	&i2c1 {
	122	clock-frequency = <100000>;
	123	pinctrl-names = "default";
	124	pinctrl-0 = <&pinctrl_i2c1>;
	125	status = "okay";
	126	};
	127
c1f77e73 S	128	&i2c2 {
	129	clock-frequency = <100000>;
	130	pinctrl-names = "default";
	131	pinctrl-0 = <&pinctrl_i2c2
52d13453	132	&pinctrl_stmpe1
d02f74aa LS	133	&pinctrl_stmpe2
d02f74aa LS	134	&pinctrl_pfuze>;
c1f77e73 S	135	status = "okay";
c1f77e73 S	136
8dccafaa	137	pmic: pfuze100@8 {
c1f77e73 S	138	compatible = "fsl,pfuze100";
	139	reg = <0x08>;
	140	interrupt-parent = <&gpio3>;
	141	interrupts = <20 8>;
	142
	143	regulators {
	144	sw1a_reg: sw1ab {
	145	regulator-min-microvolt = <300000>;
	146	regulator-max-microvolt = <1875000>;
	147	regulator-boot-on;
	148	regulator-always-on;
	149	};
	150
	151	sw1c_reg: sw1c {
	152	regulator-min-microvolt = <300000>;
	153	regulator-max-microvolt = <1875000>;
	154	regulator-boot-on;
	155	regulator-always-on;
	156	};
	157
	158	sw2_reg: sw2 {
	159	regulator-min-microvolt = <800000>;
	160	regulator-max-microvolt = <3300000>;
	161	regulator-boot-on;
	162	regulator-always-on;
	163	};
	164
	165	sw3a_reg: sw3a {
	166	regulator-min-microvolt = <400000>;
	167	regulator-max-microvolt = <1975000>;
	168	regulator-boot-on;
	169	regulator-always-on;
	170	};
	171
	172	sw3b_reg: sw3b {
	173	regulator-min-microvolt = <400000>;
	174	regulator-max-microvolt = <1975000>;
	175	regulator-boot-on;
	176	regulator-always-on;
	177	};
	178
	179	sw4_reg: sw4 {
	180	regulator-min-microvolt = <400000>;
	181	regulator-max-microvolt = <1975000>;
	182	regulator-always-on;
	183	};
	184
	185	swbst_reg: swbst {
	186	regulator-min-microvolt = <5000000>;
	187	regulator-max-microvolt = <5150000>;
	188	regulator-always-on;
	189	};
	190
	191	snvs_reg: vsnvs {
	192	regulator-min-microvolt = <1000000>;
	193	regulator-max-microvolt = <3000000>;
	194	regulator-boot-on;
	195	regulator-always-on;
	196	};
	197
	198	vref_reg: vrefddr {
	199	regulator-boot-on;
	200	regulator-always-on;
	201	};
202
203	vgen1_reg: vgen1 {
204	regulator-min-microvolt = <800000>;
205	regulator-max-microvolt = <1550000>;
206	};
207
208	vgen2_1v2_eth: vgen2 {
209	regulator-min-microvolt = <800000>;
210	regulator-max-microvolt = <1550000>;
211	};
212
213	vdd_high_in: vgen3 {
214	regulator-min-microvolt = <1800000>;
215	regulator-max-microvolt = <3300000>;
216	regulator-boot-on;
217	regulator-always-on;
218	};
219
220	vgen4_reg: vgen4 {
221	regulator-min-microvolt = <1800000>;
222	regulator-max-microvolt = <3300000>;
223	regulator-always-on;
224	};
225
226	vgen5_reg: vgen5 {
227	regulator-min-microvolt = <1800000>;
228	regulator-max-microvolt = <3300000>;
229	regulator-always-on;
230	};
231
232	vgen6_reg: vgen6 {
233	regulator-min-microvolt = <1800000>;
234	regulator-max-microvolt = <3300000>;
235	regulator-always-on;
236	};
237	};
238	};
239
52d13453	240	stmpe1: stmpe1601@40 {
c1f77e73 S	241	compatible = "st,stmpe1601";
	242	reg = <0x40>;
	243	interrupts = <30 0>;
	244	interrupt-parent = <&gpio3>;
e59d28e8 SF	245	vcc-supply = <&sw2_reg>;
e59d28e8 SF	246	vio-supply = <&sw2_reg>;
c1f77e73	247
52d13453 LS	248	stmpe_gpio1: stmpe_gpio {
	249	#gpio-cells = <2>;
	250	compatible = "st,stmpe-gpio";
	251	};
	252	};
	253
	254	stmpe2: stmpe1601@44 {
	255	compatible = "st,stmpe1601";
	256	reg = <0x44>;
	257	interrupts = <2 0>;
	258	interrupt-parent = <&gpio5>;
e59d28e8 SF	259	vcc-supply = <&sw2_reg>;
e59d28e8 SF	260	vio-supply = <&sw2_reg>;
52d13453 LS	261
52d13453 LS	262	stmpe_gpio2: stmpe_gpio {
c1f77e73 S	263	#gpio-cells = <2>;
	264	compatible = "st,stmpe-gpio";
	265	};
	266	};
	267
	268	temp1: ad7414@4c {
	269	compatible = "ad,ad7414";
	270	reg = <0x4c>;
	271	};
	272
	273	temp2: ad7414@4d {
	274	compatible = "ad,ad7414";
	275	reg = <0x4d>;
	276	};
	277
	278	rtc: m41t62@68 {
0a6f366a	279	compatible = "st,m41t62";
c1f77e73 S	280	reg = <0x68>;
	281	};
	282	};
	283
3c6c8685 SF	284	&i2c3 {
	285	clock-frequency = <100000>;
	286	pinctrl-names = "default";
	287	pinctrl-0 = <&pinctrl_i2c3>;
	288	status = "okay";
	289	};
	290
c1f77e73 S	291	&iomuxc {
	292	pinctrl-names = "default";
	293	pinctrl-0 = <&pinctrl_hog>;
	294
	295	imx6q-dmo-edmqmx6 {
	296	pinctrl_hog: hoggrp {
	297	fsl,pins = <
	298	MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x80000000
	299	MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x80000000
	300	>;
	301	};
	302
37183793 SF	303	pinctrl_can1: can1grp {
	304	fsl,pins = <
	305	MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b0
	306	MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0
	307	>;
	308	};
	309
819826a1 LS	310	pinctrl_ecspi5: ecspi5rp-1 {
	311	fsl,pins = <
	312	MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO 0x80000000
	313	MX6QDL_PAD_SD1_CMD__ECSPI5_MOSI 0x80000000
	314	MX6QDL_PAD_SD1_CLK__ECSPI5_SCLK 0x80000000
	315	MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x80000000
	316	>;
	317	};
	318
c1f77e73 S	319	pinctrl_enet: enetgrp {
c1f77e73 S	320	fsl,pins = <
c007b3a6 UKK	321	MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
	322	MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
	323	MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
	324	MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
	325	MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
	326	MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
	327	MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
	328	MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
	329	MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
	330	MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
	331	MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
	332	MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
c1f77e73 S	333	MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
	334	MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
	335	MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
2f643105	336	MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0
c1f77e73 S	337	MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
	338	>;
	339	};
	340
3c6c8685 SF	341	pinctrl_i2c1: i2c1grp {
	342	fsl,pins = <
	343	MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
	344	MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
	345	>;
	346	};
	347
c1f77e73 S	348	pinctrl_i2c2: i2c2grp {
	349	fsl,pins = <
	350	MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1
	351	MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
	352	>;
	353	};
	354
3c6c8685 SF	355	pinctrl_i2c3: i2c3grp {
	356	fsl,pins = <
	357	MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
	358	MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
	359	>;
	360	};
	361
fd101c4c SF	362	pinctrl_pcie: pciegrp {
	363	fsl,pins = <
	364	MX6QDL_PAD_KEY_COL1__GPIO4_IO08 0x100b1
	365	>;
	366	};
	367
d02f74aa LS	368	pinctrl_pfuze: pfuze100grp1 {
	369	fsl,pins = <
	370	MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x80000000
	371	>;
	372	};
	373
52d13453	374	pinctrl_stmpe1: stmpe1grp {
c1f77e73 S	375	fsl,pins = <MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x80000000>;
	376	};
	377
52d13453 LS	378	pinctrl_stmpe2: stmpe2grp {
	379	fsl,pins = <MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000>;
	380	};
	381
c1f77e73 S	382	pinctrl_uart1: uart1grp {
	383	fsl,pins = <
	384	MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
	385	MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
	386	>;
	387	};
	388
	389	pinctrl_uart2: uart2grp {
	390	fsl,pins = <
	391	MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
	392	MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
	393	>;
	394	};
	395
	396	pinctrl_usbotg: usbotggrp {
	397	fsl,pins = <
19f7cb6d	398	MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
c1f77e73 S	399	>;
	400	};
	401
	402	pinctrl_usdhc3: usdhc3grp {
	403	fsl,pins = <
	404	MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
	405	MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
	406	MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
	407	MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
	408	MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
	409	MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
	410	>;
	411	};
	412
	413	pinctrl_usdhc4: usdhc4grp {
	414	fsl,pins = <
	415	MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
	416	MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
	417	MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
	418	MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
	419	MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
	420	MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
	421	MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
	422	MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
	423	MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
	424	MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
	425	>;
	426	};
	427	};
	428	};
	429
fd101c4c SF	430	&pcie {
	431	pinctrl-names = "default";
	432	pinctrl-0 = <&pinctrl_pcie>;
cc20028f	433	reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>;
fd101c4c SF	434	status = "okay";
	435	};
	436
c1f77e73 S	437	&sata {
	438	status = "okay";
	439	};
	440
	441	&uart1 {
	442	pinctrl-names = "default";
	443	pinctrl-0 = <&pinctrl_uart1>;
	444	status = "okay";
	445	};
	446
	447	&uart2 {
	448	pinctrl-names = "default";
	449	pinctrl-0 = <&pinctrl_uart2>;
	450	status = "okay";
	451	};
	452
	453	&usbh1 {
	454	vbus-supply = <&reg_usb_host1>;
	455	disable-over-current;
8dde78e8	456	dr_mode = "host";
c1f77e73 S	457	status = "okay";
	458	};
	459
	460	&usbotg {
c1f77e73 S	461	pinctrl-names = "default";
	462	pinctrl-0 = <&pinctrl_usbotg>;
	463	disable-over-current;
	464	status = "okay";
	465	};
	466
	467	&usdhc3 {
	468	pinctrl-names = "default";
	469	pinctrl-0 = <&pinctrl_usdhc3>;
	470	vmmc-supply = <&reg_3p3v>;
	471	status = "okay";
	472	};
	473
	474	&usdhc4 {
	475	pinctrl-names = "default";
	476	pinctrl-0 = <&pinctrl_usdhc4>;
	477	vmmc-supply = <&reg_3p3v>;
	478	non-removable;
	479	bus-width = <8>;
	480	status = "okay";
	481	};