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70a8c03b SC |
1 | /* |
2 | * Copyright 2015 Sutajio Ko-Usagi PTE LTD | |
3 | * | |
4 | * This file is dual-licensed: you can use it either under the terms | |
5 | * of the GPL or the X11 license, at your option. Note that this dual | |
6 | * licensing only applies to this file, and not this project as a | |
7 | * whole. | |
8 | * | |
9 | * a) This file is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU General Public License as | |
11 | * published by the Free Software Foundation; either version 2 of | |
12 | * the License, or (at your option) any later version. | |
13 | * | |
14 | * This file is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public | |
20 | * License along with this file; if not, write to the Free | |
21 | * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, | |
22 | * MA 02110-1301 USA | |
23 | * | |
24 | * Or, alternatively, | |
25 | * | |
26 | * b) Permission is hereby granted, free of charge, to any person | |
27 | * obtaining a copy of this software and associated documentation | |
28 | * files (the "Software"), to deal in the Software without | |
29 | * restriction, including without limitation the rights to use, | |
30 | * copy, modify, merge, publish, distribute, sublicense, and/or | |
31 | * sell copies of the Software, and to permit persons to whom the | |
32 | * Software is furnished to do so, subject to the following | |
33 | * conditions: | |
34 | * | |
35 | * The above copyright notice and this permission notice shall be | |
36 | * included in all copies or substantial portions of the Software. | |
37 | * | |
38 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
39 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES | |
40 | * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
41 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT | |
42 | * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, | |
43 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
44 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
45 | * OTHER DEALINGS IN THE SOFTWARE. | |
46 | * | |
47 | */ | |
48 | ||
49 | /dts-v1/; | |
50 | #include "imx6q.dtsi" | |
51 | #include <dt-bindings/gpio/gpio.h> | |
52 | #include <dt-bindings/input/input.h> | |
53 | ||
54 | / { | |
55 | model = "Kosagi Novena Dual/Quad"; | |
56 | compatible = "kosagi,imx6q-novena", "fsl,imx6q"; | |
57 | ||
6de57233 | 58 | /* Will be filled by the bootloader */ |
edc05819 | 59 | memory@10000000 { |
404c0c93 | 60 | device_type = "memory"; |
edc05819 | 61 | reg = <0x10000000 0>; |
6de57233 MF |
62 | }; |
63 | ||
70a8c03b SC |
64 | chosen { |
65 | stdout-path = &uart2; | |
66 | }; | |
67 | ||
68 | backlight: backlight { | |
69 | compatible = "pwm-backlight"; | |
70 | pwms = <&pwm1 0 10000000>; | |
71 | pinctrl-names = "default"; | |
72 | pinctrl-0 = <&pinctrl_backlight_novena>; | |
73 | power-supply = <®_lvds_lcd>; | |
74 | brightness-levels = <0 3 6 12 16 24 32 48 64 96 128 192 255>; | |
75 | default-brightness-level = <12>; | |
76 | }; | |
77 | ||
78 | gpio-keys { | |
79 | compatible = "gpio-keys"; | |
80 | pinctrl-names = "default"; | |
81 | pinctrl-0 = <&pinctrl_gpio_keys_novena>; | |
82 | ||
83 | user-button { | |
84 | label = "User Button"; | |
85 | gpios = <&gpio4 14 GPIO_ACTIVE_LOW>; | |
86 | linux,code = <KEY_POWER>; | |
87 | }; | |
88 | ||
89 | lid { | |
90 | label = "Lid"; | |
91 | gpios = <&gpio4 12 GPIO_ACTIVE_LOW>; | |
92 | linux,input-type = <5>; /* EV_SW */ | |
93 | linux,code = <0>; /* SW_LID */ | |
94 | }; | |
95 | }; | |
96 | ||
97 | leds { | |
98 | compatible = "gpio-leds"; | |
99 | pinctrl-names = "default"; | |
100 | pinctrl-0 = <&pinctrl_leds_novena>; | |
101 | ||
102 | heartbeat { | |
103 | label = "novena:white:panel"; | |
104 | gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; | |
105 | linux,default-trigger = "default-on"; | |
106 | }; | |
107 | }; | |
108 | ||
109 | panel: panel { | |
110 | compatible = "innolux,n133hse-ea1", "simple-panel"; | |
111 | backlight = <&backlight>; | |
112 | }; | |
113 | ||
114 | reg_2p5v: regulator-2p5v { | |
115 | compatible = "regulator-fixed"; | |
116 | regulator-name = "2P5V"; | |
117 | regulator-min-microvolt = <2500000>; | |
118 | regulator-max-microvolt = <2500000>; | |
119 | regulator-always-on; | |
120 | }; | |
121 | ||
122 | reg_3p3v: regulator-3p3v { | |
123 | compatible = "regulator-fixed"; | |
124 | regulator-name = "3P3V"; | |
125 | regulator-min-microvolt = <3300000>; | |
126 | regulator-max-microvolt = <3300000>; | |
127 | regulator-always-on; | |
128 | }; | |
129 | ||
130 | reg_audio_codec: regulator-audio-codec { | |
131 | compatible = "regulator-fixed"; | |
132 | regulator-name = "es8328-power"; | |
133 | regulator-boot-on; | |
134 | regulator-min-microvolt = <5000000>; | |
135 | regulator-max-microvolt = <5000000>; | |
136 | startup-delay-us = <400000>; | |
137 | gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>; | |
138 | enable-active-high; | |
139 | }; | |
140 | ||
141 | reg_display: regulator-display { | |
142 | compatible = "regulator-fixed"; | |
143 | regulator-name = "lcd-display-power"; | |
144 | regulator-min-microvolt = <3300000>; | |
145 | regulator-max-microvolt = <3300000>; | |
146 | startup-delay-us = <200000>; | |
147 | gpio = <&gpio5 28 GPIO_ACTIVE_HIGH>; | |
148 | enable-active-high; | |
149 | }; | |
150 | ||
151 | reg_lvds_lcd: regulator-lvds-lcd { | |
152 | compatible = "regulator-fixed"; | |
153 | regulator-name = "lcd-lvds-power"; | |
154 | regulator-min-microvolt = <3300000>; | |
155 | regulator-max-microvolt = <3300000>; | |
156 | gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>; | |
157 | enable-active-high; | |
158 | }; | |
159 | ||
160 | reg_pcie: regulator-pcie { | |
161 | compatible = "regulator-fixed"; | |
162 | regulator-name = "pcie-bus-power"; | |
163 | regulator-min-microvolt = <1500000>; | |
164 | regulator-max-microvolt = <1500000>; | |
165 | gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>; | |
166 | enable-active-high; | |
70a8c03b SC |
167 | }; |
168 | ||
169 | reg_sata: regulator-sata { | |
170 | compatible = "regulator-fixed"; | |
171 | regulator-name = "sata-power"; | |
172 | regulator-boot-on; | |
173 | regulator-min-microvolt = <3300000>; | |
174 | regulator-max-microvolt = <3300000>; | |
175 | startup-delay-us = <10000>; | |
176 | gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>; | |
177 | enable-active-high; | |
178 | }; | |
179 | ||
180 | reg_usb_otg_vbus: regulator-usb-otg-vbus { | |
181 | compatible = "regulator-fixed"; | |
182 | regulator-name = "usb_otg_vbus"; | |
183 | regulator-min-microvolt = <5000000>; | |
184 | regulator-max-microvolt = <5000000>; | |
185 | enable-active-high; | |
186 | }; | |
187 | ||
188 | sound { | |
189 | compatible = "fsl,imx-audio-es8328"; | |
190 | model = "imx-audio-es8328"; | |
191 | ssi-controller = <&ssi1>; | |
192 | audio-codec = <&codec>; | |
193 | audio-amp-supply = <®_audio_codec>; | |
194 | jack-gpio = <&gpio5 15 GPIO_ACTIVE_HIGH>; | |
195 | audio-routing = | |
196 | "Speaker", "LOUT2", | |
197 | "Speaker", "ROUT2", | |
198 | "Speaker", "audio-amp", | |
199 | "Headphone", "ROUT1", | |
200 | "Headphone", "LOUT1", | |
201 | "LINPUT1", "Mic Jack", | |
202 | "RINPUT1", "Mic Jack", | |
203 | "Mic Jack", "Mic Bias"; | |
204 | mux-int-port = <0x1>; | |
205 | mux-ext-port = <0x3>; | |
206 | }; | |
207 | }; | |
208 | ||
209 | &audmux { | |
210 | pinctrl-names = "default"; | |
211 | pinctrl-0 = <&pinctrl_audmux_novena>; | |
212 | status = "okay"; | |
213 | }; | |
214 | ||
215 | &ecspi3 { | |
216 | pinctrl-names = "default"; | |
217 | pinctrl-0 = <&pinctrl_ecspi3_novena>; | |
70a8c03b SC |
218 | status = "okay"; |
219 | }; | |
220 | ||
221 | &fec { | |
222 | pinctrl-names = "default"; | |
223 | pinctrl-0 = <&pinctrl_enet_novena>; | |
224 | phy-mode = "rgmii"; | |
12de44f5 | 225 | phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>; |
70a8c03b SC |
226 | rxc-skew-ps = <3000>; |
227 | rxdv-skew-ps = <0>; | |
228 | txc-skew-ps = <3000>; | |
229 | txen-skew-ps = <0>; | |
230 | rxd0-skew-ps = <0>; | |
231 | rxd1-skew-ps = <0>; | |
232 | rxd2-skew-ps = <0>; | |
233 | rxd3-skew-ps = <0>; | |
234 | txd0-skew-ps = <3000>; | |
235 | txd1-skew-ps = <3000>; | |
236 | txd2-skew-ps = <3000>; | |
237 | txd3-skew-ps = <3000>; | |
238 | status = "okay"; | |
239 | }; | |
240 | ||
241 | &hdmi { | |
242 | pinctrl-names = "default"; | |
243 | pinctrl-0 = <&pinctrl_hdmi_novena>; | |
244 | ddc-i2c-bus = <&i2c2>; | |
245 | status = "okay"; | |
246 | }; | |
247 | ||
248 | &i2c1 { | |
249 | pinctrl-names = "default"; | |
250 | pinctrl-0 = <&pinctrl_i2c1_novena>; | |
251 | status = "okay"; | |
252 | ||
253 | accel: mma8452@1c { | |
254 | compatible = "fsl,mma8452"; | |
255 | reg = <0x1c>; | |
256 | }; | |
257 | ||
258 | rtc: pcf8523@68 { | |
259 | compatible = "nxp,pcf8523"; | |
260 | reg = <0x68>; | |
261 | }; | |
262 | ||
8dccafaa | 263 | sbs_battery: bq20z75@b { |
70a8c03b SC |
264 | compatible = "sbs,sbs-battery"; |
265 | reg = <0x0b>; | |
266 | sbs,i2c-retry-count = <50>; | |
267 | }; | |
268 | ||
269 | touch: stmpe811@44 { | |
270 | compatible = "st,stmpe811"; | |
271 | reg = <0x44>; | |
70a8c03b SC |
272 | irq-gpio = <&gpio5 13 GPIO_ACTIVE_HIGH>; |
273 | id = <0>; | |
274 | blocks = <0x5>; | |
275 | irq-trigger = <0x1>; | |
276 | pinctrl-names = "default"; | |
277 | pinctrl-0 = <&pinctrl_stmpe_novena>; | |
278 | vio-supply = <®_3p3v>; | |
279 | vcc-supply = <®_3p3v>; | |
280 | ||
281 | stmpe_touchscreen { | |
282 | compatible = "st,stmpe-ts"; | |
283 | st,sample-time = <4>; | |
284 | st,mod-12b = <1>; | |
285 | st,ref-sel = <0>; | |
286 | st,adc-freq = <1>; | |
287 | st,ave-ctrl = <1>; | |
288 | st,touch-det-delay = <2>; | |
289 | st,settling = <2>; | |
290 | st,fraction-z = <7>; | |
291 | st,i-drive = <1>; | |
292 | }; | |
293 | }; | |
294 | }; | |
295 | ||
296 | &i2c2 { | |
297 | pinctrl-names = "default"; | |
298 | pinctrl-0 = <&pinctrl_i2c2_novena>; | |
299 | status = "okay"; | |
300 | ||
8dccafaa | 301 | pmic: pfuze100@8 { |
70a8c03b SC |
302 | compatible = "fsl,pfuze100"; |
303 | reg = <0x08>; | |
304 | ||
305 | regulators { | |
306 | reg_sw1a: sw1a { | |
307 | regulator-min-microvolt = <300000>; | |
308 | regulator-max-microvolt = <1875000>; | |
309 | regulator-boot-on; | |
310 | regulator-always-on; | |
311 | regulator-ramp-delay = <6250>; | |
312 | }; | |
313 | ||
314 | reg_sw1c: sw1c { | |
315 | regulator-min-microvolt = <300000>; | |
316 | regulator-max-microvolt = <1875000>; | |
317 | regulator-boot-on; | |
318 | regulator-always-on; | |
319 | }; | |
320 | ||
321 | reg_sw2: sw2 { | |
322 | regulator-min-microvolt = <800000>; | |
323 | regulator-max-microvolt = <3300000>; | |
324 | regulator-boot-on; | |
325 | regulator-always-on; | |
326 | }; | |
327 | ||
328 | reg_sw3a: sw3a { | |
329 | regulator-min-microvolt = <400000>; | |
330 | regulator-max-microvolt = <1975000>; | |
331 | regulator-boot-on; | |
332 | regulator-always-on; | |
333 | }; | |
334 | ||
335 | reg_sw3b: sw3b { | |
336 | regulator-min-microvolt = <400000>; | |
337 | regulator-max-microvolt = <1975000>; | |
338 | regulator-boot-on; | |
339 | regulator-always-on; | |
340 | }; | |
341 | ||
342 | reg_sw4: sw4 { | |
343 | regulator-min-microvolt = <800000>; | |
344 | regulator-max-microvolt = <3300000>; | |
345 | }; | |
346 | ||
347 | reg_swbst: swbst { | |
348 | regulator-min-microvolt = <5000000>; | |
349 | regulator-max-microvolt = <5150000>; | |
350 | regulator-boot-on; | |
351 | }; | |
352 | ||
353 | reg_snvs: vsnvs { | |
354 | regulator-min-microvolt = <1000000>; | |
355 | regulator-max-microvolt = <3000000>; | |
356 | regulator-boot-on; | |
357 | regulator-always-on; | |
358 | }; | |
359 | ||
360 | reg_vref: vrefddr { | |
361 | regulator-boot-on; | |
362 | regulator-always-on; | |
363 | }; | |
364 | ||
365 | reg_vgen1: vgen1 { | |
366 | regulator-min-microvolt = <800000>; | |
367 | regulator-max-microvolt = <1550000>; | |
368 | }; | |
369 | ||
370 | reg_vgen2: vgen2 { | |
371 | regulator-min-microvolt = <800000>; | |
372 | regulator-max-microvolt = <1550000>; | |
373 | }; | |
374 | ||
375 | reg_vgen3: vgen3 { | |
376 | regulator-min-microvolt = <1800000>; | |
377 | regulator-max-microvolt = <3300000>; | |
378 | }; | |
379 | ||
380 | reg_vgen4: vgen4 { | |
381 | regulator-min-microvolt = <1800000>; | |
382 | regulator-max-microvolt = <3300000>; | |
383 | regulator-always-on; | |
384 | }; | |
385 | ||
386 | reg_vgen5: vgen5 { | |
387 | regulator-min-microvolt = <1800000>; | |
388 | regulator-max-microvolt = <3300000>; | |
389 | regulator-always-on; | |
390 | }; | |
391 | ||
392 | reg_vgen6: vgen6 { | |
393 | regulator-min-microvolt = <1800000>; | |
394 | regulator-max-microvolt = <3300000>; | |
395 | regulator-always-on; | |
396 | }; | |
397 | }; | |
398 | }; | |
399 | }; | |
400 | ||
401 | &i2c3 { | |
402 | pinctrl-names = "default"; | |
403 | pinctrl-0 = <&pinctrl_i2c3_novena>; | |
404 | status = "okay"; | |
405 | ||
406 | codec: es8328@11 { | |
407 | compatible = "everest,es8328"; | |
408 | reg = <0x11>; | |
409 | DVDD-supply = <®_audio_codec>; | |
410 | AVDD-supply = <®_audio_codec>; | |
411 | PVDD-supply = <®_audio_codec>; | |
412 | HPVDD-supply = <®_audio_codec>; | |
413 | pinctrl-names = "default"; | |
414 | pinctrl-0 = <&pinctrl_sound_novena>; | |
415 | clocks = <&clks IMX6QDL_CLK_CKO1>; | |
416 | assigned-clocks = <&clks IMX6QDL_CLK_CKO>, | |
417 | <&clks IMX6QDL_CLK_CKO1_SEL>, | |
418 | <&clks IMX6QDL_CLK_PLL4_AUDIO>, | |
419 | <&clks IMX6QDL_CLK_CKO1>; | |
420 | assigned-clock-parents = <&clks IMX6QDL_CLK_CKO1>, | |
421 | <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>, | |
422 | <&clks IMX6QDL_CLK_OSC>, | |
423 | <&clks IMX6QDL_CLK_CKO1_PODF>; | |
424 | assigned-clock-rates = <0 0 722534400 22579200>; | |
425 | }; | |
426 | }; | |
427 | ||
428 | &kpp { | |
429 | pinctrl-names = "default"; | |
430 | pinctrl-0 = <&pinctrl_kpp_novena>; | |
431 | linux,keymap = < | |
432 | MATRIX_KEY(1, 1, KEY_CONFIG) | |
433 | >; | |
434 | status = "okay"; | |
435 | }; | |
436 | ||
437 | &ldb { | |
438 | fsl,dual-channel; | |
439 | status = "okay"; | |
440 | ||
441 | lvds-channel@0 { | |
442 | fsl,data-mapping = "jeida"; | |
443 | fsl,data-width = <24>; | |
444 | fsl,panel = <&panel>; | |
445 | status = "okay"; | |
446 | }; | |
447 | }; | |
448 | ||
449 | &pcie { | |
450 | pinctrl-names = "default"; | |
451 | pinctrl-0 = <&pinctrl_pcie_novena>; | |
cc20028f | 452 | reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>; |
b038b881 | 453 | vpcie-supply = <®_pcie>; |
70a8c03b SC |
454 | status = "okay"; |
455 | }; | |
456 | ||
95a36c11 MV |
457 | &pwm1 { |
458 | status = "okay"; | |
459 | }; | |
460 | ||
70a8c03b SC |
461 | &sata { |
462 | target-supply = <®_sata>; | |
463 | fsl,transmit-level-mV = <1025>; | |
464 | fsl,transmit-boost-mdB = <0>; | |
465 | fsl,transmit-atten-16ths = <8>; | |
466 | status = "okay"; | |
467 | }; | |
468 | ||
469 | &ssi1 { | |
470 | status = "okay"; | |
471 | }; | |
472 | ||
473 | &uart2 { | |
474 | pinctrl-names = "default"; | |
475 | pinctrl-0 = <&pinctrl_uart2_novena>; | |
476 | status = "okay"; | |
477 | }; | |
478 | ||
479 | &uart3 { | |
480 | pinctrl-names = "default"; | |
481 | pinctrl-0 = <&pinctrl_uart3_novena>; | |
482 | status = "okay"; | |
483 | }; | |
484 | ||
485 | &uart4 { | |
486 | pinctrl-names = "default"; | |
487 | pinctrl-0 = <&pinctrl_uart4_novena>; | |
488 | status = "okay"; | |
489 | }; | |
490 | ||
491 | &usbotg { | |
492 | vbus-supply = <®_usb_otg_vbus>; | |
493 | dr_mode = "otg"; | |
494 | pinctrl-names = "default"; | |
495 | pinctrl-0 = <&pinctrl_usbotg_novena>; | |
496 | disable-over-current; | |
497 | status = "okay"; | |
498 | }; | |
499 | ||
500 | &usbh1 { | |
501 | vbus-supply = <®_swbst>; | |
502 | status = "okay"; | |
503 | }; | |
504 | ||
505 | &usdhc2 { | |
506 | pinctrl-names = "default"; | |
507 | pinctrl-0 = <&pinctrl_usdhc2_novena>; | |
508 | cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; | |
509 | wp-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; | |
510 | bus-width = <4>; | |
511 | status = "okay"; | |
512 | }; | |
513 | ||
514 | &usdhc3 { | |
515 | pinctrl-names = "default"; | |
516 | pinctrl-0 = <&pinctrl_usdhc3_novena>; | |
517 | bus-width = <4>; | |
518 | non-removable; | |
519 | status = "okay"; | |
520 | }; | |
521 | ||
522 | &iomuxc { | |
523 | pinctrl_audmux_novena: audmuxgrp-novena { | |
524 | fsl,pins = < | |
525 | MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 | |
526 | MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 | |
527 | MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 | |
528 | MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 | |
529 | >; | |
530 | }; | |
531 | ||
532 | pinctrl_backlight_novena: backlightgrp-novena { | |
533 | fsl,pins = < | |
534 | MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b0 | |
535 | MX6QDL_PAD_CSI0_DAT10__GPIO5_IO28 0x1b0b1 | |
536 | MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b1 | |
537 | >; | |
538 | }; | |
539 | ||
540 | pinctrl_ecspi3_novena: ecspi3grp-novena { | |
541 | fsl,pins = < | |
542 | MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1 | |
543 | MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1 | |
544 | MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1 | |
545 | >; | |
546 | }; | |
547 | ||
548 | pinctrl_enet_novena: enetgrp-novena { | |
549 | fsl,pins = < | |
550 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 | |
551 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 | |
552 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b020 | |
553 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b028 | |
554 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b028 | |
555 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b028 | |
556 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b028 | |
557 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b028 | |
558 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 | |
c007b3a6 UKK |
559 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 |
560 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 | |
561 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 | |
562 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 | |
563 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 | |
564 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 | |
70a8c03b SC |
565 | MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 |
566 | /* Ethernet reset */ | |
567 | MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x1b0b1 | |
568 | >; | |
569 | }; | |
570 | ||
571 | pinctrl_fpga_gpio: fpgagpiogrp-novena { | |
572 | fsl,pins = < | |
573 | /* FPGA power */ | |
574 | MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x1b0b1 | |
575 | /* Reset */ | |
576 | MX6QDL_PAD_DISP0_DAT13__GPIO5_IO07 0x1b0b1 | |
577 | /* FPGA GPIOs */ | |
578 | MX6QDL_PAD_EIM_DA0__GPIO3_IO00 0x1b0b1 | |
579 | MX6QDL_PAD_EIM_DA1__GPIO3_IO01 0x1b0b1 | |
580 | MX6QDL_PAD_EIM_DA2__GPIO3_IO02 0x1b0b1 | |
581 | MX6QDL_PAD_EIM_DA3__GPIO3_IO03 0x1b0b1 | |
582 | MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x1b0b1 | |
583 | MX6QDL_PAD_EIM_DA5__GPIO3_IO05 0x1b0b1 | |
584 | MX6QDL_PAD_EIM_DA6__GPIO3_IO06 0x1b0b1 | |
585 | MX6QDL_PAD_EIM_DA7__GPIO3_IO07 0x1b0b1 | |
586 | MX6QDL_PAD_EIM_DA8__GPIO3_IO08 0x1b0b1 | |
587 | MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x1b0b1 | |
588 | MX6QDL_PAD_EIM_DA10__GPIO3_IO10 0x1b0b1 | |
589 | MX6QDL_PAD_EIM_DA11__GPIO3_IO11 0x1b0b1 | |
590 | MX6QDL_PAD_EIM_DA12__GPIO3_IO12 0x1b0b1 | |
591 | MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x1b0b1 | |
592 | MX6QDL_PAD_EIM_DA14__GPIO3_IO14 0x1b0b1 | |
593 | MX6QDL_PAD_EIM_DA15__GPIO3_IO15 0x1b0b1 | |
594 | MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x1b0b1 | |
595 | MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x1b0b1 | |
596 | MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x1b0b1 | |
597 | MX6QDL_PAD_EIM_CS0__GPIO2_IO23 0x1b0b1 | |
598 | MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x1b0b1 | |
599 | MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x1b0b1 | |
600 | MX6QDL_PAD_EIM_OE__GPIO2_IO25 0x1b0b1 | |
601 | MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x1b0b1 | |
602 | MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 0x1b0b1 | |
603 | MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x1b0b1 | |
604 | >; | |
605 | }; | |
606 | ||
607 | pinctrl_fpga_eim: fpgaeimgrp-novena { | |
608 | fsl,pins = < | |
609 | /* FPGA power */ | |
610 | MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x1b0b1 | |
611 | /* Reset */ | |
612 | MX6QDL_PAD_DISP0_DAT13__GPIO5_IO07 0x1b0b1 | |
613 | /* FPGA GPIOs */ | |
614 | MX6QDL_PAD_EIM_DA0__EIM_AD00 0xb0f1 | |
615 | MX6QDL_PAD_EIM_DA1__EIM_AD01 0xb0f1 | |
616 | MX6QDL_PAD_EIM_DA2__EIM_AD02 0xb0f1 | |
617 | MX6QDL_PAD_EIM_DA3__EIM_AD03 0xb0f1 | |
618 | MX6QDL_PAD_EIM_DA4__EIM_AD04 0xb0f1 | |
619 | MX6QDL_PAD_EIM_DA5__EIM_AD05 0xb0f1 | |
620 | MX6QDL_PAD_EIM_DA6__EIM_AD06 0xb0f1 | |
621 | MX6QDL_PAD_EIM_DA7__EIM_AD07 0xb0f1 | |
622 | MX6QDL_PAD_EIM_DA8__EIM_AD08 0xb0f1 | |
623 | MX6QDL_PAD_EIM_DA9__EIM_AD09 0xb0f1 | |
624 | MX6QDL_PAD_EIM_DA10__EIM_AD10 0xb0f1 | |
625 | MX6QDL_PAD_EIM_DA11__EIM_AD11 0xb0f1 | |
626 | MX6QDL_PAD_EIM_DA12__EIM_AD12 0xb0f1 | |
627 | MX6QDL_PAD_EIM_DA13__EIM_AD13 0xb0f1 | |
628 | MX6QDL_PAD_EIM_DA14__EIM_AD14 0xb0f1 | |
629 | MX6QDL_PAD_EIM_DA15__EIM_AD15 0xb0f1 | |
630 | MX6QDL_PAD_EIM_A16__EIM_ADDR16 0xb0f1 | |
631 | MX6QDL_PAD_EIM_A17__EIM_ADDR17 0xb0f1 | |
632 | MX6QDL_PAD_EIM_A18__EIM_ADDR18 0xb0f1 | |
633 | MX6QDL_PAD_EIM_CS0__EIM_CS0_B 0xb0f1 | |
634 | MX6QDL_PAD_EIM_CS1__EIM_CS1_B 0xb0f1 | |
635 | MX6QDL_PAD_EIM_LBA__EIM_LBA_B 0xb0f1 | |
636 | MX6QDL_PAD_EIM_OE__EIM_OE_B 0xb0f1 | |
637 | MX6QDL_PAD_EIM_RW__EIM_RW 0xb0f1 | |
638 | MX6QDL_PAD_EIM_WAIT__EIM_WAIT_B 0xb0f1 | |
639 | MX6QDL_PAD_EIM_BCLK__EIM_BCLK 0xb0f1 | |
640 | >; | |
641 | }; | |
642 | ||
643 | pinctrl_gpio_keys_novena: gpiokeysgrp-novena { | |
644 | fsl,pins = < | |
645 | /* User button */ | |
646 | MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b0b0 | |
647 | /* PCIe Wakeup */ | |
648 | MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1f0e0 | |
649 | /* Lid switch */ | |
650 | MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x1b0b0 | |
651 | >; | |
652 | }; | |
653 | ||
654 | pinctrl_hdmi_novena: hdmigrp-novena { | |
655 | fsl,pins = < | |
656 | MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0 | |
657 | MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x1b0b1 | |
658 | >; | |
659 | }; | |
660 | ||
661 | pinctrl_i2c1_novena: i2c1grp-novena { | |
662 | fsl,pins = < | |
663 | MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 | |
664 | MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 | |
665 | >; | |
666 | }; | |
667 | ||
668 | pinctrl_i2c2_novena: i2c2grp-novena { | |
669 | fsl,pins = < | |
670 | MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1 | |
671 | MX6QDL_PAD_EIM_D16__I2C2_SDA 0x4001b8b1 | |
672 | >; | |
673 | }; | |
674 | ||
675 | pinctrl_i2c3_novena: i2c3grp-novena { | |
676 | fsl,pins = < | |
677 | MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1 | |
678 | MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1 | |
679 | >; | |
680 | }; | |
681 | ||
682 | pinctrl_kpp_novena: kppgrp-novena { | |
683 | fsl,pins = < | |
684 | /* Front panel button */ | |
685 | MX6QDL_PAD_KEY_ROW1__KEY_ROW1 0x1b0b1 | |
686 | /* Fake column driver, not connected */ | |
687 | MX6QDL_PAD_KEY_COL1__KEY_COL1 0x1b0b1 | |
688 | >; | |
689 | }; | |
690 | ||
691 | pinctrl_leds_novena: ledsgrp-novena { | |
692 | fsl,pins = < | |
693 | MX6QDL_PAD_SD1_DAT3__GPIO1_IO21 0x1b0b1 | |
694 | >; | |
695 | }; | |
696 | ||
697 | pinctrl_pcie_novena: pciegrp-novena { | |
698 | fsl,pins = < | |
699 | /* Reset */ | |
700 | MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b1 | |
701 | /* Power On */ | |
702 | MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b1 | |
703 | /* Wifi kill */ | |
704 | MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x1b0b1 | |
705 | >; | |
706 | }; | |
707 | ||
708 | pinctrl_sata_novena: satagrp-novena { | |
709 | fsl,pins = < | |
710 | MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x1b0b1 | |
711 | >; | |
712 | }; | |
713 | ||
714 | pinctrl_senoko_novena: senokogrp-novena { | |
715 | fsl,pins = < | |
716 | /* Senoko IRQ line */ | |
717 | MX6QDL_PAD_SD1_CLK__GPIO1_IO20 0x13048 | |
718 | /* Senoko reset line */ | |
719 | MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x1b0b1 | |
720 | >; | |
721 | }; | |
722 | ||
723 | pinctrl_sound_novena: soundgrp-novena { | |
724 | fsl,pins = < | |
725 | /* Audio power regulator */ | |
726 | MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x1b0b1 | |
727 | /* Headphone plug */ | |
728 | MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 0x1b0b1 | |
729 | MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000b0 | |
730 | >; | |
731 | }; | |
732 | ||
733 | pinctrl_stmpe_novena: stmpegrp-novena { | |
734 | fsl,pins = < | |
735 | /* Touchscreen interrupt */ | |
736 | MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 0x1b0b1 | |
737 | >; | |
738 | }; | |
739 | ||
740 | pinctrl_uart2_novena: uart2grp-novena { | |
741 | fsl,pins = < | |
742 | MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 | |
743 | MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 | |
744 | >; | |
745 | }; | |
746 | ||
747 | pinctrl_uart3_novena: uart3grp-novena { | |
748 | fsl,pins = < | |
749 | MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 | |
750 | MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 | |
751 | >; | |
752 | }; | |
753 | ||
754 | pinctrl_uart4_novena: uart4grp-novena { | |
755 | fsl,pins = < | |
756 | MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1 | |
757 | MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1 | |
758 | >; | |
759 | }; | |
760 | ||
761 | pinctrl_usbotg_novena: usbotggrp-novena { | |
762 | fsl,pins = < | |
763 | MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 | |
764 | >; | |
765 | }; | |
766 | ||
767 | pinctrl_usdhc2_novena: usdhc2grp-novena { | |
768 | fsl,pins = < | |
769 | MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170f9 | |
770 | MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100f9 | |
771 | MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170f9 | |
772 | MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170f9 | |
773 | MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170f9 | |
774 | MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170f9 | |
775 | /* Write protect */ | |
776 | MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b1 | |
777 | /* Card detect */ | |
778 | MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b1 | |
779 | >; | |
780 | }; | |
781 | ||
782 | pinctrl_usdhc3_novena: usdhc3grp-novena { | |
783 | fsl,pins = < | |
784 | MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9 | |
785 | MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9 | |
786 | MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9 | |
787 | MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9 | |
788 | MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9 | |
789 | MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9 | |
790 | >; | |
791 | }; | |
792 | }; |