[mirror_ubuntu-hirsute-kernel.git] / arch / arm / boot / dts / imx6qdl-gw54xx.dtsi

/*
 * Copyright 2013 Gateworks Corporation
 *
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

#include <dt-bindings/gpio/gpio.h>

/ {
	/* these are used by bootloader for disabling nodes */
	aliases {
		led0 = &led0;
		led1 = &led1;
		led2 = &led2;
		nand = &gpmi;
		ssi0 = &ssi1;
		usb0 = &usbh1;
		usb1 = &usbotg;
	};

	chosen {
		bootargs = "console=ttymxc1,115200";
	};

	backlight {
		compatible = "pwm-backlight";
		pwms = <&pwm4 0 5000000>;
		brightness-levels = <0 4 8 16 32 64 128 255>;
		default-brightness-level = <7>;
	};

	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_leds>;

		led0: user1 {
			label = "user1";
			gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
			default-state = "on";
			linux,default-trigger = "heartbeat";
		};

		led1: user2 {
			label = "user2";
			gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
			default-state = "off";
		};

		led2: user3 {
			label = "user3";
			gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
			default-state = "off";
		};
	};

	memory@10000000 {
		device_type = "memory";
		reg = <0x10000000 0x40000000>;
	};

	pps {
		compatible = "pps-gpio";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_pps>;
		gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
		status = "okay";
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		reg_1p0v: regulator@0 {
			compatible = "regulator-fixed";
			reg = <0>;
			regulator-name = "1P0V";
			regulator-min-microvolt = <1000000>;
			regulator-max-microvolt = <1000000>;
			regulator-always-on;
		};

		reg_3p3v: regulator@1 {
			compatible = "regulator-fixed";
			reg = <1>;
			regulator-name = "3P3V";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			regulator-always-on;
		};

		reg_usb_h1_vbus: regulator@2 {
			compatible = "regulator-fixed";
			reg = <2>;
			regulator-name = "usb_h1_vbus";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			regulator-always-on;
		};

		reg_usb_otg_vbus: regulator@3 {
			compatible = "regulator-fixed";
			reg = <3>;
			regulator-name = "usb_otg_vbus";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
			enable-active-high;
		};
	};

	sound {
		compatible = "fsl,imx6q-ventana-sgtl5000",
			     "fsl,imx-audio-sgtl5000";
		model = "sgtl5000-audio";
		ssi-controller = <&ssi1>;
		audio-codec = <&codec>;
		audio-routing =
			"MIC_IN", "Mic Jack",
			"Mic Jack", "Mic Bias",
			"Headphone Jack", "HP_OUT";
		mux-int-port = <1>;
		mux-ext-port = <4>;
	};
};

&audmux {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_audmux>; /* AUD4<->sgtl5000 */
	status = "okay";
};

&can1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_flexcan1>;
	status = "okay";
};

&clks {
	assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
			  <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
				 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
};

&ecspi2 {
	cs-gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi2>;
	status = "okay";
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-mode = "rgmii-id";
	phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&gpmi {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_gpmi_nand>;
	status = "okay";
};

&hdmi {
	ddc-i2c-bus = <&i2c3>;
	status = "okay";
};

&i2c1 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";

	eeprom1: eeprom@50 {
		compatible = "atmel,24c02";
		reg = <0x50>;
		pagesize = <16>;
	};

	eeprom2: eeprom@51 {
		compatible = "atmel,24c02";
		reg = <0x51>;
		pagesize = <16>;
	};

	eeprom3: eeprom@52 {
		compatible = "atmel,24c02";
		reg = <0x52>;
		pagesize = <16>;
	};

	eeprom4: eeprom@53 {
		compatible = "atmel,24c02";
		reg = <0x53>;
		pagesize = <16>;
	};

	gpio: pca9555@23 {
		compatible = "nxp,pca9555";
		reg = <0x23>;
		gpio-controller;
		#gpio-cells = <2>;
	};

	rtc: ds1672@68 {
		compatible = "dallas,ds1672";
		reg = <0x68>;
	};
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";

	pmic: pfuze100@8 {
		compatible = "fsl,pfuze100";
		reg = <0x08>;

		regulators {
			sw1a_reg: sw1ab {
				regulator-min-microvolt = <300000>;
				regulator-max-microvolt = <1875000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			sw1c_reg: sw1c {
				regulator-min-microvolt = <300000>;
				regulator-max-microvolt = <1875000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			sw2_reg: sw2 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <3950000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw3a_reg: sw3a {
				regulator-min-microvolt = <400000>;
				regulator-max-microvolt = <1975000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw3b_reg: sw3b {
				regulator-min-microvolt = <400000>;
				regulator-max-microvolt = <1975000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw4_reg: sw4 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <3300000>;
			};

			swbst_reg: swbst {
				regulator-min-microvolt = <5000000>;
				regulator-max-microvolt = <5150000>;
				regulator-boot-on;
				regulator-always-on;
			};

			snvs_reg: vsnvs {
				regulator-min-microvolt = <1000000>;
				regulator-max-microvolt = <3000000>;
				regulator-boot-on;
				regulator-always-on;
			};

			vref_reg: vrefddr {
				regulator-boot-on;
				regulator-always-on;
			};

			vgen1_reg: vgen1 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1550000>;
			};

			vgen2_reg: vgen2 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1550000>;
			};

			vgen3_reg: vgen3 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
			};

			vgen4_reg: vgen4 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen5_reg: vgen5 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen6_reg: vgen6 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};
		};
	};
};

&i2c3 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";

	codec: sgtl5000@a {
		compatible = "fsl,sgtl5000";
		reg = <0x0a>;
		clocks = <&clks IMX6QDL_CLK_CKO>;
		VDDA-supply = <&sw4_reg>;
		VDDIO-supply = <&reg_3p3v>;
	};

	touchscreen: egalax_ts@4 {
		compatible = "eeti,egalax_ts";
		reg = <0x04>;
		interrupt-parent = <&gpio7>;
		interrupts = <12 2>;
		wakeup-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
	};
};

&ldb {
	status = "okay";

	lvds-channel@0 {
		fsl,data-mapping = "spwg";
		fsl,data-width = <18>;
		status = "okay";

		display-timings {
			native-mode = <&timing0>;
			timing0: hsd100pxn1 {
				clock-frequency = <65000000>;
				hactive = <1024>;
				vactive = <768>;
				hback-porch = <220>;
				hfront-porch = <40>;
				vback-porch = <21>;
				vfront-porch = <7>;
				hsync-len = <60>;
				vsync-len = <10>;
			};
		};
	};
};

&pcie {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pcie>;
	reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&pwm1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm1>; /* MX6_DIO0 */
	status = "disabled";
};

&pwm2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
	status = "disabled";
};

&pwm3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
	status = "disabled";
};

&pwm4 {
	pinctrl-names = "default", "state_dio";
	pinctrl-0 = <&pinctrl_pwm4_backlight>;
	pinctrl-1 = <&pinctrl_pwm4_dio>;
	status = "okay";
};

&ssi1 {
	status = "okay";
};

&ssi2 {
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
	status = "okay";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	status = "okay";
};

&uart5 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart5>;
	status = "okay";
};

&usbotg {
	vbus-supply = <&reg_usb_otg_vbus>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg>;
	disable-over-current;
	status = "okay";
};

&usbh1 {
	vbus-supply = <&reg_usb_h1_vbus>;
	status = "okay";
};

&usdhc3 {
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <&pinctrl_usdhc3>;
	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
	cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
	vmmc-supply = <&reg_3p3v>;
	no-1-8-v; /* firmware will remove if board revision supports */
	status = "okay";
};

&wdog1 {
	status = "disabled";
};

&wdog2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_wdog>;
	fsl,ext-reset-output;
	status = "okay";
};

&iomuxc {
	pinctrl_audmux: audmuxgrp {
		fsl,pins = <
			MX6QDL_PAD_SD2_DAT0__AUD4_RXD		0x130b0
			MX6QDL_PAD_SD2_DAT3__AUD4_TXC		0x130b0
			MX6QDL_PAD_SD2_DAT2__AUD4_TXD		0x110b0
			MX6QDL_PAD_SD2_DAT1__AUD4_TXFS		0x130b0
			MX6QDL_PAD_GPIO_0__CCM_CLKO1		0x130b0 /* AUD4_MCK */
		>;
	};

	pinctrl_enet: enetgrp {
		fsl,pins = <
			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030
			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030
			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030
			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030
			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030
			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030
			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030
			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030
			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030
			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030
			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030
			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030
			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
			MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8
		>;
	};

	pinctrl_ecspi2: escpi2grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK	0x100b1
			MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI	0x100b1
			MX6QDL_PAD_EIM_OE__ECSPI2_MISO	0x100b1
			MX6QDL_PAD_EIM_RW__GPIO2_IO26	0x100b1
		>;
	};

	pinctrl_flexcan1: flexcan1grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b0b1
			MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX	0x1b0b1
			MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x4001b0b0 /* CAN_STBY */
		>;
	};

	pinctrl_gpio_leds: gpioledsgrp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL0__GPIO4_IO06		0x1b0b0
			MX6QDL_PAD_KEY_ROW0__GPIO4_IO07		0x1b0b0
			MX6QDL_PAD_KEY_ROW4__GPIO4_IO15		0x1b0b0
		>;
	};

	pinctrl_gpmi_nand: gpminandgrp {
		fsl,pins = <
			MX6QDL_PAD_NANDF_CLE__NAND_CLE		0xb0b1
			MX6QDL_PAD_NANDF_ALE__NAND_ALE		0xb0b1
			MX6QDL_PAD_NANDF_WP_B__NAND_WP_B	0xb0b1
			MX6QDL_PAD_NANDF_RB0__NAND_READY_B	0xb000
			MX6QDL_PAD_NANDF_CS0__NAND_CE0_B	0xb0b1
			MX6QDL_PAD_SD4_CMD__NAND_RE_B		0xb0b1
			MX6QDL_PAD_SD4_CLK__NAND_WE_B		0xb0b1
			MX6QDL_PAD_NANDF_D0__NAND_DATA00	0xb0b1
			MX6QDL_PAD_NANDF_D1__NAND_DATA01	0xb0b1
			MX6QDL_PAD_NANDF_D2__NAND_DATA02	0xb0b1
			MX6QDL_PAD_NANDF_D3__NAND_DATA03	0xb0b1
			MX6QDL_PAD_NANDF_D4__NAND_DATA04	0xb0b1
			MX6QDL_PAD_NANDF_D5__NAND_DATA05	0xb0b1
			MX6QDL_PAD_NANDF_D6__NAND_DATA06	0xb0b1
			MX6QDL_PAD_NANDF_D7__NAND_DATA07	0xb0b1
		>;
	};

	pinctrl_i2c1: i2c1grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1
			MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1
		>;
	};

	pinctrl_i2c2: i2c2grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
			MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
		>;
	};

	pinctrl_i2c3: i2c3grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_3__I2C3_SCL		0x4001b8b1
			MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1
		>;
	};

	pinctrl_pcie: pciegrp {
		fsl,pins = <
			MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28	0x1b0b0 /* PCIE IRQ */
			MX6QDL_PAD_ENET_TXD1__GPIO1_IO29	0x1b0b0 /* PCIE RST */
		>;
	};

	pinctrl_pps: ppsgrp {
		fsl,pins = <
			MX6QDL_PAD_ENET_RXD1__GPIO1_IO26	0x1b0b1
		>;
	};

	pinctrl_pwm1: pwm1grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_9__PWM1_OUT		0x1b0b1
		>;
	};

	pinctrl_pwm2: pwm2grp {
		fsl,pins = <
			MX6QDL_PAD_SD1_DAT2__PWM2_OUT		0x1b0b1
		>;
	};

	pinctrl_pwm3: pwm3grp {
		fsl,pins = <
			MX6QDL_PAD_SD4_DAT1__PWM3_OUT		0x1b0b1
		>;
	};

	pinctrl_pwm4_backlight: pwm4grpbacklight {
		fsl,pins = <
			/* LVDS_PWM J6.5 */
			MX6QDL_PAD_SD1_CMD__PWM4_OUT		0x1b0b1
		>;
	};

	pinctrl_pwm4_dio: pwm4grpdio {
		fsl,pins = <
			/* DIO3 J16.4 */
			MX6QDL_PAD_SD4_DAT2__PWM4_OUT		0x1b0b1
		>;
	};

	pinctrl_uart1: uart1grp {
		fsl,pins = <
			MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA	0x1b0b1
			MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	0x1b0b1
			MX6QDL_PAD_SD3_DAT4__GPIO7_IO01		0x4001b0b1 /* TEN */
		>;
	};

	pinctrl_uart2: uart2grp {
		fsl,pins = <
			MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA	0x1b0b1
			MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA	0x1b0b1
		>;
	};

	pinctrl_uart5: uart5grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL1__UART5_TX_DATA	0x1b0b1
			MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA	0x1b0b1
		>;
	};

	pinctrl_usbotg: usbotggrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059
			MX6QDL_PAD_EIM_D22__GPIO3_IO22		0x1b0b0 /* PWR_EN */
		>;
	};

	pinctrl_usdhc3: usdhc3grp {
		fsl,pins = <
			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x17059 /* CD */
			MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	0x17059
		>;
	};

	pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
		fsl,pins = <
			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x170b9
			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x100b9
			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x170b9
			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x170b9
			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x170b9
			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x170b9
			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x170b9 /* CD */
			MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	0x170b9
		>;
	};

	pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
		fsl,pins = <
			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x170f9
			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x100f9
			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x170f9
			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x170f9
			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x170f9
			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x170f9
			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x170f9 /* CD */
			MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	0x170f9
		>;
	};

	pinctrl_wdog: wdoggrp {
		fsl,pins = <
			MX6QDL_PAD_SD1_DAT3__WDOG2_B		0x1b0b0
		>;
	};
};
Commit	Line	Data
e3946fe8 TH	1	/*
	2	* Copyright 2013 Gateworks Corporation
	3	*
	4	* The code contained herein is licensed under the GNU General Public
	5	* License. You may obtain a copy of the GNU General Public License
	6	* Version 2 or later at the following locations:
	7	*
	8	* http://www.opensource.org/licenses/gpl-license.html
	9	* http://www.gnu.org/copyleft/gpl.html
	10	*/
	11
326cdb16 TH	12	#include <dt-bindings/gpio/gpio.h>
326cdb16 TH	13
e3946fe8 TH	14	/ {
	15	/* these are used by bootloader for disabling nodes */
	16	aliases {
e3946fe8 TH	17	led0 = &led0;
	18	led1 = &led1;
	19	led2 = &led2;
	20	nand = &gpmi;
e3946fe8 TH	21	ssi0 = &ssi1;
	22	usb0 = &usbh1;
	23	usb1 = &usbotg;
e3946fe8 TH	24	};
	25
	26	chosen {
	27	bootargs = "console=ttymxc1,115200";
	28	};
	29
b3253241 TH	30	backlight {
	31	compatible = "pwm-backlight";
	32	pwms = <&pwm4 0 5000000>;
	33	brightness-levels = <0 4 8 16 32 64 128 255>;
	34	default-brightness-level = <7>;
	35	};
	36
e3946fe8 TH	37	leds {
e3946fe8 TH	38	compatible = "gpio-leds";
b5f37b76 TH	39	pinctrl-names = "default";
b5f37b76 TH	40	pinctrl-0 = <&pinctrl_gpio_leds>;
e3946fe8 TH	41
	42	led0: user1 {
	43	label = "user1";
326cdb16	44	gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
e3946fe8 TH	45	default-state = "on";
	46	linux,default-trigger = "heartbeat";
	47	};
	48
	49	led1: user2 {
	50	label = "user2";
326cdb16	51	gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
e3946fe8 TH	52	default-state = "off";
	53	};
	54
	55	led2: user3 {
	56	label = "user3";
326cdb16	57	gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
e3946fe8 TH	58	default-state = "off";
	59	};
	60	};
	61
ad00e080	62	memory@10000000 {
404c0c93	63	device_type = "memory";
e3946fe8 TH	64	reg = <0x10000000 0x40000000>;
	65	};
	66
	67	pps {
	68	compatible = "pps-gpio";
b5f37b76 TH	69	pinctrl-names = "default";
b5f37b76 TH	70	pinctrl-0 = <&pinctrl_pps>;
326cdb16	71	gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
e3946fe8 TH	72	status = "okay";
	73	};
	74
	75	regulators {
	76	compatible = "simple-bus";
	77	#address-cells = <1>;
	78	#size-cells = <0>;
	79
	80	reg_1p0v: regulator@0 {
	81	compatible = "regulator-fixed";
	82	reg = <0>;
	83	regulator-name = "1P0V";
	84	regulator-min-microvolt = <1000000>;
	85	regulator-max-microvolt = <1000000>;
	86	regulator-always-on;
	87	};
	88
	89	reg_3p3v: regulator@1 {
	90	compatible = "regulator-fixed";
	91	reg = <1>;
	92	regulator-name = "3P3V";
	93	regulator-min-microvolt = <3300000>;
	94	regulator-max-microvolt = <3300000>;
	95	regulator-always-on;
	96	};
	97
	98	reg_usb_h1_vbus: regulator@2 {
	99	compatible = "regulator-fixed";
	100	reg = <2>;
	101	regulator-name = "usb_h1_vbus";
	102	regulator-min-microvolt = <5000000>;
	103	regulator-max-microvolt = <5000000>;
	104	regulator-always-on;
	105	};
	106
	107	reg_usb_otg_vbus: regulator@3 {
	108	compatible = "regulator-fixed";
	109	reg = <3>;
	110	regulator-name = "usb_otg_vbus";
	111	regulator-min-microvolt = <5000000>;
	112	regulator-max-microvolt = <5000000>;
326cdb16	113	gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
e3946fe8 TH	114	enable-active-high;
	115	};
	116	};
	117
	118	sound {
b12d1e94	119	compatible = "fsl,imx6q-ventana-sgtl5000",
e3946fe8	120	"fsl,imx-audio-sgtl5000";
b12d1e94	121	model = "sgtl5000-audio";
e3946fe8 TH	122	ssi-controller = <&ssi1>;
	123	audio-codec = <&codec>;
	124	audio-routing =
	125	"MIC_IN", "Mic Jack",
	126	"Mic Jack", "Mic Bias",
	127	"Headphone Jack", "HP_OUT";
	128	mux-int-port = <1>;
	129	mux-ext-port = <4>;
	130	};
	131	};
	132
	133	&audmux {
	134	pinctrl-names = "default";
	135	pinctrl-0 = <&pinctrl_audmux>; /* AUD4<->sgtl5000 */
	136	status = "okay";
	137	};
	138
	139	&can1 {
	140	pinctrl-names = "default";
	141	pinctrl-0 = <&pinctrl_flexcan1>;
	142	status = "okay";
	143	};
	144
e726a9fd TH	145	&clks {
e726a9fd TH	146	assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
bf5393c5	147	<&clks IMX6QDL_CLK_LDB_DI1_SEL>;
e726a9fd	148	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
bf5393c5	149	<&clks IMX6QDL_CLK_PLL3_USB_OTG>;
e726a9fd TH	150	};
e726a9fd TH	151
b0a5c46d	152	&ecspi2 {
b0a5c46d TH	153	cs-gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
	154	pinctrl-names = "default";
	155	pinctrl-0 = <&pinctrl_ecspi2>;
	156	status = "okay";
	157	};
	158
e3946fe8 TH	159	&fec {
	160	pinctrl-names = "default";
	161	pinctrl-0 = <&pinctrl_enet>;
3a35e470	162	phy-mode = "rgmii-id";
326cdb16	163	phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
e3946fe8 TH	164	status = "okay";
	165	};
	166
	167	&gpmi {
	168	pinctrl-names = "default";
	169	pinctrl-0 = <&pinctrl_gpmi_nand>;
	170	status = "okay";
	171	};
	172
aef15dba TH	173	&hdmi {
	174	ddc-i2c-bus = <&i2c3>;
	175	status = "okay";
	176	};
	177
e3946fe8 TH	178	&i2c1 {
	179	clock-frequency = <100000>;
	180	pinctrl-names = "default";
	181	pinctrl-0 = <&pinctrl_i2c1>;
	182	status = "okay";
	183
	184	eeprom1: eeprom@50 {
	185	compatible = "atmel,24c02";
	186	reg = <0x50>;
	187	pagesize = <16>;
	188	};
	189
	190	eeprom2: eeprom@51 {
	191	compatible = "atmel,24c02";
	192	reg = <0x51>;
	193	pagesize = <16>;
	194	};
	195
	196	eeprom3: eeprom@52 {
	197	compatible = "atmel,24c02";
	198	reg = <0x52>;
	199	pagesize = <16>;
	200	};
	201
	202	eeprom4: eeprom@53 {
	203	compatible = "atmel,24c02";
	204	reg = <0x53>;
	205	pagesize = <16>;
	206	};
	207
	208	gpio: pca9555@23 {
	209	compatible = "nxp,pca9555";
	210	reg = <0x23>;
	211	gpio-controller;
	212	#gpio-cells = <2>;
	213	};
	214
e3946fe8 TH	215	rtc: ds1672@68 {
	216	compatible = "dallas,ds1672";
	217	reg = <0x68>;
	218	};
	219	};
	220
	221	&i2c2 {
	222	clock-frequency = <100000>;
	223	pinctrl-names = "default";
	224	pinctrl-0 = <&pinctrl_i2c2>;
	225	status = "okay";
	226
8dccafaa	227	pmic: pfuze100@8 {
e3946fe8 TH	228	compatible = "fsl,pfuze100";
	229	reg = <0x08>;
	230
	231	regulators {
	232	sw1a_reg: sw1ab {
	233	regulator-min-microvolt = <300000>;
	234	regulator-max-microvolt = <1875000>;
	235	regulator-boot-on;
	236	regulator-always-on;
	237	regulator-ramp-delay = <6250>;
	238	};
	239
	240	sw1c_reg: sw1c {
	241	regulator-min-microvolt = <300000>;
	242	regulator-max-microvolt = <1875000>;
	243	regulator-boot-on;
	244	regulator-always-on;
	245	regulator-ramp-delay = <6250>;
	246	};
	247
	248	sw2_reg: sw2 {
	249	regulator-min-microvolt = <800000>;
	250	regulator-max-microvolt = <3950000>;
	251	regulator-boot-on;
	252	regulator-always-on;
	253	};
	254
	255	sw3a_reg: sw3a {
	256	regulator-min-microvolt = <400000>;
	257	regulator-max-microvolt = <1975000>;
	258	regulator-boot-on;
	259	regulator-always-on;
	260	};
	261
	262	sw3b_reg: sw3b {
	263	regulator-min-microvolt = <400000>;
	264	regulator-max-microvolt = <1975000>;
	265	regulator-boot-on;
	266	regulator-always-on;
	267	};
	268
	269	sw4_reg: sw4 {
	270	regulator-min-microvolt = <800000>;
	271	regulator-max-microvolt = <3300000>;
	272	};
	273
	274	swbst_reg: swbst {
	275	regulator-min-microvolt = <5000000>;
	276	regulator-max-microvolt = <5150000>;
70b6b438 TH	277	regulator-boot-on;
70b6b438 TH	278	regulator-always-on;
e3946fe8 TH	279	};
	280
	281	snvs_reg: vsnvs {
	282	regulator-min-microvolt = <1000000>;
	283	regulator-max-microvolt = <3000000>;
	284	regulator-boot-on;
	285	regulator-always-on;
	286	};
	287
	288	vref_reg: vrefddr {
	289	regulator-boot-on;
	290	regulator-always-on;
	291	};
	292
	293	vgen1_reg: vgen1 {
	294	regulator-min-microvolt = <800000>;
	295	regulator-max-microvolt = <1550000>;
	296	};
	297
	298	vgen2_reg: vgen2 {
	299	regulator-min-microvolt = <800000>;
	300	regulator-max-microvolt = <1550000>;
	301	};
	302
	303	vgen3_reg: vgen3 {
	304	regulator-min-microvolt = <1800000>;
	305	regulator-max-microvolt = <3300000>;
	306	};
	307
	308	vgen4_reg: vgen4 {
	309	regulator-min-microvolt = <1800000>;
	310	regulator-max-microvolt = <3300000>;
	311	regulator-always-on;
	312	};
	313
	314	vgen5_reg: vgen5 {
	315	regulator-min-microvolt = <1800000>;
	316	regulator-max-microvolt = <3300000>;
	317	regulator-always-on;
	318	};
	319
	320	vgen6_reg: vgen6 {
	321	regulator-min-microvolt = <1800000>;
	322	regulator-max-microvolt = <3300000>;
	323	regulator-always-on;
	324	};
	325	};
	326	};
e3946fe8 TH	327	};
	328
	329	&i2c3 {
	330	clock-frequency = <100000>;
	331	pinctrl-names = "default";
	332	pinctrl-0 = <&pinctrl_i2c3>;
	333	status = "okay";
	334
8dccafaa	335	codec: sgtl5000@a {
e3946fe8 TH	336	compatible = "fsl,sgtl5000";
e3946fe8 TH	337	reg = <0x0a>;
b26a68c1	338	clocks = <&clks IMX6QDL_CLK_CKO>;
e3946fe8 TH	339	VDDA-supply = <&sw4_reg>;
	340	VDDIO-supply = <&reg_3p3v>;
	341	};
	342
8dccafaa	343	touchscreen: egalax_ts@4 {
e3946fe8 TH	344	compatible = "eeti,egalax_ts";
	345	reg = <0x04>;
	346	interrupt-parent = <&gpio7>;
326cdb16 TH	347	interrupts = <12 2>;
326cdb16 TH	348	wakeup-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
e3946fe8	349	};
e3946fe8 TH	350	};
e3946fe8 TH	351
b5f37b76 TH	352	&ldb {
b5f37b76 TH	353	status = "okay";
e3946fe8	354
a7668fda	355	lvds-channel@0 {
b5f37b76 TH	356	fsl,data-mapping = "spwg";
	357	fsl,data-width = <18>;
	358	status = "okay";
	359
	360	display-timings {
	361	native-mode = <&timing0>;
	362	timing0: hsd100pxn1 {
	363	clock-frequency = <65000000>;
	364	hactive = <1024>;
	365	vactive = <768>;
	366	hback-porch = <220>;
	367	hfront-porch = <40>;
	368	vback-porch = <21>;
	369	vfront-porch = <7>;
	370	hsync-len = <60>;
	371	vsync-len = <10>;
	372	};
e3946fe8	373	};
b5f37b76 TH	374	};
	375	};
	376
	377	&pcie {
	378	pinctrl-names = "default";
	379	pinctrl-0 = <&pinctrl_pcie>;
	380	reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
	381	status = "okay";
b5f37b76	382	};
e3946fe8	383
aa2b2178 TH	384	&pwm1 {
	385	pinctrl-names = "default";
	386	pinctrl-0 = <&pinctrl_pwm1>; /* MX6_DIO0 */
	387	status = "disabled";
	388	};
	389
	390	&pwm2 {
	391	pinctrl-names = "default";
	392	pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
	393	status = "disabled";
	394	};
	395
	396	&pwm3 {
	397	pinctrl-names = "default";
	398	pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
	399	status = "disabled";
	400	};
	401
b5f37b76	402	&pwm4 {
f8ea256e TH	403	pinctrl-names = "default", "state_dio";
	404	pinctrl-0 = <&pinctrl_pwm4_backlight>;
	405	pinctrl-1 = <&pinctrl_pwm4_dio>;
b5f37b76 TH	406	status = "okay";
	407	};
	408
	409	&ssi1 {
b5f37b76 TH	410	status = "okay";
	411	};
	412
	413	&ssi2 {
b5f37b76 TH	414	status = "okay";
	415	};
	416
	417	&uart1 {
	418	pinctrl-names = "default";
	419	pinctrl-0 = <&pinctrl_uart1>;
82515ff7	420	rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
b5f37b76 TH	421	status = "okay";
	422	};
	423
	424	&uart2 {
	425	pinctrl-names = "default";
	426	pinctrl-0 = <&pinctrl_uart2>;
	427	status = "okay";
	428	};
	429
	430	&uart5 {
	431	pinctrl-names = "default";
	432	pinctrl-0 = <&pinctrl_uart5>;
	433	status = "okay";
	434	};
	435
	436	&usbotg {
	437	vbus-supply = <&reg_usb_otg_vbus>;
	438	pinctrl-names = "default";
	439	pinctrl-0 = <&pinctrl_usbotg>;
	440	disable-over-current;
	441	status = "okay";
	442	};
	443
	444	&usbh1 {
	445	vbus-supply = <&reg_usb_h1_vbus>;
	446	status = "okay";
	447	};
	448
	449	&usdhc3 {
3ee12d80	450	pinctrl-names = "default", "state_100mhz", "state_200mhz";
b5f37b76	451	pinctrl-0 = <&pinctrl_usdhc3>;
3ee12d80 TH	452	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
3ee12d80 TH	453	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
89c1a8cf	454	cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
b5f37b76	455	vmmc-supply = <&reg_3p3v>;
3ee12d80	456	no-1-8-v; /* firmware will remove if board revision supports */
b5f37b76 TH	457	status = "okay";
	458	};
	459
51a012b7 TH	460	&wdog1 {
	461	status = "disabled";
	462	};
	463
	464	&wdog2 {
	465	pinctrl-names = "default";
	466	pinctrl-0 = <&pinctrl_wdog>;
	467	fsl,ext-reset-output;
	468	status = "okay";
	469	};
	470
b5f37b76	471	&iomuxc {
d31c46c0 TH	472	pinctrl_audmux: audmuxgrp {
	473	fsl,pins = <
	474	MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
	475	MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
	476	MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
	477	MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
	478	MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* AUD4_MCK */
	479	>;
	480	};
e3946fe8	481
d31c46c0 TH	482	pinctrl_enet: enetgrp {
	483	fsl,pins = <
	484	MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
	485	MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
	486	MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
	487	MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
	488	MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
	489	MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
	490	MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
	491	MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
	492	MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
	493	MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
	494	MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
	495	MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
	496	MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
	497	MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
	498	MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
	499	MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
	500	>;
	501	};
e3946fe8	502
d31c46c0 TH	503	pinctrl_ecspi2: escpi2grp {
	504	fsl,pins = <
	505	MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
	506	MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1
	507	MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1
	508	MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x100b1
	509	>;
	510	};
b0a5c46d	511
d31c46c0 TH	512	pinctrl_flexcan1: flexcan1grp {
	513	fsl,pins = <
	514	MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1
	515	MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1
	516	MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x4001b0b0 /* CAN_STBY */
	517	>;
	518	};
b5f37b76	519
d31c46c0 TH	520	pinctrl_gpio_leds: gpioledsgrp {
	521	fsl,pins = <
	522	MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
	523	MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
	524	MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
	525	>;
	526	};
e3946fe8	527
d31c46c0 TH	528	pinctrl_gpmi_nand: gpminandgrp {
	529	fsl,pins = <
	530	MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
	531	MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
	532	MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
	533	MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
	534	MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
	535	MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
	536	MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
	537	MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
	538	MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
	539	MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
	540	MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
	541	MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
	542	MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
	543	MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
	544	MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
	545	>;
	546	};
e3946fe8	547
d31c46c0 TH	548	pinctrl_i2c1: i2c1grp {
	549	fsl,pins = <
	550	MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
	551	MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
	552	>;
	553	};
e3946fe8	554
d31c46c0 TH	555	pinctrl_i2c2: i2c2grp {
	556	fsl,pins = <
	557	MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
	558	MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
	559	>;
	560	};
e3946fe8	561
d31c46c0 TH	562	pinctrl_i2c3: i2c3grp {
	563	fsl,pins = <
	564	MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
	565	MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
	566	>;
	567	};
e3946fe8	568
d31c46c0 TH	569	pinctrl_pcie: pciegrp {
	570	fsl,pins = <
	571	MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 /* PCIE IRQ */
	572	MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 /* PCIE RST */
	573	>;
	574	};
b5f37b76	575
d31c46c0 TH	576	pinctrl_pps: ppsgrp {
	577	fsl,pins = <
	578	MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
	579	>;
	580	};
b5f37b76	581
d31c46c0 TH	582	pinctrl_pwm1: pwm1grp {
	583	fsl,pins = <
	584	MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
	585	>;
	586	};
aa2b2178	587
d31c46c0 TH	588	pinctrl_pwm2: pwm2grp {
	589	fsl,pins = <
	590	MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
	591	>;
	592	};
aa2b2178	593
d31c46c0 TH	594	pinctrl_pwm3: pwm3grp {
	595	fsl,pins = <
	596	MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
	597	>;
	598	};
aa2b2178	599
d31c46c0 TH	600	pinctrl_pwm4_backlight: pwm4grpbacklight {
	601	fsl,pins = <
	602	/* LVDS_PWM J6.5 */
	603	MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
	604	>;
	605	};
b3253241	606
d31c46c0 TH	607	pinctrl_pwm4_dio: pwm4grpdio {
	608	fsl,pins = <
	609	/* DIO3 J16.4 */
	610	MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1
	611	>;
	612	};
f8ea256e	613
d31c46c0 TH	614	pinctrl_uart1: uart1grp {
	615	fsl,pins = <
	616	MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
	617	MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
	618	MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x4001b0b1 /* TEN */
	619	>;
	620	};
e3946fe8	621
d31c46c0 TH	622	pinctrl_uart2: uart2grp {
	623	fsl,pins = <
	624	MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
	625	MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
	626	>;
	627	};
e3946fe8	628
d31c46c0 TH	629	pinctrl_uart5: uart5grp {
	630	fsl,pins = <
	631	MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
	632	MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
	633	>;
	634	};
e3946fe8	635
d31c46c0 TH	636	pinctrl_usbotg: usbotggrp {
	637	fsl,pins = <
	638	MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
	639	MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* PWR_EN */
	640	>;
	641	};
e3946fe8	642
d31c46c0 TH	643	pinctrl_usdhc3: usdhc3grp {
	644	fsl,pins = <
	645	MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
	646	MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
	647	MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
	648	MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
	649	MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
	650	MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
	651	MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */
	652	MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059
	653	>;
	654	};
3ee12d80	655
d31c46c0 TH	656	pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
	657	fsl,pins = <
	658	MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
	659	MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9
	660	MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
	661	MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
	662	MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
	663	MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
	664	MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */
	665	MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9
	666	>;
	667	};
3ee12d80	668
d31c46c0 TH	669	pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
	670	fsl,pins = <
	671	MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
	672	MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
	673	MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
	674	MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
	675	MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
	676	MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
	677	MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */
	678	MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9
	679	>;
	680	};
51a012b7	681
d31c46c0 TH	682	pinctrl_wdog: wdoggrp {
	683	fsl,pins = <
	684	MX6QDL_PAD_SD1_DAT3__WDOG2_B 0x1b0b0
	685	>;
e3946fe8 TH	686	};
e3946fe8 TH	687	};