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e3946fe8 TH |
1 | /* |
2 | * Copyright 2013 Gateworks Corporation | |
3 | * | |
4 | * The code contained herein is licensed under the GNU General Public | |
5 | * License. You may obtain a copy of the GNU General Public License | |
6 | * Version 2 or later at the following locations: | |
7 | * | |
8 | * http://www.opensource.org/licenses/gpl-license.html | |
9 | * http://www.gnu.org/copyleft/gpl.html | |
10 | */ | |
11 | ||
12 | / { | |
13 | /* these are used by bootloader for disabling nodes */ | |
14 | aliases { | |
e3946fe8 TH |
15 | ethernet1 = ð1; |
16 | led0 = &led0; | |
17 | led1 = &led1; | |
18 | led2 = &led2; | |
19 | nand = &gpmi; | |
e3946fe8 TH |
20 | ssi0 = &ssi1; |
21 | usb0 = &usbh1; | |
22 | usb1 = &usbotg; | |
e3946fe8 TH |
23 | }; |
24 | ||
25 | chosen { | |
26 | bootargs = "console=ttymxc1,115200"; | |
27 | }; | |
28 | ||
b3253241 TH |
29 | backlight { |
30 | compatible = "pwm-backlight"; | |
31 | pwms = <&pwm4 0 5000000>; | |
32 | brightness-levels = <0 4 8 16 32 64 128 255>; | |
33 | default-brightness-level = <7>; | |
34 | }; | |
35 | ||
e3946fe8 TH |
36 | leds { |
37 | compatible = "gpio-leds"; | |
38 | ||
39 | led0: user1 { | |
40 | label = "user1"; | |
41 | gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */ | |
42 | default-state = "on"; | |
43 | linux,default-trigger = "heartbeat"; | |
44 | }; | |
45 | ||
46 | led1: user2 { | |
47 | label = "user2"; | |
48 | gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */ | |
49 | default-state = "off"; | |
50 | }; | |
51 | ||
52 | led2: user3 { | |
53 | label = "user3"; | |
54 | gpios = <&gpio4 15 1>; /* 111 -> MX6_LOCLED# */ | |
55 | default-state = "off"; | |
56 | }; | |
57 | }; | |
58 | ||
59 | memory { | |
60 | reg = <0x10000000 0x40000000>; | |
61 | }; | |
62 | ||
63 | pps { | |
64 | compatible = "pps-gpio"; | |
65 | gpios = <&gpio1 26 0>; | |
66 | status = "okay"; | |
67 | }; | |
68 | ||
69 | regulators { | |
70 | compatible = "simple-bus"; | |
71 | #address-cells = <1>; | |
72 | #size-cells = <0>; | |
73 | ||
74 | reg_1p0v: regulator@0 { | |
75 | compatible = "regulator-fixed"; | |
76 | reg = <0>; | |
77 | regulator-name = "1P0V"; | |
78 | regulator-min-microvolt = <1000000>; | |
79 | regulator-max-microvolt = <1000000>; | |
80 | regulator-always-on; | |
81 | }; | |
82 | ||
83 | reg_3p3v: regulator@1 { | |
84 | compatible = "regulator-fixed"; | |
85 | reg = <1>; | |
86 | regulator-name = "3P3V"; | |
87 | regulator-min-microvolt = <3300000>; | |
88 | regulator-max-microvolt = <3300000>; | |
89 | regulator-always-on; | |
90 | }; | |
91 | ||
92 | reg_usb_h1_vbus: regulator@2 { | |
93 | compatible = "regulator-fixed"; | |
94 | reg = <2>; | |
95 | regulator-name = "usb_h1_vbus"; | |
96 | regulator-min-microvolt = <5000000>; | |
97 | regulator-max-microvolt = <5000000>; | |
98 | regulator-always-on; | |
99 | }; | |
100 | ||
101 | reg_usb_otg_vbus: regulator@3 { | |
102 | compatible = "regulator-fixed"; | |
103 | reg = <3>; | |
104 | regulator-name = "usb_otg_vbus"; | |
105 | regulator-min-microvolt = <5000000>; | |
106 | regulator-max-microvolt = <5000000>; | |
107 | gpio = <&gpio3 22 0>; | |
108 | enable-active-high; | |
109 | }; | |
110 | }; | |
111 | ||
112 | sound { | |
b12d1e94 | 113 | compatible = "fsl,imx6q-ventana-sgtl5000", |
e3946fe8 | 114 | "fsl,imx-audio-sgtl5000"; |
b12d1e94 | 115 | model = "sgtl5000-audio"; |
e3946fe8 TH |
116 | ssi-controller = <&ssi1>; |
117 | audio-codec = <&codec>; | |
118 | audio-routing = | |
119 | "MIC_IN", "Mic Jack", | |
120 | "Mic Jack", "Mic Bias", | |
121 | "Headphone Jack", "HP_OUT"; | |
122 | mux-int-port = <1>; | |
123 | mux-ext-port = <4>; | |
124 | }; | |
125 | }; | |
126 | ||
127 | &audmux { | |
128 | pinctrl-names = "default"; | |
129 | pinctrl-0 = <&pinctrl_audmux>; /* AUD4<->sgtl5000 */ | |
130 | status = "okay"; | |
131 | }; | |
132 | ||
133 | &can1 { | |
134 | pinctrl-names = "default"; | |
135 | pinctrl-0 = <&pinctrl_flexcan1>; | |
136 | status = "okay"; | |
137 | }; | |
138 | ||
139 | &fec { | |
140 | pinctrl-names = "default"; | |
141 | pinctrl-0 = <&pinctrl_enet>; | |
142 | phy-mode = "rgmii"; | |
143 | phy-reset-gpios = <&gpio1 30 0>; | |
144 | status = "okay"; | |
145 | }; | |
146 | ||
147 | &gpmi { | |
148 | pinctrl-names = "default"; | |
149 | pinctrl-0 = <&pinctrl_gpmi_nand>; | |
150 | status = "okay"; | |
151 | }; | |
152 | ||
aef15dba TH |
153 | &hdmi { |
154 | ddc-i2c-bus = <&i2c3>; | |
155 | status = "okay"; | |
156 | }; | |
157 | ||
e3946fe8 TH |
158 | &i2c1 { |
159 | clock-frequency = <100000>; | |
160 | pinctrl-names = "default"; | |
161 | pinctrl-0 = <&pinctrl_i2c1>; | |
162 | status = "okay"; | |
163 | ||
164 | eeprom1: eeprom@50 { | |
165 | compatible = "atmel,24c02"; | |
166 | reg = <0x50>; | |
167 | pagesize = <16>; | |
168 | }; | |
169 | ||
170 | eeprom2: eeprom@51 { | |
171 | compatible = "atmel,24c02"; | |
172 | reg = <0x51>; | |
173 | pagesize = <16>; | |
174 | }; | |
175 | ||
176 | eeprom3: eeprom@52 { | |
177 | compatible = "atmel,24c02"; | |
178 | reg = <0x52>; | |
179 | pagesize = <16>; | |
180 | }; | |
181 | ||
182 | eeprom4: eeprom@53 { | |
183 | compatible = "atmel,24c02"; | |
184 | reg = <0x53>; | |
185 | pagesize = <16>; | |
186 | }; | |
187 | ||
188 | gpio: pca9555@23 { | |
189 | compatible = "nxp,pca9555"; | |
190 | reg = <0x23>; | |
191 | gpio-controller; | |
192 | #gpio-cells = <2>; | |
193 | }; | |
194 | ||
e3946fe8 TH |
195 | rtc: ds1672@68 { |
196 | compatible = "dallas,ds1672"; | |
197 | reg = <0x68>; | |
198 | }; | |
199 | }; | |
200 | ||
201 | &i2c2 { | |
202 | clock-frequency = <100000>; | |
203 | pinctrl-names = "default"; | |
204 | pinctrl-0 = <&pinctrl_i2c2>; | |
205 | status = "okay"; | |
206 | ||
207 | pmic: pfuze100@08 { | |
208 | compatible = "fsl,pfuze100"; | |
209 | reg = <0x08>; | |
210 | ||
211 | regulators { | |
212 | sw1a_reg: sw1ab { | |
213 | regulator-min-microvolt = <300000>; | |
214 | regulator-max-microvolt = <1875000>; | |
215 | regulator-boot-on; | |
216 | regulator-always-on; | |
217 | regulator-ramp-delay = <6250>; | |
218 | }; | |
219 | ||
220 | sw1c_reg: sw1c { | |
221 | regulator-min-microvolt = <300000>; | |
222 | regulator-max-microvolt = <1875000>; | |
223 | regulator-boot-on; | |
224 | regulator-always-on; | |
225 | regulator-ramp-delay = <6250>; | |
226 | }; | |
227 | ||
228 | sw2_reg: sw2 { | |
229 | regulator-min-microvolt = <800000>; | |
230 | regulator-max-microvolt = <3950000>; | |
231 | regulator-boot-on; | |
232 | regulator-always-on; | |
233 | }; | |
234 | ||
235 | sw3a_reg: sw3a { | |
236 | regulator-min-microvolt = <400000>; | |
237 | regulator-max-microvolt = <1975000>; | |
238 | regulator-boot-on; | |
239 | regulator-always-on; | |
240 | }; | |
241 | ||
242 | sw3b_reg: sw3b { | |
243 | regulator-min-microvolt = <400000>; | |
244 | regulator-max-microvolt = <1975000>; | |
245 | regulator-boot-on; | |
246 | regulator-always-on; | |
247 | }; | |
248 | ||
249 | sw4_reg: sw4 { | |
250 | regulator-min-microvolt = <800000>; | |
251 | regulator-max-microvolt = <3300000>; | |
252 | }; | |
253 | ||
254 | swbst_reg: swbst { | |
255 | regulator-min-microvolt = <5000000>; | |
256 | regulator-max-microvolt = <5150000>; | |
257 | }; | |
258 | ||
259 | snvs_reg: vsnvs { | |
260 | regulator-min-microvolt = <1000000>; | |
261 | regulator-max-microvolt = <3000000>; | |
262 | regulator-boot-on; | |
263 | regulator-always-on; | |
264 | }; | |
265 | ||
266 | vref_reg: vrefddr { | |
267 | regulator-boot-on; | |
268 | regulator-always-on; | |
269 | }; | |
270 | ||
271 | vgen1_reg: vgen1 { | |
272 | regulator-min-microvolt = <800000>; | |
273 | regulator-max-microvolt = <1550000>; | |
274 | }; | |
275 | ||
276 | vgen2_reg: vgen2 { | |
277 | regulator-min-microvolt = <800000>; | |
278 | regulator-max-microvolt = <1550000>; | |
279 | }; | |
280 | ||
281 | vgen3_reg: vgen3 { | |
282 | regulator-min-microvolt = <1800000>; | |
283 | regulator-max-microvolt = <3300000>; | |
284 | }; | |
285 | ||
286 | vgen4_reg: vgen4 { | |
287 | regulator-min-microvolt = <1800000>; | |
288 | regulator-max-microvolt = <3300000>; | |
289 | regulator-always-on; | |
290 | }; | |
291 | ||
292 | vgen5_reg: vgen5 { | |
293 | regulator-min-microvolt = <1800000>; | |
294 | regulator-max-microvolt = <3300000>; | |
295 | regulator-always-on; | |
296 | }; | |
297 | ||
298 | vgen6_reg: vgen6 { | |
299 | regulator-min-microvolt = <1800000>; | |
300 | regulator-max-microvolt = <3300000>; | |
301 | regulator-always-on; | |
302 | }; | |
303 | }; | |
304 | }; | |
e3946fe8 TH |
305 | }; |
306 | ||
307 | &i2c3 { | |
308 | clock-frequency = <100000>; | |
309 | pinctrl-names = "default"; | |
310 | pinctrl-0 = <&pinctrl_i2c3>; | |
311 | status = "okay"; | |
312 | ||
e3946fe8 TH |
313 | codec: sgtl5000@0a { |
314 | compatible = "fsl,sgtl5000"; | |
315 | reg = <0x0a>; | |
316 | clocks = <&clks 201>; | |
317 | VDDA-supply = <&sw4_reg>; | |
318 | VDDIO-supply = <®_3p3v>; | |
319 | }; | |
320 | ||
e3946fe8 TH |
321 | touchscreen: egalax_ts@04 { |
322 | compatible = "eeti,egalax_ts"; | |
323 | reg = <0x04>; | |
324 | interrupt-parent = <&gpio7>; | |
325 | interrupts = <12 2>; /* gpio7_12 active low */ | |
326 | wakeup-gpios = <&gpio7 12 0>; | |
327 | }; | |
e3946fe8 TH |
328 | }; |
329 | ||
330 | &iomuxc { | |
331 | pinctrl-names = "default"; | |
332 | pinctrl-0 = <&pinctrl_hog>; | |
333 | ||
334 | imx6qdl-gw54xx { | |
335 | pinctrl_hog: hoggrp { | |
336 | fsl,pins = < | |
337 | MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */ | |
338 | MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000 /* SPINOR_CS0# */ | |
339 | MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */ | |
340 | MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PCIE IRQ */ | |
341 | MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE RST */ | |
342 | MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000130b0 /* AUD4_MCK */ | |
343 | MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* CAN_STBY */ | |
344 | MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* TOUCH_IRQ# */ | |
345 | MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */ | |
346 | MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */ | |
347 | MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */ | |
348 | MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x80000000 /* USBHUB_RST# */ | |
349 | MX6QDL_PAD_SD1_DAT3__GPIO1_IO21 0x80000000 /* MIPI_DIO */ | |
350 | >; | |
351 | }; | |
352 | ||
353 | pinctrl_audmux: audmuxgrp { | |
354 | fsl,pins = < | |
355 | MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0 | |
356 | MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0 | |
357 | MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0 | |
358 | MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0 | |
359 | >; | |
360 | }; | |
361 | ||
362 | pinctrl_enet: enetgrp { | |
363 | fsl,pins = < | |
364 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 | |
365 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 | |
366 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 | |
367 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 | |
368 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 | |
369 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 | |
370 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 | |
371 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 | |
372 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 | |
373 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 | |
374 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 | |
375 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 | |
376 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 | |
377 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 | |
378 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 | |
379 | MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 | |
380 | >; | |
381 | }; | |
382 | ||
383 | pinctrl_flexcan1: flexcan1grp { | |
384 | fsl,pins = < | |
385 | MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x80000000 | |
386 | MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x80000000 | |
387 | >; | |
388 | }; | |
389 | ||
390 | pinctrl_gpmi_nand: gpminandgrp { | |
391 | fsl,pins = < | |
392 | MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 | |
393 | MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 | |
394 | MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 | |
395 | MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 | |
396 | MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 | |
397 | MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 | |
398 | MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 | |
399 | MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 | |
400 | MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 | |
401 | MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 | |
402 | MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 | |
403 | MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 | |
404 | MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 | |
405 | MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 | |
406 | MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 | |
407 | MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 | |
408 | >; | |
409 | }; | |
410 | ||
411 | pinctrl_i2c1: i2c1grp { | |
412 | fsl,pins = < | |
413 | MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 | |
414 | MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 | |
415 | >; | |
416 | }; | |
417 | ||
418 | pinctrl_i2c2: i2c2grp { | |
419 | fsl,pins = < | |
420 | MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 | |
421 | MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 | |
422 | >; | |
423 | }; | |
424 | ||
425 | pinctrl_i2c3: i2c3grp { | |
426 | fsl,pins = < | |
427 | MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 | |
428 | MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 | |
429 | >; | |
430 | }; | |
431 | ||
b3253241 TH |
432 | pinctrl_pwm4: pwm4grp { |
433 | fsl,pins = < | |
434 | MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 | |
435 | >; | |
436 | }; | |
437 | ||
e3946fe8 TH |
438 | pinctrl_uart1: uart1grp { |
439 | fsl,pins = < | |
440 | MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 | |
441 | MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 | |
442 | >; | |
443 | }; | |
444 | ||
445 | pinctrl_uart2: uart2grp { | |
446 | fsl,pins = < | |
447 | MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 | |
448 | MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 | |
449 | >; | |
450 | }; | |
451 | ||
452 | pinctrl_uart5: uart5grp { | |
453 | fsl,pins = < | |
454 | MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 | |
455 | MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 | |
456 | >; | |
457 | }; | |
458 | ||
459 | pinctrl_usbotg: usbotggrp { | |
460 | fsl,pins = < | |
461 | MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 | |
462 | >; | |
463 | }; | |
464 | ||
465 | pinctrl_usdhc3: usdhc3grp { | |
466 | fsl,pins = < | |
467 | MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 | |
468 | MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 | |
469 | MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 | |
470 | MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 | |
471 | MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 | |
472 | MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 | |
473 | >; | |
474 | }; | |
475 | }; | |
476 | }; | |
477 | ||
478 | &ldb { | |
479 | status = "okay"; | |
480 | ||
481 | lvds-channel@1 { | |
482 | fsl,data-mapping = "spwg"; | |
483 | fsl,data-width = <18>; | |
484 | status = "okay"; | |
485 | ||
486 | display-timings { | |
487 | native-mode = <&timing0>; | |
488 | timing0: hsd100pxn1 { | |
489 | clock-frequency = <65000000>; | |
490 | hactive = <1024>; | |
491 | vactive = <768>; | |
492 | hback-porch = <220>; | |
493 | hfront-porch = <40>; | |
494 | vback-porch = <21>; | |
495 | vfront-porch = <7>; | |
496 | hsync-len = <60>; | |
497 | vsync-len = <10>; | |
498 | }; | |
499 | }; | |
500 | }; | |
501 | }; | |
502 | ||
503 | &pcie { | |
504 | reset-gpio = <&gpio1 29 0>; | |
505 | status = "okay"; | |
506 | ||
507 | eth1: sky2@8 { /* MAC/PHY on bus 8 */ | |
508 | compatible = "marvell,sky2"; | |
509 | }; | |
510 | }; | |
511 | ||
b3253241 TH |
512 | &pwm4 { |
513 | pinctrl-names = "default"; | |
514 | pinctrl-0 = <&pinctrl_pwm4>; | |
515 | status = "okay"; | |
516 | }; | |
517 | ||
e3946fe8 | 518 | &ssi1 { |
e3946fe8 TH |
519 | status = "okay"; |
520 | }; | |
521 | ||
522 | &ssi2 { | |
e3946fe8 TH |
523 | status = "okay"; |
524 | }; | |
525 | ||
526 | &uart1 { | |
527 | pinctrl-names = "default"; | |
528 | pinctrl-0 = <&pinctrl_uart1>; | |
529 | status = "okay"; | |
530 | }; | |
531 | ||
532 | &uart2 { | |
533 | pinctrl-names = "default"; | |
534 | pinctrl-0 = <&pinctrl_uart2>; | |
535 | status = "okay"; | |
536 | }; | |
537 | ||
538 | &uart5 { | |
539 | pinctrl-names = "default"; | |
540 | pinctrl-0 = <&pinctrl_uart5>; | |
541 | status = "okay"; | |
542 | }; | |
543 | ||
544 | &usbotg { | |
545 | vbus-supply = <®_usb_otg_vbus>; | |
546 | pinctrl-names = "default"; | |
547 | pinctrl-0 = <&pinctrl_usbotg>; | |
548 | disable-over-current; | |
549 | status = "okay"; | |
550 | }; | |
551 | ||
552 | &usbh1 { | |
553 | vbus-supply = <®_usb_h1_vbus>; | |
554 | status = "okay"; | |
555 | }; | |
556 | ||
557 | &usdhc3 { | |
558 | pinctrl-names = "default"; | |
559 | pinctrl-0 = <&pinctrl_usdhc3>; | |
560 | cd-gpios = <&gpio7 0 0>; | |
561 | vmmc-supply = <®_3p3v>; | |
562 | status = "okay"; | |
563 | }; |