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1 | /* |
2 | * Copyright 2016 Gateworks Corporation | |
3 | * | |
4 | * This file is dual-licensed: you can use it either under the terms | |
5 | * of the GPL or the X11 license, at your option. Note that this dual | |
6 | * licensing only applies to this file, and not this project as a | |
7 | * whole. | |
8 | * | |
9 | * a) This file is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU General Public License as | |
11 | * published by the Free Software Foundation; either version 2 of | |
12 | * the License, or (at your option) any later version. | |
13 | * | |
14 | * This file is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public | |
20 | * License along with this file; if not, write to the Free | |
21 | * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, | |
22 | * MA 02110-1301 USA | |
23 | * | |
24 | * Or, alternatively, | |
25 | * | |
26 | * b) Permission is hereby granted, free of charge, to any person | |
27 | * obtaining a copy of this software and associated documentation | |
28 | * files (the "Software"), to deal in the Software without | |
29 | * restriction, including without limitation the rights to use, | |
30 | * copy, modify, merge, publish, distribute, sublicense, and/or | |
31 | * sell copies of the Software, and to permit persons to whom the | |
32 | * Software is furnished to do so, subject to the following | |
33 | * conditions: | |
34 | * | |
35 | * The above copyright notice and this permission notice shall be | |
36 | * included in all copies or substantial portions of the Software. | |
37 | * | |
38 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
39 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES | |
40 | * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
41 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT | |
42 | * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, | |
43 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
44 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
45 | * OTHER DEALINGS IN THE SOFTWARE. | |
46 | */ | |
47 | ||
48 | #include <dt-bindings/gpio/gpio.h> | |
49 | ||
50 | / { | |
51 | /* these are used by bootloader for disabling nodes */ | |
52 | aliases { | |
53 | led0 = &led0; | |
54 | led1 = &led1; | |
55 | nand = &gpmi; | |
56 | usb0 = &usbh1; | |
57 | usb1 = &usbotg; | |
58 | }; | |
59 | ||
60 | chosen { | |
61 | stdout-path = &uart2; | |
62 | }; | |
63 | ||
64 | leds { | |
65 | compatible = "gpio-leds"; | |
66 | pinctrl-names = "default"; | |
67 | pinctrl-0 = <&pinctrl_gpio_leds>; | |
68 | ||
69 | led0: user1 { | |
70 | label = "user1"; | |
71 | gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ | |
72 | default-state = "on"; | |
73 | linux,default-trigger = "heartbeat"; | |
74 | }; | |
75 | ||
76 | led1: user2 { | |
77 | label = "user2"; | |
78 | gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ | |
79 | default-state = "off"; | |
80 | }; | |
81 | }; | |
82 | ||
83 | memory { | |
84 | reg = <0x10000000 0x20000000>; | |
85 | }; | |
86 | ||
87 | pps { | |
88 | compatible = "pps-gpio"; | |
89 | pinctrl-names = "default"; | |
90 | pinctrl-0 = <&pinctrl_pps>; | |
91 | gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>; | |
92 | status = "okay"; | |
93 | }; | |
94 | ||
95 | reg_3p3v: regulator-3p3v { | |
96 | compatible = "regulator-fixed"; | |
97 | regulator-name = "3P0V"; | |
98 | regulator-min-microvolt = <3300000>; | |
99 | regulator-max-microvolt = <3300000>; | |
100 | regulator-always-on; | |
101 | }; | |
102 | ||
103 | reg_5p0v: regulator-5p0v { | |
104 | compatible = "regulator-fixed"; | |
105 | regulator-name = "5P0V"; | |
106 | regulator-min-microvolt = <5000000>; | |
107 | regulator-max-microvolt = <5000000>; | |
108 | regulator-always-on; | |
109 | }; | |
110 | ||
111 | reg_usb_otg_vbus: regulator-usb-otg-vbus { | |
112 | compatible = "regulator-fixed"; | |
113 | regulator-name = "usb_otg_vbus"; | |
114 | regulator-min-microvolt = <5000000>; | |
115 | regulator-max-microvolt = <5000000>; | |
116 | gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; | |
117 | enable-active-high; | |
118 | }; | |
119 | }; | |
120 | ||
121 | &gpmi { | |
122 | pinctrl-names = "default"; | |
123 | pinctrl-0 = <&pinctrl_gpmi_nand>; | |
124 | status = "okay"; | |
125 | }; | |
126 | ||
127 | &hdmi { | |
128 | pinctrl-names = "default"; | |
129 | pinctrl-0 = <&pinctrl_hdmi>; | |
130 | ddc-i2c-bus = <&i2c3>; | |
131 | status = "okay"; | |
132 | }; | |
133 | ||
134 | &i2c1 { | |
135 | clock-frequency = <100000>; | |
136 | pinctrl-names = "default"; | |
137 | pinctrl-0 = <&pinctrl_i2c1>; | |
138 | status = "okay"; | |
139 | ||
140 | gpio: pca9555@23 { | |
141 | compatible = "nxp,pca9555"; | |
142 | reg = <0x23>; | |
143 | gpio-controller; | |
144 | #gpio-cells = <2>; | |
145 | }; | |
146 | ||
147 | eeprom1: eeprom@50 { | |
148 | compatible = "atmel,24c02"; | |
149 | reg = <0x50>; | |
150 | pagesize = <16>; | |
151 | }; | |
152 | ||
153 | eeprom2: eeprom@51 { | |
154 | compatible = "atmel,24c02"; | |
155 | reg = <0x51>; | |
156 | pagesize = <16>; | |
157 | }; | |
158 | ||
159 | eeprom3: eeprom@52 { | |
160 | compatible = "atmel,24c02"; | |
161 | reg = <0x52>; | |
162 | pagesize = <16>; | |
163 | }; | |
164 | ||
165 | eeprom4: eeprom@53 { | |
166 | compatible = "atmel,24c02"; | |
167 | reg = <0x53>; | |
168 | pagesize = <16>; | |
169 | }; | |
170 | ||
171 | rtc: ds1672@68 { | |
172 | compatible = "dallas,ds1672"; | |
173 | reg = <0x68>; | |
174 | }; | |
175 | }; | |
176 | ||
177 | &i2c2 { | |
178 | clock-frequency = <100000>; | |
179 | pinctrl-names = "default"; | |
180 | pinctrl-0 = <&pinctrl_i2c2>; | |
181 | status = "okay"; | |
182 | }; | |
183 | ||
184 | &i2c3 { | |
185 | clock-frequency = <100000>; | |
186 | pinctrl-names = "default"; | |
187 | pinctrl-0 = <&pinctrl_i2c3>; | |
188 | status = "okay"; | |
189 | }; | |
190 | ||
191 | &pcie { | |
192 | pinctrl-names = "default"; | |
193 | pinctrl-0 = <&pinctrl_pcie>; | |
194 | reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>; | |
195 | status = "okay"; | |
196 | }; | |
197 | ||
198 | &pwm2 { | |
199 | pinctrl-names = "default"; | |
200 | pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */ | |
201 | status = "disabled"; | |
202 | }; | |
203 | ||
204 | &pwm3 { | |
205 | pinctrl-names = "default"; | |
206 | pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */ | |
207 | status = "disabled"; | |
208 | }; | |
209 | ||
210 | &pwm4 { | |
211 | pinctrl-names = "default"; | |
212 | pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */ | |
213 | status = "disabled"; | |
214 | }; | |
215 | ||
216 | &uart2 { | |
217 | pinctrl-names = "default"; | |
218 | pinctrl-0 = <&pinctrl_uart2>; | |
219 | status = "okay"; | |
220 | }; | |
221 | ||
222 | &uart3 { | |
223 | pinctrl-names = "default"; | |
224 | pinctrl-0 = <&pinctrl_uart3>; | |
225 | status = "okay"; | |
226 | }; | |
227 | ||
228 | &uart4 { | |
229 | pinctrl-names = "default"; | |
230 | pinctrl-0 = <&pinctrl_uart4>; | |
231 | status = "okay"; | |
232 | }; | |
233 | ||
234 | &uart5 { | |
235 | pinctrl-names = "default"; | |
236 | pinctrl-0 = <&pinctrl_uart5>; | |
237 | status = "okay"; | |
238 | }; | |
239 | ||
240 | &usbh1 { | |
241 | status = "okay"; | |
242 | }; | |
243 | ||
244 | &usbotg { | |
245 | vbus-supply = <®_usb_otg_vbus>; | |
246 | pinctrl-names = "default"; | |
247 | pinctrl-0 = <&pinctrl_usbotg>; | |
248 | disable-over-current; | |
249 | status = "okay"; | |
250 | }; | |
251 | ||
252 | &usdhc3 { | |
253 | pinctrl-names = "default", "state_100mhz", "state_200mhz"; | |
254 | pinctrl-0 = <&pinctrl_usdhc3>; | |
255 | pinctrl-1 = <&pinctrl_usdhc3_100mhz>; | |
256 | pinctrl-2 = <&pinctrl_usdhc3_200mhz>; | |
257 | cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; | |
258 | vmmc-supply = <®_3p3v>; | |
259 | status = "okay"; | |
260 | }; | |
261 | ||
262 | &wdog1 { | |
263 | pinctrl-names = "default"; | |
264 | pinctrl-0 = <&pinctrl_wdog>; | |
265 | fsl,ext-reset-output; | |
266 | }; | |
267 | ||
268 | &iomuxc { | |
269 | pinctrl_gpmi_nand: gpminandgrp { | |
270 | fsl,pins = < | |
271 | MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 | |
272 | MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 | |
273 | MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 | |
274 | MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 | |
275 | MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 | |
276 | MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 | |
277 | MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 | |
278 | MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 | |
279 | MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 | |
280 | MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 | |
281 | MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 | |
282 | MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 | |
283 | MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 | |
284 | MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 | |
285 | MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 | |
286 | >; | |
287 | }; | |
288 | ||
289 | pinctrl_hdmi: hdmigrp { | |
290 | fsl,pins = < | |
291 | MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE 0x1f8b0 | |
292 | >; | |
293 | }; | |
294 | ||
295 | pinctrl_i2c1: i2c1grp { | |
296 | fsl,pins = < | |
297 | MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 | |
298 | MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 | |
299 | >; | |
300 | }; | |
301 | ||
302 | pinctrl_i2c2: i2c2grp { | |
303 | fsl,pins = < | |
304 | MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 | |
305 | MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 | |
306 | >; | |
307 | }; | |
308 | ||
309 | pinctrl_i2c3: i2c3grp { | |
310 | fsl,pins = < | |
311 | MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 | |
312 | MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 | |
313 | >; | |
314 | }; | |
315 | ||
316 | pinctrl_gpio_leds: gpioledsgrp { | |
317 | fsl,pins = < | |
318 | MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0 | |
319 | MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0 | |
320 | >; | |
321 | }; | |
322 | ||
323 | pinctrl_pcie: pciegrp { | |
324 | fsl,pins = < | |
325 | MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 | |
326 | MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x4001b0b0 /* PCIESKT_WDIS# */ | |
327 | >; | |
328 | }; | |
329 | ||
330 | pinctrl_pps: ppsgrp { | |
331 | fsl,pins = < | |
332 | MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1 | |
333 | >; | |
334 | }; | |
335 | ||
336 | pinctrl_pwm2: pwm2grp { | |
337 | fsl,pins = < | |
338 | MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1 | |
339 | >; | |
340 | }; | |
341 | ||
342 | pinctrl_pwm3: pwm3grp { | |
343 | fsl,pins = < | |
344 | MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1 | |
345 | >; | |
346 | }; | |
347 | ||
348 | pinctrl_pwm4: pwm4grp { | |
349 | fsl,pins = < | |
350 | MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 | |
351 | >; | |
352 | }; | |
353 | ||
354 | pinctrl_uart2: uart2grp { | |
355 | fsl,pins = < | |
356 | MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 | |
357 | MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 | |
358 | >; | |
359 | }; | |
360 | ||
361 | pinctrl_uart3: uart3grp { | |
362 | fsl,pins = < | |
363 | MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 | |
364 | MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 | |
365 | >; | |
366 | }; | |
367 | ||
368 | pinctrl_uart4: uart4grp { | |
369 | fsl,pins = < | |
370 | MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 | |
371 | MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 | |
372 | >; | |
373 | }; | |
374 | ||
375 | pinctrl_uart5: uart5grp { | |
376 | fsl,pins = < | |
377 | MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 | |
378 | MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 | |
379 | >; | |
380 | }; | |
381 | ||
382 | pinctrl_usbotg: usbotggrp { | |
383 | fsl,pins = < | |
384 | MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 | |
385 | MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* OTG_PWR_EN */ | |
386 | >; | |
387 | }; | |
388 | ||
389 | pinctrl_usdhc3: usdhc3grp { | |
390 | fsl,pins = < | |
391 | MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 | |
392 | MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 | |
393 | MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 | |
394 | MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 | |
395 | MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 | |
396 | MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 | |
397 | MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */ | |
398 | MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059 | |
399 | >; | |
400 | }; | |
401 | ||
402 | pinctrl_usdhc3_100mhz: usdhc3grp100mhz { | |
403 | fsl,pins = < | |
404 | MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9 | |
405 | MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9 | |
406 | MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9 | |
407 | MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9 | |
408 | MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9 | |
409 | MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9 | |
410 | MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */ | |
411 | MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9 | |
412 | >; | |
413 | }; | |
414 | ||
415 | pinctrl_usdhc3_200mhz: usdhc3grp200mhz { | |
416 | fsl,pins = < | |
417 | MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9 | |
418 | MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9 | |
419 | MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9 | |
420 | MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9 | |
421 | MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9 | |
422 | MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9 | |
423 | MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */ | |
424 | MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9 | |
425 | >; | |
426 | }; | |
427 | ||
428 | pinctrl_wdog: wdoggrp { | |
429 | fsl,pins = < | |
430 | MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0 | |
431 | >; | |
432 | }; | |
433 | }; |