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Merge tag 'mvebu-fixes-4.17-2' of git://git.infradead.org/linux-mvebu into fixes
[mirror_ubuntu-eoan-kernel.git] / arch / arm / boot / dts / imx6qdl-nitrogen6x.dtsi
CommitLineData
a177f184
TK		 1/*
2 * Copyright 2013 Boundary Devices, Inc.
3 * Copyright 2011 Freescale Semiconductor, Inc.
4 * Copyright 2011 Linaro Ltd.
5 *
a0689609
GB		 6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
a177f184 10 *
a0689609
GB		 11 * a) This file is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * version 2 as published by the Free Software Foundation.
14 *
13283626 15 * This file is distributed in the hope that it will be useful,
a0689609
GB		 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
13283626 20 * Or, alternatively,
a0689609
GB		 21 *
22 * b) Permission is hereby granted, free of charge, to any person
23 * obtaining a copy of this software and associated documentation
24 * files (the "Software"), to deal in the Software without
13283626 25 * restriction, including without limitation the rights to use,
a0689609
GB		 26 * copy, modify, merge, publish, distribute, sublicense, and/or
27 * sell copies of the Software, and to permit persons to whom the
28 * Software is furnished to do so, subject to the following
29 * conditions:
30 *
31 * The above copyright notice and this permission notice shall be
32 * included in all copies or substantial portions of the Software.
33 *
13283626 34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
a0689609
GB		 35 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
36 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
37 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
13283626 38 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
a0689609
GB		 39 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
40 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
41 * OTHER DEALINGS IN THE SOFTWARE.
a177f184 42 */
da474d4c
TK		 43#include <dt-bindings/gpio/gpio.h>
44#include <dt-bindings/input/input.h>
a177f184
TK		 45
46/ {
48f51963
SH		 47 chosen {
48 stdout-path = &uart2;
49 };
50
ad00e080 51 memory@10000000 {
a177f184
TK		 52 reg = <0x10000000 0x40000000>;
53 };
54
55 regulators {
56 compatible = "simple-bus";
57 #address-cells = <1>;
58 #size-cells = <0>;
59
60 reg_2p5v: regulator@0 {
61 compatible = "regulator-fixed";
62 reg = <0>;
63 regulator-name = "2P5V";
64 regulator-min-microvolt = <2500000>;
65 regulator-max-microvolt = <2500000>;
66 regulator-always-on;
67 };
68
69 reg_3p3v: regulator@1 {
70 compatible = "regulator-fixed";
71 reg = <1>;
72 regulator-name = "3P3V";
73 regulator-min-microvolt = <3300000>;
74 regulator-max-microvolt = <3300000>;
75 regulator-always-on;
76 };
77
78 reg_usb_otg_vbus: regulator@2 {
79 compatible = "regulator-fixed";
80 reg = <2>;
81 regulator-name = "usb_otg_vbus";
82 regulator-min-microvolt = <5000000>;
83 regulator-max-microvolt = <5000000>;
84 gpio = <&gpio3 22 0>;
85 enable-active-high;
86 };
3e223394
PS		 87
88 reg_can_xcvr: regulator@3 {
89 compatible = "regulator-fixed";
90 reg = <3>;
91 regulator-name = "CAN XCVR";
92 regulator-min-microvolt = <3300000>;
93 regulator-max-microvolt = <3300000>;
94 pinctrl-names = "default";
95 pinctrl-0 = <&pinctrl_can_xcvr>;
96 gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;
97 };
f12fb7a2
GB		 98
99 reg_wlan_vmmc: regulator@4 {
100 compatible = "regulator-fixed";
101 reg = <4>;
102 pinctrl-names = "default";
103 pinctrl-0 = <&pinctrl_wlan_vmmc>;
104 regulator-name = "reg_wlan_vmmc";
105 regulator-min-microvolt = <3300000>;
106 regulator-max-microvolt = <3300000>;
107 gpio = <&gpio6 15 GPIO_ACTIVE_HIGH>;
108 startup-delay-us = <70000>;
109 enable-active-high;
110 };
4c1bad09
GB		 111
112 reg_usb_h1_vbus: regulator@5 {
113 compatible = "regulator-fixed";
114 reg = <5>;
115 pinctrl-names = "default";
116 pinctrl-0 = <&pinctrl_usbh1>;
117 regulator-name = "usb_h1_vbus";
118 regulator-min-microvolt = <3300000>;
119 regulator-max-microvolt = <3300000>;
120 gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
121 enable-active-high;
122 };
a177f184
TK		 123 };
124
da474d4c
TK		 125 gpio-keys {
126 compatible = "gpio-keys";
127 pinctrl-names = "default";
128 pinctrl-0 = <&pinctrl_gpio_keys>;
129
130 power {
131 label = "Power Button";
132 gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
133 linux,code = <KEY_POWER>;
26cefdd1 134 wakeup-source;
da474d4c
TK		 135 };
136
137 menu {
138 label = "Menu";
139 gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
140 linux,code = <KEY_MENU>;
141 };
142
143 home {
144 label = "Home";
145 gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
146 linux,code = <KEY_HOME>;
147 };
148
149 back {
150 label = "Back";
151 gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
152 linux,code = <KEY_BACK>;
153 };
154
155 volume-up {
156 label = "Volume Up";
157 gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
158 linux,code = <KEY_VOLUMEUP>;
159 };
160
161 volume-down {
162 label = "Volume Down";
163 gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
164 linux,code = <KEY_VOLUMEDOWN>;
165 };
166 };
167
a177f184
TK		 168 sound {
169 compatible = "fsl,imx6q-nitrogen6x-sgtl5000",
170 "fsl,imx-audio-sgtl5000";
171 model = "imx6q-nitrogen6x-sgtl5000";
172 ssi-controller = <&ssi1>;
173 audio-codec = <&codec>;
174 audio-routing =
175 "MIC_IN", "Mic Jack",
176 "Mic Jack", "Mic Bias",
177 "Headphone Jack", "HP_OUT";
178 mux-int-port = <1>;
179 mux-ext-port = <3>;
180 };
181
986fb9e4 182 backlight_lcd: backlight-lcd {
a177f184
TK		 183 compatible = "pwm-backlight";
184 pwms = <&pwm1 0 5000000>;
185 brightness-levels = <0 4 8 16 32 64 128 255>;
186 default-brightness-level = <7>;
187 power-supply = <&reg_3p3v>;
188 status = "okay";
189 };
190
986fb9e4 191 backlight_lvds: backlight-lvds {
a177f184
TK		 192 compatible = "pwm-backlight";
193 pwms = <&pwm4 0 5000000>;
194 brightness-levels = <0 4 8 16 32 64 128 255>;
195 default-brightness-level = <7>;
196 power-supply = <&reg_3p3v>;
197 status = "okay";
198 };
5d5c8651 199
792d4edd 200 lcd_display: disp0 {
9c3d8fa0
GB		 201 compatible = "fsl,imx-parallel-display";
202 #address-cells = <1>;
203 #size-cells = <0>;
204 interface-pix-fmt = "bgr666";
205 pinctrl-names = "default";
206 pinctrl-0 = <&pinctrl_j15>;
207 status = "okay";
208
209 port@0 {
210 reg = <0>;
211
212 lcd_display_in: endpoint {
213 remote-endpoint = <&ipu1_di0_disp0>;
214 };
215 };
216
217 port@1 {
218 reg = <1>;
219
220 lcd_display_out: endpoint {
221 remote-endpoint = <&lcd_panel_in>;
222 };
223 };
224 };
225
986fb9e4 226 panel-lcd {
9c3d8fa0
GB		 227 compatible = "okaya,rs800480t-7x0gp";
228 backlight = <&backlight_lcd>;
229
230 port {
231 lcd_panel_in: endpoint {
232 remote-endpoint = <&lcd_display_out>;
233 };
234 };
235 };
236
986fb9e4 237 panel-lvds0 {
5d5c8651
EN		 238 compatible = "hannstar,hsd100pxn1";
239 backlight = <&backlight_lvds>;
240
241 port {
242 panel_in: endpoint {
243 remote-endpoint = <&lvds0_out>;
244 };
245 };
246 };
a177f184
TK		 247};
248
249&audmux {
250 pinctrl-names = "default";
251 pinctrl-0 = <&pinctrl_audmux>;
252 status = "okay";
253};
254
3e223394
PS		 255&can1 {
256 pinctrl-names = "default";
257 pinctrl-0 = <&pinctrl_can1>;
258 xceiver-supply = <&reg_can_xcvr>;
259 status = "okay";
260};
261
7804fbcf
FE		 262&clks {
263 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
264 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
265 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
266 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
267};
268
a177f184 269&ecspi1 {
a177f184
TK		 270 cs-gpios = <&gpio3 19 0>;
271 pinctrl-names = "default";
272 pinctrl-0 = <&pinctrl_ecspi1>;
273 status = "okay";
274
275 flash: m25p80@0 {
79826ac6 276 compatible = "sst,sst25vf016b", "jedec,spi-nor";
a177f184
TK		 277 spi-max-frequency = <20000000>;
278 reg = <0>;
44eac6ef
OS		 279 #address-cells = <1>;
280 #size-cells = <1>;
281
282 partition@0 {
283 label = "bootloader";
284 reg = <0x0 0xc0000>;
285 };
286
287 partition@c0000 {
288 label = "env";
289 reg = <0xc0000 0x2000>;
290 };
291
292 partition@c2000 {
293 label = "splash";
294 reg = <0xc2000 0x13e000>;
295 };
a177f184
TK		 296 };
297};
298
299&fec {
300 pinctrl-names = "default";
301 pinctrl-0 = <&pinctrl_enet>;
302 phy-mode = "rgmii";
12de44f5 303 phy-reset-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
a177f184
TK		 304 txen-skew-ps = <0>;
305 txc-skew-ps = <3000>;
306 rxdv-skew-ps = <0>;
307 rxc-skew-ps = <3000>;
308 rxd0-skew-ps = <0>;
309 rxd1-skew-ps = <0>;
310 rxd2-skew-ps = <0>;
311 rxd3-skew-ps = <0>;
312 txd0-skew-ps = <0>;
313 txd1-skew-ps = <0>;
314 txd2-skew-ps = <0>;
315 txd3-skew-ps = <0>;
6261c4c8
TK		 316 interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
317 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
a28eeb43 318 fsl,err006687-workaround-present;
a177f184
TK		 319 status = "okay";
320};
321
d653620e
MO		 322&hdmi {
323 ddc-i2c-bus = <&i2c2>;
324 status = "okay";
325};
326
a177f184
TK		 327&i2c1 {
328 clock-frequency = <100000>;
329 pinctrl-names = "default";
330 pinctrl-0 = <&pinctrl_i2c1>;
331 status = "okay";
332
8dccafaa 333 codec: sgtl5000@a {
a177f184
TK		 334 compatible = "fsl,sgtl5000";
335 reg = <0x0a>;
b26a68c1 336 clocks = <&clks IMX6QDL_CLK_CKO>;
a177f184
TK		 337 VDDA-supply = <&reg_2p5v>;
338 VDDIO-supply = <&reg_3p3v>;
339 };
7881fb3f
PZ		 340
341 rtc: rtc@6f {
342 compatible = "isil,isl1208";
343 reg = <0x6f>;
344 };
a177f184
TK		 345};
346
43c3c006
MO		 347&i2c2 {
348 clock-frequency = <100000>;
349 pinctrl-names = "default";
350 pinctrl-0 = <&pinctrl_i2c2>;
351 status = "okay";
352};
353
1dffdd68
PZ		 354&i2c3 {
355 clock-frequency = <100000>;
356 pinctrl-names = "default";
357 pinctrl-0 = <&pinctrl_i2c3>;
358 status = "okay";
140fa36f 359
8dccafaa 360 touchscreen@4 {
140fa36f
GB		 361 compatible = "eeti,egalax_ts";
362 reg = <0x04>;
363 interrupt-parent = <&gpio1>;
364 interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
365 wakeup-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
366 };
367
368 touchscreen@38 {
369 compatible = "edt,edt-ft5x06";
370 reg = <0x38>;
371 interrupt-parent = <&gpio1>;
372 interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
373 };
1dffdd68
PZ		 374};
375
a177f184
TK		 376&iomuxc {
377 pinctrl-names = "default";
378 pinctrl-0 = <&pinctrl_hog>;
379
380 imx6q-nitrogen6x {
381 pinctrl_hog: hoggrp {
382 fsl,pins = <
383 /* SGTL5000 sys_mclk */
384 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x030b0
140fa36f 385 MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0
a177f184
TK		 386 >;
387 };
388
389 pinctrl_audmux: audmuxgrp {
390 fsl,pins = <
391 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
392 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
393 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
394 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
395 >;
396 };
397
3e223394
PS		 398 pinctrl_can1: can1grp {
399 fsl,pins = <
400 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b0
401 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b0
402 >;
403 };
404
405 pinctrl_can_xcvr: can-xcvrgrp {
406 fsl,pins = <
407 /* Flexcan XCVR enable */
408 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
409 >;
410 };
411
a177f184
TK		 412 pinctrl_ecspi1: ecspi1grp {
413 fsl,pins = <
414 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
415 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
416 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
417 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1 /* CS */
418 >;
419 };
420
421 pinctrl_enet: enetgrp {
422 fsl,pins = <
423 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
424 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
c007b3a6
UKK		 425 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030
426 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030
427 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030
428 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030
429 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030
430 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030
a177f184 431 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
c007b3a6
UKK		 432 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
433 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
434 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
435 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
436 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
437 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
a177f184
TK		 438 /* Phy reset */
439 MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x000b0
6261c4c8 440 MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
a177f184
TK		 441 >;
442 };
443
986fb9e4 444 pinctrl_gpio_keys: gpio-keysgrp {
da474d4c
TK		 445 fsl,pins = <
446 /* Power Button */
447 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
448 /* Menu Button */
449 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
450 /* Home Button */
451 MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0
452 /* Back Button */
453 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
454 /* Volume Up Button */
455 MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0
456 /* Volume Down Button */
457 MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
458 >;
459 };
460
a177f184
TK		 461 pinctrl_i2c1: i2c1grp {
462 fsl,pins = <
463 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
464 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
465 >;
466 };
467
43c3c006
MO		 468 pinctrl_i2c2: i2c2grp {
469 fsl,pins = <
470 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
471 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
472 >;
473 };
474
1dffdd68
PZ		 475 pinctrl_i2c3: i2c3grp {
476 fsl,pins = <
477 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
478 MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1
479 >;
480 };
481
9c3d8fa0
GB		 482 pinctrl_j15: j15grp {
483 fsl,pins = <
484 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
485 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
486 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
487 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
488 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
489 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
490 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
491 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
492 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
493 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
494 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
495 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
496 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
497 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
498 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
499 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
500 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
501 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
502 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
503 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
504 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
505 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
506 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
507 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
508 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
509 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
510 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
511 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
512 >;
513 };
514
a177f184
TK		 515 pinctrl_pwm1: pwm1grp {
516 fsl,pins = <
517 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
518 >;
519 };
520
521 pinctrl_pwm3: pwm3grp {
522 fsl,pins = <
523 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
524 >;
525 };
526
527 pinctrl_pwm4: pwm4grp {
528 fsl,pins = <
529 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
530 >;
531 };
532
533 pinctrl_uart1: uart1grp {
534 fsl,pins = <
535 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
536 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
537 >;
538 };
539
540 pinctrl_uart2: uart2grp {
541 fsl,pins = <
542 MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
543 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
544 >;
545 };
546
4c1bad09
GB		 547 pinctrl_usbh1: usbh1grp {
548 fsl,pins = <
549 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x030b0
550 >;
551 };
552
a177f184
TK		 553 pinctrl_usbotg: usbotggrp {
554 fsl,pins = <
555 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
556 MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
557 /* power enable, high active */
558 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0
559 >;
560 };
561
f12fb7a2
GB		 562 pinctrl_usdhc2: usdhc2grp {
563 fsl,pins = <
564 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17071
565 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10071
566 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17071
567 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17071
568 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17071
569 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17071
f12fb7a2
GB		 570 >;
571 };
572
a177f184
TK		 573 pinctrl_usdhc3: usdhc3grp {
574 fsl,pins = <
575 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
576 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
577 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
578 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
579 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
580 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
581 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* CD */
582 >;
583 };
584
585 pinctrl_usdhc4: usdhc4grp {
586 fsl,pins = <
587 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
588 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
589 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
590 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
591 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
592 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
593 MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 /* CD */
594 >;
595 };
f12fb7a2 596
986fb9e4 597 pinctrl_wlan_vmmc: wlan-vmmcgrp {
f12fb7a2
GB		 598 fsl,pins = <
599 MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x100b0
600 MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x000b0
601 MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x000b0
602 MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT 0x000b0
603 >;
604 };
a177f184
TK		 605 };
606};
607
9c3d8fa0
GB		 608&ipu1_di0_disp0 {
609 remote-endpoint = <&lcd_display_in>;
610};
611
a177f184
TK		 612&ldb {
613 status = "okay";
614
615 lvds-channel@0 {
a177f184
TK		 616 status = "okay";
617
5d5c8651
EN		 618 port@4 {
619 reg = <4>;
620
621 lvds0_out: endpoint {
622 remote-endpoint = <&panel_in>;
a177f184
TK		 623 };
624 };
625 };
626};
627
628&pcie {
629 status = "okay";
630};
631
632&pwm1 {
633 pinctrl-names = "default";
634 pinctrl-0 = <&pinctrl_pwm1>;
635 status = "okay";
636};
637
638&pwm3 {
639 pinctrl-names = "default";
640 pinctrl-0 = <&pinctrl_pwm3>;
641 status = "okay";
642};
643
644&pwm4 {
645 pinctrl-names = "default";
646 pinctrl-0 = <&pinctrl_pwm4>;
647 status = "okay";
648};
649
650&ssi1 {
a177f184
TK		 651 status = "okay";
652};
653
654&uart1 {
655 pinctrl-names = "default";
656 pinctrl-0 = <&pinctrl_uart1>;
657 status = "okay";
658};
659
660&uart2 {
661 pinctrl-names = "default";
662 pinctrl-0 = <&pinctrl_uart2>;
663 status = "okay";
664};
665
666&usbh1 {
4c1bad09 667 vbus-supply = <&reg_usb_h1_vbus>;
a177f184
TK		 668 status = "okay";
669};
670
671&usbotg {
672 vbus-supply = <&reg_usb_otg_vbus>;
673 pinctrl-names = "default";
674 pinctrl-0 = <&pinctrl_usbotg>;
675 disable-over-current;
676 status = "okay";
677};
678
f12fb7a2
GB		 679&usdhc2 {
680 pinctrl-names = "default";
681 pinctrl-0 = <&pinctrl_usdhc2>;
682 bus-width = <4>;
683 non-removable;
684 vmmc-supply = <&reg_wlan_vmmc>;
685 cap-power-off-card;
686 keep-power-in-suspend;
687 status = "okay";
688
689 #address-cells = <1>;
690 #size-cells = <0>;
691 wlcore: wlcore@2 {
692 compatible = "ti,wl1271";
693 reg = <2>;
694 interrupt-parent = <&gpio6>;
695 interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
696 ref-clock-frequency = <38400000>;
697 };
698};
699
a177f184
TK		 700&usdhc3 {
701 pinctrl-names = "default";
702 pinctrl-0 = <&pinctrl_usdhc3>;
89c1a8cf 703 cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
a177f184
TK		 704 vmmc-supply = <&reg_3p3v>;
705 status = "okay";
706};
707
708&usdhc4 {
709 pinctrl-names = "default";
710 pinctrl-0 = <&pinctrl_usdhc4>;
89c1a8cf 711 cd-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
a177f184
TK		 712 vmmc-supply = <&reg_3p3v>;
713 status = "okay";
714};
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