]>
Commit | Line | Data |
---|---|---|
a177f184 TK |
1 | /* |
2 | * Copyright 2013 Boundary Devices, Inc. | |
3 | * Copyright 2011 Freescale Semiconductor, Inc. | |
4 | * Copyright 2011 Linaro Ltd. | |
5 | * | |
a0689609 GB |
6 | * This file is dual-licensed: you can use it either under the terms |
7 | * of the GPL or the X11 license, at your option. Note that this dual | |
8 | * licensing only applies to this file, and not this project as a | |
9 | * whole. | |
a177f184 | 10 | * |
a0689609 GB |
11 | * a) This file is free software; you can redistribute it and/or |
12 | * modify it under the terms of the GNU General Public License | |
13 | * version 2 as published by the Free Software Foundation. | |
14 | * | |
15 | * This file is distributed in the hope that it will be useful | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * Or, alternatively | |
21 | * | |
22 | * b) Permission is hereby granted, free of charge, to any person | |
23 | * obtaining a copy of this software and associated documentation | |
24 | * files (the "Software"), to deal in the Software without | |
25 | * restriction, including without limitation the rights to use | |
26 | * copy, modify, merge, publish, distribute, sublicense, and/or | |
27 | * sell copies of the Software, and to permit persons to whom the | |
28 | * Software is furnished to do so, subject to the following | |
29 | * conditions: | |
30 | * | |
31 | * The above copyright notice and this permission notice shall be | |
32 | * included in all copies or substantial portions of the Software. | |
33 | * | |
34 | * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND | |
35 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES | |
36 | * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
37 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT | |
38 | * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY | |
39 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
40 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
41 | * OTHER DEALINGS IN THE SOFTWARE. | |
a177f184 | 42 | */ |
da474d4c TK |
43 | #include <dt-bindings/gpio/gpio.h> |
44 | #include <dt-bindings/input/input.h> | |
a177f184 TK |
45 | |
46 | / { | |
48f51963 SH |
47 | chosen { |
48 | stdout-path = &uart2; | |
49 | }; | |
50 | ||
a177f184 TK |
51 | memory { |
52 | reg = <0x10000000 0x40000000>; | |
53 | }; | |
54 | ||
55 | regulators { | |
56 | compatible = "simple-bus"; | |
57 | #address-cells = <1>; | |
58 | #size-cells = <0>; | |
59 | ||
60 | reg_2p5v: regulator@0 { | |
61 | compatible = "regulator-fixed"; | |
62 | reg = <0>; | |
63 | regulator-name = "2P5V"; | |
64 | regulator-min-microvolt = <2500000>; | |
65 | regulator-max-microvolt = <2500000>; | |
66 | regulator-always-on; | |
67 | }; | |
68 | ||
69 | reg_3p3v: regulator@1 { | |
70 | compatible = "regulator-fixed"; | |
71 | reg = <1>; | |
72 | regulator-name = "3P3V"; | |
73 | regulator-min-microvolt = <3300000>; | |
74 | regulator-max-microvolt = <3300000>; | |
75 | regulator-always-on; | |
76 | }; | |
77 | ||
78 | reg_usb_otg_vbus: regulator@2 { | |
79 | compatible = "regulator-fixed"; | |
80 | reg = <2>; | |
81 | regulator-name = "usb_otg_vbus"; | |
82 | regulator-min-microvolt = <5000000>; | |
83 | regulator-max-microvolt = <5000000>; | |
84 | gpio = <&gpio3 22 0>; | |
85 | enable-active-high; | |
86 | }; | |
3e223394 PS |
87 | |
88 | reg_can_xcvr: regulator@3 { | |
89 | compatible = "regulator-fixed"; | |
90 | reg = <3>; | |
91 | regulator-name = "CAN XCVR"; | |
92 | regulator-min-microvolt = <3300000>; | |
93 | regulator-max-microvolt = <3300000>; | |
94 | pinctrl-names = "default"; | |
95 | pinctrl-0 = <&pinctrl_can_xcvr>; | |
96 | gpio = <&gpio1 2 GPIO_ACTIVE_LOW>; | |
97 | }; | |
f12fb7a2 GB |
98 | |
99 | reg_wlan_vmmc: regulator@4 { | |
100 | compatible = "regulator-fixed"; | |
101 | reg = <4>; | |
102 | pinctrl-names = "default"; | |
103 | pinctrl-0 = <&pinctrl_wlan_vmmc>; | |
104 | regulator-name = "reg_wlan_vmmc"; | |
105 | regulator-min-microvolt = <3300000>; | |
106 | regulator-max-microvolt = <3300000>; | |
107 | gpio = <&gpio6 15 GPIO_ACTIVE_HIGH>; | |
108 | startup-delay-us = <70000>; | |
109 | enable-active-high; | |
110 | }; | |
a177f184 TK |
111 | }; |
112 | ||
da474d4c TK |
113 | gpio-keys { |
114 | compatible = "gpio-keys"; | |
115 | pinctrl-names = "default"; | |
116 | pinctrl-0 = <&pinctrl_gpio_keys>; | |
117 | ||
118 | power { | |
119 | label = "Power Button"; | |
120 | gpios = <&gpio2 3 GPIO_ACTIVE_LOW>; | |
121 | linux,code = <KEY_POWER>; | |
26cefdd1 | 122 | wakeup-source; |
da474d4c TK |
123 | }; |
124 | ||
125 | menu { | |
126 | label = "Menu"; | |
127 | gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; | |
128 | linux,code = <KEY_MENU>; | |
129 | }; | |
130 | ||
131 | home { | |
132 | label = "Home"; | |
133 | gpios = <&gpio2 4 GPIO_ACTIVE_LOW>; | |
134 | linux,code = <KEY_HOME>; | |
135 | }; | |
136 | ||
137 | back { | |
138 | label = "Back"; | |
139 | gpios = <&gpio2 2 GPIO_ACTIVE_LOW>; | |
140 | linux,code = <KEY_BACK>; | |
141 | }; | |
142 | ||
143 | volume-up { | |
144 | label = "Volume Up"; | |
145 | gpios = <&gpio7 13 GPIO_ACTIVE_LOW>; | |
146 | linux,code = <KEY_VOLUMEUP>; | |
147 | }; | |
148 | ||
149 | volume-down { | |
150 | label = "Volume Down"; | |
151 | gpios = <&gpio4 5 GPIO_ACTIVE_LOW>; | |
152 | linux,code = <KEY_VOLUMEDOWN>; | |
153 | }; | |
154 | }; | |
155 | ||
a177f184 TK |
156 | sound { |
157 | compatible = "fsl,imx6q-nitrogen6x-sgtl5000", | |
158 | "fsl,imx-audio-sgtl5000"; | |
159 | model = "imx6q-nitrogen6x-sgtl5000"; | |
160 | ssi-controller = <&ssi1>; | |
161 | audio-codec = <&codec>; | |
162 | audio-routing = | |
163 | "MIC_IN", "Mic Jack", | |
164 | "Mic Jack", "Mic Bias", | |
165 | "Headphone Jack", "HP_OUT"; | |
166 | mux-int-port = <1>; | |
167 | mux-ext-port = <3>; | |
168 | }; | |
169 | ||
986fb9e4 | 170 | backlight_lcd: backlight-lcd { |
a177f184 TK |
171 | compatible = "pwm-backlight"; |
172 | pwms = <&pwm1 0 5000000>; | |
173 | brightness-levels = <0 4 8 16 32 64 128 255>; | |
174 | default-brightness-level = <7>; | |
175 | power-supply = <®_3p3v>; | |
176 | status = "okay"; | |
177 | }; | |
178 | ||
986fb9e4 | 179 | backlight_lvds: backlight-lvds { |
a177f184 TK |
180 | compatible = "pwm-backlight"; |
181 | pwms = <&pwm4 0 5000000>; | |
182 | brightness-levels = <0 4 8 16 32 64 128 255>; | |
183 | default-brightness-level = <7>; | |
184 | power-supply = <®_3p3v>; | |
185 | status = "okay"; | |
186 | }; | |
5d5c8651 | 187 | |
9c3d8fa0 GB |
188 | lcd_display: display@di0 { |
189 | compatible = "fsl,imx-parallel-display"; | |
190 | #address-cells = <1>; | |
191 | #size-cells = <0>; | |
192 | interface-pix-fmt = "bgr666"; | |
193 | pinctrl-names = "default"; | |
194 | pinctrl-0 = <&pinctrl_j15>; | |
195 | status = "okay"; | |
196 | ||
197 | port@0 { | |
198 | reg = <0>; | |
199 | ||
200 | lcd_display_in: endpoint { | |
201 | remote-endpoint = <&ipu1_di0_disp0>; | |
202 | }; | |
203 | }; | |
204 | ||
205 | port@1 { | |
206 | reg = <1>; | |
207 | ||
208 | lcd_display_out: endpoint { | |
209 | remote-endpoint = <&lcd_panel_in>; | |
210 | }; | |
211 | }; | |
212 | }; | |
213 | ||
986fb9e4 | 214 | panel-lcd { |
9c3d8fa0 GB |
215 | compatible = "okaya,rs800480t-7x0gp"; |
216 | backlight = <&backlight_lcd>; | |
217 | ||
218 | port { | |
219 | lcd_panel_in: endpoint { | |
220 | remote-endpoint = <&lcd_display_out>; | |
221 | }; | |
222 | }; | |
223 | }; | |
224 | ||
986fb9e4 | 225 | panel-lvds0 { |
5d5c8651 EN |
226 | compatible = "hannstar,hsd100pxn1"; |
227 | backlight = <&backlight_lvds>; | |
228 | ||
229 | port { | |
230 | panel_in: endpoint { | |
231 | remote-endpoint = <&lvds0_out>; | |
232 | }; | |
233 | }; | |
234 | }; | |
a177f184 TK |
235 | }; |
236 | ||
237 | &audmux { | |
238 | pinctrl-names = "default"; | |
239 | pinctrl-0 = <&pinctrl_audmux>; | |
240 | status = "okay"; | |
241 | }; | |
242 | ||
3e223394 PS |
243 | &can1 { |
244 | pinctrl-names = "default"; | |
245 | pinctrl-0 = <&pinctrl_can1>; | |
246 | xceiver-supply = <®_can_xcvr>; | |
247 | status = "okay"; | |
248 | }; | |
249 | ||
7804fbcf FE |
250 | &clks { |
251 | assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, | |
252 | <&clks IMX6QDL_CLK_LDB_DI1_SEL>; | |
253 | assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>, | |
254 | <&clks IMX6QDL_CLK_PLL3_USB_OTG>; | |
255 | }; | |
256 | ||
a177f184 TK |
257 | &ecspi1 { |
258 | fsl,spi-num-chipselects = <1>; | |
259 | cs-gpios = <&gpio3 19 0>; | |
260 | pinctrl-names = "default"; | |
261 | pinctrl-0 = <&pinctrl_ecspi1>; | |
262 | status = "okay"; | |
263 | ||
264 | flash: m25p80@0 { | |
79826ac6 | 265 | compatible = "sst,sst25vf016b", "jedec,spi-nor"; |
a177f184 TK |
266 | spi-max-frequency = <20000000>; |
267 | reg = <0>; | |
268 | }; | |
269 | }; | |
270 | ||
271 | &fec { | |
272 | pinctrl-names = "default"; | |
273 | pinctrl-0 = <&pinctrl_enet>; | |
274 | phy-mode = "rgmii"; | |
275 | phy-reset-gpios = <&gpio1 27 0>; | |
276 | txen-skew-ps = <0>; | |
277 | txc-skew-ps = <3000>; | |
278 | rxdv-skew-ps = <0>; | |
279 | rxc-skew-ps = <3000>; | |
280 | rxd0-skew-ps = <0>; | |
281 | rxd1-skew-ps = <0>; | |
282 | rxd2-skew-ps = <0>; | |
283 | rxd3-skew-ps = <0>; | |
284 | txd0-skew-ps = <0>; | |
285 | txd1-skew-ps = <0>; | |
286 | txd2-skew-ps = <0>; | |
287 | txd3-skew-ps = <0>; | |
6261c4c8 TK |
288 | interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>, |
289 | <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; | |
a28eeb43 | 290 | fsl,err006687-workaround-present; |
a177f184 TK |
291 | status = "okay"; |
292 | }; | |
293 | ||
d653620e MO |
294 | &hdmi { |
295 | ddc-i2c-bus = <&i2c2>; | |
296 | status = "okay"; | |
297 | }; | |
298 | ||
a177f184 TK |
299 | &i2c1 { |
300 | clock-frequency = <100000>; | |
301 | pinctrl-names = "default"; | |
302 | pinctrl-0 = <&pinctrl_i2c1>; | |
303 | status = "okay"; | |
304 | ||
305 | codec: sgtl5000@0a { | |
306 | compatible = "fsl,sgtl5000"; | |
307 | reg = <0x0a>; | |
b26a68c1 | 308 | clocks = <&clks IMX6QDL_CLK_CKO>; |
a177f184 TK |
309 | VDDA-supply = <®_2p5v>; |
310 | VDDIO-supply = <®_3p3v>; | |
311 | }; | |
7881fb3f PZ |
312 | |
313 | rtc: rtc@6f { | |
314 | compatible = "isil,isl1208"; | |
315 | reg = <0x6f>; | |
316 | }; | |
a177f184 TK |
317 | }; |
318 | ||
43c3c006 MO |
319 | &i2c2 { |
320 | clock-frequency = <100000>; | |
321 | pinctrl-names = "default"; | |
322 | pinctrl-0 = <&pinctrl_i2c2>; | |
323 | status = "okay"; | |
324 | }; | |
325 | ||
1dffdd68 PZ |
326 | &i2c3 { |
327 | clock-frequency = <100000>; | |
328 | pinctrl-names = "default"; | |
329 | pinctrl-0 = <&pinctrl_i2c3>; | |
330 | status = "okay"; | |
140fa36f GB |
331 | |
332 | touchscreen@04 { | |
333 | compatible = "eeti,egalax_ts"; | |
334 | reg = <0x04>; | |
335 | interrupt-parent = <&gpio1>; | |
336 | interrupts = <9 IRQ_TYPE_EDGE_FALLING>; | |
337 | wakeup-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; | |
338 | }; | |
339 | ||
340 | touchscreen@38 { | |
341 | compatible = "edt,edt-ft5x06"; | |
342 | reg = <0x38>; | |
343 | interrupt-parent = <&gpio1>; | |
344 | interrupts = <9 IRQ_TYPE_EDGE_FALLING>; | |
345 | }; | |
1dffdd68 PZ |
346 | }; |
347 | ||
a177f184 TK |
348 | &iomuxc { |
349 | pinctrl-names = "default"; | |
350 | pinctrl-0 = <&pinctrl_hog>; | |
351 | ||
352 | imx6q-nitrogen6x { | |
353 | pinctrl_hog: hoggrp { | |
354 | fsl,pins = < | |
355 | /* SGTL5000 sys_mclk */ | |
356 | MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x030b0 | |
140fa36f | 357 | MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0 |
a177f184 TK |
358 | >; |
359 | }; | |
360 | ||
361 | pinctrl_audmux: audmuxgrp { | |
362 | fsl,pins = < | |
363 | MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 | |
364 | MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 | |
365 | MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 | |
366 | MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 | |
367 | >; | |
368 | }; | |
369 | ||
3e223394 PS |
370 | pinctrl_can1: can1grp { |
371 | fsl,pins = < | |
372 | MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b0 | |
373 | MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b0 | |
374 | >; | |
375 | }; | |
376 | ||
377 | pinctrl_can_xcvr: can-xcvrgrp { | |
378 | fsl,pins = < | |
379 | /* Flexcan XCVR enable */ | |
380 | MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0 | |
381 | >; | |
382 | }; | |
383 | ||
a177f184 TK |
384 | pinctrl_ecspi1: ecspi1grp { |
385 | fsl,pins = < | |
386 | MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 | |
387 | MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 | |
388 | MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 | |
389 | MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1 /* CS */ | |
390 | >; | |
391 | }; | |
392 | ||
393 | pinctrl_enet: enetgrp { | |
394 | fsl,pins = < | |
395 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0 | |
396 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0 | |
c007b3a6 UKK |
397 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030 |
398 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030 | |
399 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030 | |
400 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030 | |
401 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030 | |
402 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030 | |
a177f184 | 403 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 |
c007b3a6 UKK |
404 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 |
405 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 | |
406 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 | |
407 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 | |
408 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 | |
409 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 | |
a177f184 TK |
410 | /* Phy reset */ |
411 | MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x000b0 | |
6261c4c8 | 412 | MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 |
a177f184 TK |
413 | >; |
414 | }; | |
415 | ||
986fb9e4 | 416 | pinctrl_gpio_keys: gpio-keysgrp { |
da474d4c TK |
417 | fsl,pins = < |
418 | /* Power Button */ | |
419 | MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0 | |
420 | /* Menu Button */ | |
421 | MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0 | |
422 | /* Home Button */ | |
423 | MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0 | |
424 | /* Back Button */ | |
425 | MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0 | |
426 | /* Volume Up Button */ | |
427 | MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0 | |
428 | /* Volume Down Button */ | |
429 | MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0 | |
430 | >; | |
431 | }; | |
432 | ||
a177f184 TK |
433 | pinctrl_i2c1: i2c1grp { |
434 | fsl,pins = < | |
435 | MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 | |
436 | MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 | |
437 | >; | |
438 | }; | |
439 | ||
43c3c006 MO |
440 | pinctrl_i2c2: i2c2grp { |
441 | fsl,pins = < | |
442 | MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 | |
443 | MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 | |
444 | >; | |
445 | }; | |
446 | ||
1dffdd68 PZ |
447 | pinctrl_i2c3: i2c3grp { |
448 | fsl,pins = < | |
449 | MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 | |
450 | MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1 | |
451 | >; | |
452 | }; | |
453 | ||
9c3d8fa0 GB |
454 | pinctrl_j15: j15grp { |
455 | fsl,pins = < | |
456 | MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 | |
457 | MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10 | |
458 | MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10 | |
459 | MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10 | |
460 | MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10 | |
461 | MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10 | |
462 | MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10 | |
463 | MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10 | |
464 | MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10 | |
465 | MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10 | |
466 | MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10 | |
467 | MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10 | |
468 | MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10 | |
469 | MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10 | |
470 | MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10 | |
471 | MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10 | |
472 | MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10 | |
473 | MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10 | |
474 | MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10 | |
475 | MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10 | |
476 | MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10 | |
477 | MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10 | |
478 | MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10 | |
479 | MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10 | |
480 | MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10 | |
481 | MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10 | |
482 | MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10 | |
483 | MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10 | |
484 | >; | |
485 | }; | |
486 | ||
a177f184 TK |
487 | pinctrl_pwm1: pwm1grp { |
488 | fsl,pins = < | |
489 | MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1 | |
490 | >; | |
491 | }; | |
492 | ||
493 | pinctrl_pwm3: pwm3grp { | |
494 | fsl,pins = < | |
495 | MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 | |
496 | >; | |
497 | }; | |
498 | ||
499 | pinctrl_pwm4: pwm4grp { | |
500 | fsl,pins = < | |
501 | MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 | |
502 | >; | |
503 | }; | |
504 | ||
505 | pinctrl_uart1: uart1grp { | |
506 | fsl,pins = < | |
507 | MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 | |
508 | MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 | |
509 | >; | |
510 | }; | |
511 | ||
512 | pinctrl_uart2: uart2grp { | |
513 | fsl,pins = < | |
514 | MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 | |
515 | MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 | |
516 | >; | |
517 | }; | |
518 | ||
519 | pinctrl_usbotg: usbotggrp { | |
520 | fsl,pins = < | |
521 | MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 | |
522 | MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0 | |
523 | /* power enable, high active */ | |
524 | MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0 | |
525 | >; | |
526 | }; | |
527 | ||
f12fb7a2 GB |
528 | pinctrl_usdhc2: usdhc2grp { |
529 | fsl,pins = < | |
530 | MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17071 | |
531 | MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10071 | |
532 | MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17071 | |
533 | MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17071 | |
534 | MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17071 | |
535 | MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17071 | |
f12fb7a2 GB |
536 | >; |
537 | }; | |
538 | ||
a177f184 TK |
539 | pinctrl_usdhc3: usdhc3grp { |
540 | fsl,pins = < | |
541 | MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 | |
542 | MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 | |
543 | MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 | |
544 | MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 | |
545 | MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 | |
546 | MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 | |
547 | MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* CD */ | |
548 | >; | |
549 | }; | |
550 | ||
551 | pinctrl_usdhc4: usdhc4grp { | |
552 | fsl,pins = < | |
553 | MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 | |
554 | MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 | |
555 | MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 | |
556 | MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 | |
557 | MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 | |
558 | MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 | |
559 | MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 /* CD */ | |
560 | >; | |
561 | }; | |
f12fb7a2 | 562 | |
986fb9e4 | 563 | pinctrl_wlan_vmmc: wlan-vmmcgrp { |
f12fb7a2 GB |
564 | fsl,pins = < |
565 | MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x100b0 | |
566 | MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x000b0 | |
567 | MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x000b0 | |
568 | MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT 0x000b0 | |
569 | >; | |
570 | }; | |
a177f184 TK |
571 | }; |
572 | }; | |
573 | ||
9c3d8fa0 GB |
574 | &ipu1_di0_disp0 { |
575 | remote-endpoint = <&lcd_display_in>; | |
576 | }; | |
577 | ||
a177f184 TK |
578 | &ldb { |
579 | status = "okay"; | |
580 | ||
581 | lvds-channel@0 { | |
582 | fsl,data-mapping = "spwg"; | |
583 | fsl,data-width = <18>; | |
584 | status = "okay"; | |
585 | ||
5d5c8651 EN |
586 | port@4 { |
587 | reg = <4>; | |
588 | ||
589 | lvds0_out: endpoint { | |
590 | remote-endpoint = <&panel_in>; | |
a177f184 TK |
591 | }; |
592 | }; | |
593 | }; | |
594 | }; | |
595 | ||
596 | &pcie { | |
597 | status = "okay"; | |
598 | }; | |
599 | ||
600 | &pwm1 { | |
601 | pinctrl-names = "default"; | |
602 | pinctrl-0 = <&pinctrl_pwm1>; | |
603 | status = "okay"; | |
604 | }; | |
605 | ||
606 | &pwm3 { | |
607 | pinctrl-names = "default"; | |
608 | pinctrl-0 = <&pinctrl_pwm3>; | |
609 | status = "okay"; | |
610 | }; | |
611 | ||
612 | &pwm4 { | |
613 | pinctrl-names = "default"; | |
614 | pinctrl-0 = <&pinctrl_pwm4>; | |
615 | status = "okay"; | |
616 | }; | |
617 | ||
618 | &ssi1 { | |
a177f184 TK |
619 | status = "okay"; |
620 | }; | |
621 | ||
622 | &uart1 { | |
623 | pinctrl-names = "default"; | |
624 | pinctrl-0 = <&pinctrl_uart1>; | |
625 | status = "okay"; | |
626 | }; | |
627 | ||
628 | &uart2 { | |
629 | pinctrl-names = "default"; | |
630 | pinctrl-0 = <&pinctrl_uart2>; | |
631 | status = "okay"; | |
632 | }; | |
633 | ||
634 | &usbh1 { | |
635 | status = "okay"; | |
636 | }; | |
637 | ||
638 | &usbotg { | |
639 | vbus-supply = <®_usb_otg_vbus>; | |
640 | pinctrl-names = "default"; | |
641 | pinctrl-0 = <&pinctrl_usbotg>; | |
642 | disable-over-current; | |
643 | status = "okay"; | |
644 | }; | |
645 | ||
f12fb7a2 GB |
646 | &usdhc2 { |
647 | pinctrl-names = "default"; | |
648 | pinctrl-0 = <&pinctrl_usdhc2>; | |
649 | bus-width = <4>; | |
650 | non-removable; | |
651 | vmmc-supply = <®_wlan_vmmc>; | |
652 | cap-power-off-card; | |
653 | keep-power-in-suspend; | |
654 | status = "okay"; | |
655 | ||
656 | #address-cells = <1>; | |
657 | #size-cells = <0>; | |
658 | wlcore: wlcore@2 { | |
659 | compatible = "ti,wl1271"; | |
660 | reg = <2>; | |
661 | interrupt-parent = <&gpio6>; | |
662 | interrupts = <14 IRQ_TYPE_LEVEL_HIGH>; | |
663 | ref-clock-frequency = <38400000>; | |
664 | }; | |
665 | }; | |
666 | ||
a177f184 TK |
667 | &usdhc3 { |
668 | pinctrl-names = "default"; | |
669 | pinctrl-0 = <&pinctrl_usdhc3>; | |
89c1a8cf | 670 | cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; |
a177f184 TK |
671 | vmmc-supply = <®_3p3v>; |
672 | status = "okay"; | |
673 | }; | |
674 | ||
675 | &usdhc4 { | |
676 | pinctrl-names = "default"; | |
677 | pinctrl-0 = <&pinctrl_usdhc4>; | |
89c1a8cf | 678 | cd-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>; |
a177f184 TK |
679 | vmmc-supply = <®_3p3v>; |
680 | status = "okay"; | |
681 | }; |