[mirror_ubuntu-artful-kernel.git] / arch / arm / boot / dts / imx6qdl-sabresd.dtsi

/*
 * Copyright 2012 Freescale Semiconductor, Inc.
 * Copyright 2011 Linaro Ltd.
 *
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	chosen {
		stdout-path = &uart1;
	};

	memory {
		reg = <0x10000000 0x40000000>;
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		reg_usb_otg_vbus: regulator@0 {
			compatible = "regulator-fixed";
			reg = <0>;
			regulator-name = "usb_otg_vbus";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			gpio = <&gpio3 22 0>;
			enable-active-high;
			vin-supply = <&swbst_reg>;
		};

		reg_usb_h1_vbus: regulator@1 {
			compatible = "regulator-fixed";
			reg = <1>;
			regulator-name = "usb_h1_vbus";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			gpio = <&gpio1 29 0>;
			enable-active-high;
			vin-supply = <&swbst_reg>;
		};

		reg_audio: regulator@2 {
			compatible = "regulator-fixed";
			reg = <2>;
			regulator-name = "wm8962-supply";
			gpio = <&gpio4 10 0>;
			enable-active-high;
		};

		reg_pcie: regulator@3 {
			compatible = "regulator-fixed";
			reg = <3>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_pcie_reg>;
			regulator-name = "MPCIE_3V3";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			gpio = <&gpio3 19 0>;
			regulator-always-on;
			enable-active-high;
		};
	};

	gpio-keys {
		compatible = "gpio-keys";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_keys>;

		power {
			label = "Power Button";
			gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
			wakeup-source;
			linux,code = <KEY_POWER>;
		};

		volume-up {
			label = "Volume Up";
			gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
			wakeup-source;
			linux,code = <KEY_VOLUMEUP>;
		};

		volume-down {
			label = "Volume Down";
			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
			wakeup-source;
			linux,code = <KEY_VOLUMEDOWN>;
		};
	};

	sound {
		compatible = "fsl,imx6q-sabresd-wm8962",
			   "fsl,imx-audio-wm8962";
		model = "wm8962-audio";
		ssi-controller = <&ssi2>;
		audio-codec = <&codec>;
		audio-routing =
			"Headphone Jack", "HPOUTL",
			"Headphone Jack", "HPOUTR",
			"Ext Spk", "SPKOUTL",
			"Ext Spk", "SPKOUTR",
			"AMIC", "MICBIAS",
			"IN3R", "AMIC";
		mux-int-port = <2>;
		mux-ext-port = <3>;
	};

	backlight {
		compatible = "pwm-backlight";
		pwms = <&pwm1 0 5000000>;
		brightness-levels = <0 4 8 16 32 64 128 255>;
		default-brightness-level = <7>;
		status = "okay";
	};

	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_leds>;

		red {
		        gpios = <&gpio1 2 0>;
		        default-state = "on";
		};
	};
};

&audmux {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_audmux>;
	status = "okay";
};

&clks {
	assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
			  <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
				 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
};

&ecspi1 {
	fsl,spi-num-chipselects = <1>;
	cs-gpios = <&gpio4 9 0>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi1>;
	status = "okay";

	flash: m25p80@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "st,m25p32", "jedec,spi-nor";
		spi-max-frequency = <20000000>;
		reg = <0>;
	};
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-mode = "rgmii";
	phy-reset-gpios = <&gpio1 25 0>;
	status = "okay";
};

&hdmi {
	ddc-i2c-bus = <&i2c2>;
	status = "okay";
};

&i2c1 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";

	codec: wm8962@1a {
		compatible = "wlf,wm8962";
		reg = <0x1a>;
		clocks = <&clks IMX6QDL_CLK_CKO>;
		DCVDD-supply = <&reg_audio>;
		DBVDD-supply = <&reg_audio>;
		AVDD-supply = <&reg_audio>;
		CPVDD-supply = <&reg_audio>;
		MICVDD-supply = <&reg_audio>;
		PLLVDD-supply = <&reg_audio>;
		SPKVDD1-supply = <&reg_audio>;
		SPKVDD2-supply = <&reg_audio>;
		gpio-cfg = <
			0x0000 /* 0:Default */
			0x0000 /* 1:Default */
			0x0013 /* 2:FN_DMICCLK */
			0x0000 /* 3:Default */
			0x8014 /* 4:FN_DMICCDAT */
			0x0000 /* 5:Default */
		>;
       };
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";

	pmic: pfuze100@08 {
		compatible = "fsl,pfuze100";
		reg = <0x08>;

		regulators {
			sw1a_reg: sw1ab {
				regulator-min-microvolt = <300000>;
				regulator-max-microvolt = <1875000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			sw1c_reg: sw1c {
				regulator-min-microvolt = <300000>;
				regulator-max-microvolt = <1875000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			sw2_reg: sw2 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			sw3a_reg: sw3a {
				regulator-min-microvolt = <400000>;
				regulator-max-microvolt = <1975000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw3b_reg: sw3b {
				regulator-min-microvolt = <400000>;
				regulator-max-microvolt = <1975000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw4_reg: sw4 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <3300000>;
			};

			swbst_reg: swbst {
				regulator-min-microvolt = <5000000>;
				regulator-max-microvolt = <5150000>;
			};

			snvs_reg: vsnvs {
				regulator-min-microvolt = <1000000>;
				regulator-max-microvolt = <3000000>;
				regulator-boot-on;
				regulator-always-on;
			};

			vref_reg: vrefddr {
				regulator-boot-on;
				regulator-always-on;
			};

			vgen1_reg: vgen1 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1550000>;
			};

			vgen2_reg: vgen2 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1550000>;
			};

			vgen3_reg: vgen3 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
			};

			vgen4_reg: vgen4 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen5_reg: vgen5 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen6_reg: vgen6 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};
		};
	};
};

&i2c3 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";

	egalax_ts@04 {
		compatible = "eeti,egalax_ts";
		reg = <0x04>;
		interrupt-parent = <&gpio6>;
		interrupts = <7 2>;
		wakeup-gpios = <&gpio6 7 0>;
	};
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog>;

	imx6qdl-sabresd {
		pinctrl_hog: hoggrp {
			fsl,pins = <
				MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0
				MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
				MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
				MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
				MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x130b0
				MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x1b0b0
				MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
				MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x1b0b0
				MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0
			>;
		};

		pinctrl_audmux: audmuxgrp {
			fsl,pins = <
				MX6QDL_PAD_CSI0_DAT7__AUD3_RXD		0x130b0
				MX6QDL_PAD_CSI0_DAT4__AUD3_TXC		0x130b0
				MX6QDL_PAD_CSI0_DAT5__AUD3_TXD		0x110b0
				MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS		0x130b0
			>;
		};

		pinctrl_ecspi1: ecspi1grp {
			fsl,pins = <
				MX6QDL_PAD_KEY_COL1__ECSPI1_MISO	0x100b1
				MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI	0x100b1
				MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK	0x100b1
				MX6QDL_PAD_KEY_ROW1__GPIO4_IO09		0x1b0b0
			>;
		};

		pinctrl_enet: enetgrp {
			fsl,pins = <
				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b0b0
				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b0b0
				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b0b0
				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b0b0
				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b0b0
				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b0b0
				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b0b0
				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b0b0
				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b0b0
				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b0b0
				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b0b0
				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b0b0
				MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8
			>;
		};

		pinctrl_gpio_keys: gpio_keysgrp {
			fsl,pins = <
				MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b0
				MX6QDL_PAD_GPIO_4__GPIO1_IO04  0x1b0b0
				MX6QDL_PAD_GPIO_5__GPIO1_IO05  0x1b0b0
			>;
		};

		pinctrl_i2c1: i2c1grp {
			fsl,pins = <
				MX6QDL_PAD_CSI0_DAT8__I2C1_SDA		0x4001b8b1
				MX6QDL_PAD_CSI0_DAT9__I2C1_SCL		0x4001b8b1
			>;
		};

		pinctrl_i2c2: i2c2grp {
			fsl,pins = <
				MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
				MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
			>;
		};

		pinctrl_i2c3: i2c3grp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_3__I2C3_SCL		0x4001b8b1
				MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1
			>;
		};

		pinctrl_pcie: pciegrp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_17__GPIO7_IO12	0x1b0b0
			>;
		};

		pinctrl_pcie_reg: pciereggrp {
			fsl,pins = <
				MX6QDL_PAD_EIM_D19__GPIO3_IO19	0x1b0b0
			>;
		};

		pinctrl_pwm1: pwm1grp {
			fsl,pins = <
				MX6QDL_PAD_SD1_DAT3__PWM1_OUT		0x1b0b1
			>;
		};

		pinctrl_uart1: uart1grp {
			fsl,pins = <
				MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA	0x1b0b1
				MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA	0x1b0b1
			>;
		};

		pinctrl_usbotg: usbotggrp {
			fsl,pins = <
				MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID	0x17059
			>;
		};

		pinctrl_usdhc2: usdhc2grp {
			fsl,pins = <
				MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059
				MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10059
				MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059
				MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059
				MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059
				MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059
				MX6QDL_PAD_NANDF_D4__SD2_DATA4		0x17059
				MX6QDL_PAD_NANDF_D5__SD2_DATA5		0x17059
				MX6QDL_PAD_NANDF_D6__SD2_DATA6		0x17059
				MX6QDL_PAD_NANDF_D7__SD2_DATA7		0x17059
			>;
		};

		pinctrl_usdhc3: usdhc3grp {
			fsl,pins = <
				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
				MX6QDL_PAD_SD3_DAT4__SD3_DATA4		0x17059
				MX6QDL_PAD_SD3_DAT5__SD3_DATA5		0x17059
				MX6QDL_PAD_SD3_DAT6__SD3_DATA6		0x17059
				MX6QDL_PAD_SD3_DAT7__SD3_DATA7		0x17059
			>;
		};

		pinctrl_usdhc4: usdhc4grp {
			fsl,pins = <
				MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059
				MX6QDL_PAD_SD4_CLK__SD4_CLK		0x10059
				MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059
				MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059
				MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059
				MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059
				MX6QDL_PAD_SD4_DAT4__SD4_DATA4		0x17059
				MX6QDL_PAD_SD4_DAT5__SD4_DATA5		0x17059
				MX6QDL_PAD_SD4_DAT6__SD4_DATA6		0x17059
				MX6QDL_PAD_SD4_DAT7__SD4_DATA7		0x17059
			>;
		};
	};

	gpio_leds {
		pinctrl_gpio_leds: gpioledsgrp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
			>;
		};
	};
};

&ldb {
	status = "okay";

	lvds-channel@1 {
		fsl,data-mapping = "spwg";
		fsl,data-width = <18>;
		status = "okay";

		display-timings {
			native-mode = <&timing0>;
			timing0: hsd100pxn1 {
				clock-frequency = <65000000>;
				hactive = <1024>;
				vactive = <768>;
				hback-porch = <220>;
				hfront-porch = <40>;
				vback-porch = <21>;
				vfront-porch = <7>;
				hsync-len = <60>;
				vsync-len = <10>;
			};
		};
	};
};

&pcie {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pcie>;
	reset-gpio = <&gpio7 12 0>;
	status = "okay";
};

&pwm1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm1>;
	status = "okay";
};

&snvs_poweroff {
	status = "okay";
};

&ssi2 {
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	status = "okay";
};

&usbh1 {
	vbus-supply = <&reg_usb_h1_vbus>;
	status = "okay";
};

&usbotg {
	vbus-supply = <&reg_usb_otg_vbus>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg>;
	disable-over-current;
	status = "okay";
};

&usdhc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc2>;
	bus-width = <8>;
	cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
	wp-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
	status = "okay";
};

&usdhc3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3>;
	bus-width = <8>;
	cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
	wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
	status = "okay";
};

&usdhc4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc4>;
	bus-width = <8>;
	non-removable;
	no-1-8-v;
	status = "okay";
};
Commit	Line	Data
082d33d0 SG	1	/*
	2	* Copyright 2012 Freescale Semiconductor, Inc.
	3	* Copyright 2011 Linaro Ltd.
	4	*
	5	* The code contained herein is licensed under the GNU General Public
	6	* License. You may obtain a copy of the GNU General Public License
	7	* Version 2 or later at the following locations:
	8	*
	9	* http://www.opensource.org/licenses/gpl-license.html
	10	* http://www.gnu.org/copyleft/gpl.html
	11	*/
	12
22724cf1	13	#include <dt-bindings/gpio/gpio.h>
8e4422ae AH	14	#include <dt-bindings/input/input.h>
8e4422ae AH	15
082d33d0	16	/ {
48f51963 SH	17	chosen {
	18	stdout-path = &uart1;
	19	};
	20
082d33d0 SG	21	memory {
	22	reg = <0x10000000 0x40000000>;
	23	};
	24
	25	regulators {
	26	compatible = "simple-bus";
56160e33 SG	27	#address-cells = <1>;
56160e33 SG	28	#size-cells = <0>;
082d33d0	29
56160e33	30	reg_usb_otg_vbus: regulator@0 {
082d33d0	31	compatible = "regulator-fixed";
56160e33	32	reg = <0>;
082d33d0 SG	33	regulator-name = "usb_otg_vbus";
	34	regulator-min-microvolt = <5000000>;
	35	regulator-max-microvolt = <5000000>;
	36	gpio = <&gpio3 22 0>;
	37	enable-active-high;
40f73779	38	vin-supply = <&swbst_reg>;
082d33d0	39	};
fdbfb43b	40
56160e33	41	reg_usb_h1_vbus: regulator@1 {
015fa46d	42	compatible = "regulator-fixed";
56160e33	43	reg = <1>;
015fa46d PC	44	regulator-name = "usb_h1_vbus";
	45	regulator-min-microvolt = <5000000>;
	46	regulator-max-microvolt = <5000000>;
	47	gpio = <&gpio1 29 0>;
	48	enable-active-high;
40f73779	49	vin-supply = <&swbst_reg>;
015fa46d PC	50	};
015fa46d PC	51
56160e33	52	reg_audio: regulator@2 {
fdbfb43b	53	compatible = "regulator-fixed";
56160e33	54	reg = <2>;
fdbfb43b NC	55	regulator-name = "wm8962-supply";
	56	gpio = <&gpio4 10 0>;
	57	enable-active-high;
	58	};
78827ec0 LS	59
	60	reg_pcie: regulator@3 {
	61	compatible = "regulator-fixed";
	62	reg = <3>;
	63	pinctrl-names = "default";
	64	pinctrl-0 = <&pinctrl_pcie_reg>;
	65	regulator-name = "MPCIE_3V3";
	66	regulator-min-microvolt = <3300000>;
	67	regulator-max-microvolt = <3300000>;
	68	gpio = <&gpio3 19 0>;
	69	regulator-always-on;
	70	enable-active-high;
	71	};
082d33d0 SG	72	};
	73
	74	gpio-keys {
	75	compatible = "gpio-keys";
8e4422ae AH	76	pinctrl-names = "default";
	77	pinctrl-0 = <&pinctrl_gpio_keys>;
	78
	79	power {
	80	label = "Power Button";
22724cf1	81	gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
26cefdd1	82	wakeup-source;
8e4422ae AH	83	linux,code = <KEY_POWER>;
8e4422ae AH	84	};
082d33d0 SG	85
	86	volume-up {
	87	label = "Volume Up";
22724cf1	88	gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
26cefdd1	89	wakeup-source;
8e4422ae	90	linux,code = <KEY_VOLUMEUP>;
082d33d0 SG	91	};
	92
	93	volume-down {
	94	label = "Volume Down";
22724cf1	95	gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
26cefdd1	96	wakeup-source;
8e4422ae	97	linux,code = <KEY_VOLUMEDOWN>;
082d33d0 SG	98	};
082d33d0 SG	99	};
77b38fc3 NC	100
	101	sound {
	102	compatible = "fsl,imx6q-sabresd-wm8962",
	103	"fsl,imx-audio-wm8962";
	104	model = "wm8962-audio";
	105	ssi-controller = <&ssi2>;
	106	audio-codec = <&codec>;
	107	audio-routing =
	108	"Headphone Jack", "HPOUTL",
	109	"Headphone Jack", "HPOUTR",
	110	"Ext Spk", "SPKOUTL",
	111	"Ext Spk", "SPKOUTR",
76e68684 FE	112	"AMIC", "MICBIAS",
76e68684 FE	113	"IN3R", "AMIC";
77b38fc3 NC	114	mux-int-port = <2>;
	115	mux-ext-port = <3>;
	116	};
2f35c0c4 RP	117
	118	backlight {
	119	compatible = "pwm-backlight";
	120	pwms = <&pwm1 0 5000000>;
	121	brightness-levels = <0 4 8 16 32 64 128 255>;
	122	default-brightness-level = <7>;
	123	status = "okay";
	124	};
702bfbef VS	125
	126	leds {
	127	compatible = "gpio-leds";
	128	pinctrl-names = "default";
	129	pinctrl-0 = <&pinctrl_gpio_leds>;
	130
	131	red {
	132	gpios = <&gpio1 2 0>;
	133	default-state = "on";
	134	};
	135	};
082d33d0 SG	136	};
082d33d0 SG	137
48828700 NC	138	&audmux {
48828700 NC	139	pinctrl-names = "default";
817c27a1	140	pinctrl-0 = <&pinctrl_audmux>;
48828700 NC	141	status = "okay";
	142	};
	143
d28be499 FE	144	&clks {
	145	assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
	146	<&clks IMX6QDL_CLK_LDB_DI1_SEL>;
	147	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
	148	<&clks IMX6QDL_CLK_PLL3_USB_OTG>;
	149	};
	150
9110ede4 HS	151	&ecspi1 {
	152	fsl,spi-num-chipselects = <1>;
	153	cs-gpios = <&gpio4 9 0>;
	154	pinctrl-names = "default";
817c27a1	155	pinctrl-0 = <&pinctrl_ecspi1>;
9110ede4 HS	156	status = "okay";
	157
	158	flash: m25p80@0 {
	159	#address-cells = <1>;
	160	#size-cells = <1>;
79826ac6	161	compatible = "st,m25p32", "jedec,spi-nor";
9110ede4 HS	162	spi-max-frequency = <20000000>;
	163	reg = <0>;
	164	};
	165	};
	166
082d33d0 SG	167	&fec {
082d33d0 SG	168	pinctrl-names = "default";
817c27a1	169	pinctrl-0 = <&pinctrl_enet>;
082d33d0	170	phy-mode = "rgmii";
c5f592d1	171	phy-reset-gpios = <&gpio1 25 0>;
082d33d0 SG	172	status = "okay";
	173	};
	174
ad704567 FE	175	&hdmi {
	176	ddc-i2c-bus = <&i2c2>;
	177	status = "okay";
	178	};
	179
20426feb NC	180	&i2c1 {
	181	clock-frequency = <100000>;
	182	pinctrl-names = "default";
817c27a1	183	pinctrl-0 = <&pinctrl_i2c1>;
20426feb NC	184	status = "okay";
	185
	186	codec: wm8962@1a {
	187	compatible = "wlf,wm8962";
	188	reg = <0x1a>;
f029ce3b	189	clocks = <&clks IMX6QDL_CLK_CKO>;
20426feb NC	190	DCVDD-supply = <&reg_audio>;
	191	DBVDD-supply = <&reg_audio>;
	192	AVDD-supply = <&reg_audio>;
	193	CPVDD-supply = <&reg_audio>;
	194	MICVDD-supply = <&reg_audio>;
	195	PLLVDD-supply = <&reg_audio>;
	196	SPKVDD1-supply = <&reg_audio>;
	197	SPKVDD2-supply = <&reg_audio>;
	198	gpio-cfg = <
	199	0x0000 /* 0:Default */
	200	0x0000 /* 1:Default */
	201	0x0013 /* 2:FN_DMICCLK */
	202	0x0000 /* 3:Default */
	203	0x8014 /* 4:FN_DMICCDAT */
	204	0x0000 /* 5:Default */
	205	>;
	206	};
	207	};
	208
4b444bb8 FE	209	&i2c2 {
	210	clock-frequency = <100000>;
	211	pinctrl-names = "default";
	212	pinctrl-0 = <&pinctrl_i2c2>;
	213	status = "okay";
	214
	215	pmic: pfuze100@08 {
	216	compatible = "fsl,pfuze100";
	217	reg = <0x08>;
	218
	219	regulators {
	220	sw1a_reg: sw1ab {
	221	regulator-min-microvolt = <300000>;
	222	regulator-max-microvolt = <1875000>;
	223	regulator-boot-on;
	224	regulator-always-on;
	225	regulator-ramp-delay = <6250>;
	226	};
	227
	228	sw1c_reg: sw1c {
	229	regulator-min-microvolt = <300000>;
	230	regulator-max-microvolt = <1875000>;
	231	regulator-boot-on;
	232	regulator-always-on;
	233	regulator-ramp-delay = <6250>;
	234	};
	235
	236	sw2_reg: sw2 {
	237	regulator-min-microvolt = <800000>;
	238	regulator-max-microvolt = <3300000>;
	239	regulator-boot-on;
	240	regulator-always-on;
5d625375	241	regulator-ramp-delay = <6250>;
4b444bb8 FE	242	};
	243
	244	sw3a_reg: sw3a {
	245	regulator-min-microvolt = <400000>;
	246	regulator-max-microvolt = <1975000>;
	247	regulator-boot-on;
	248	regulator-always-on;
	249	};
	250
	251	sw3b_reg: sw3b {
	252	regulator-min-microvolt = <400000>;
	253	regulator-max-microvolt = <1975000>;
	254	regulator-boot-on;
	255	regulator-always-on;
	256	};
	257
	258	sw4_reg: sw4 {
	259	regulator-min-microvolt = <800000>;
	260	regulator-max-microvolt = <3300000>;
	261	};
	262
	263	swbst_reg: swbst {
	264	regulator-min-microvolt = <5000000>;
	265	regulator-max-microvolt = <5150000>;
	266	};
	267
	268	snvs_reg: vsnvs {
	269	regulator-min-microvolt = <1000000>;
	270	regulator-max-microvolt = <3000000>;
	271	regulator-boot-on;
	272	regulator-always-on;
	273	};
	274
	275	vref_reg: vrefddr {
	276	regulator-boot-on;
	277	regulator-always-on;
	278	};
	279
	280	vgen1_reg: vgen1 {
	281	regulator-min-microvolt = <800000>;
	282	regulator-max-microvolt = <1550000>;
	283	};
	284
	285	vgen2_reg: vgen2 {
	286	regulator-min-microvolt = <800000>;
	287	regulator-max-microvolt = <1550000>;
	288	};
	289
	290	vgen3_reg: vgen3 {
	291	regulator-min-microvolt = <1800000>;
	292	regulator-max-microvolt = <3300000>;
	293	};
	294
	295	vgen4_reg: vgen4 {
	296	regulator-min-microvolt = <1800000>;
	297	regulator-max-microvolt = <3300000>;
	298	regulator-always-on;
	299	};
	300
	301	vgen5_reg: vgen5 {
	302	regulator-min-microvolt = <1800000>;
	303	regulator-max-microvolt = <3300000>;
	304	regulator-always-on;
	305	};
306
307	vgen6_reg: vgen6 {
308	regulator-min-microvolt = <1800000>;
309	regulator-max-microvolt = <3300000>;
310	regulator-always-on;
311	};
312	};
313	};
314	};
315
38501179 FE	316	&i2c3 {
	317	clock-frequency = <100000>;
	318	pinctrl-names = "default";
817c27a1	319	pinctrl-0 = <&pinctrl_i2c3>;
38501179 FE	320	status = "okay";
	321
	322	egalax_ts@04 {
	323	compatible = "eeti,egalax_ts";
	324	reg = <0x04>;
	325	interrupt-parent = <&gpio6>;
	326	interrupts = <7 2>;
	327	wakeup-gpios = <&gpio6 7 0>;
	328	};
	329	};
	330
c56009b2 SG	331	&iomuxc {
	332	pinctrl-names = "default";
	333	pinctrl-0 = <&pinctrl_hog>;
	334
817c27a1	335	imx6qdl-sabresd {
c56009b2 SG	336	pinctrl_hog: hoggrp {
c56009b2 SG	337	fsl,pins = <
9a060c1a FE	338	MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0
	339	MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
	340	MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
	341	MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
c56009b2	342	MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
9a060c1a FE	343	MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x1b0b0
	344	MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
	345	MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0
	346	MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0
c56009b2 SG	347	>;
c56009b2 SG	348	};
817c27a1 SG	349
	350	pinctrl_audmux: audmuxgrp {
	351	fsl,pins = <
77112dd5 NC	352	MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
	353	MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
	354	MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
	355	MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
817c27a1 SG	356	>;
	357	};
	358
	359	pinctrl_ecspi1: ecspi1grp {
	360	fsl,pins = <
	361	MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x100b1
	362	MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1
	363	MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1
f3c72380	364	MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x1b0b0
817c27a1 SG	365	>;
	366	};
	367
	368	pinctrl_enet: enetgrp {
	369	fsl,pins = <
	370	MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
	371	MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
	372	MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
	373	MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
	374	MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
	375	MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
	376	MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
	377	MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
	378	MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
	379	MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
	380	MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
	381	MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
	382	MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
	383	MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
	384	MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
	385	MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
	386	>;
	387	};
	388
8e4422ae AH	389	pinctrl_gpio_keys: gpio_keysgrp {
8e4422ae AH	390	fsl,pins = <
9a060c1a FE	391	MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b0
	392	MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0
	393	MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b0
8e4422ae AH	394	>;
	395	};
	396
817c27a1 SG	397	pinctrl_i2c1: i2c1grp {
	398	fsl,pins = <
	399	MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
	400	MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
	401	>;
	402	};
	403
4b444bb8 FE	404	pinctrl_i2c2: i2c2grp {
	405	fsl,pins = <
	406	MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
	407	MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
	408	>;
	409	};
	410
817c27a1 SG	411	pinctrl_i2c3: i2c3grp {
	412	fsl,pins = <
	413	MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
	414	MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
	415	>;
	416	};
	417
9d4ebb36 MV	418	pinctrl_pcie: pciegrp {
9d4ebb36 MV	419	fsl,pins = <
9a060c1a	420	MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0
9d4ebb36 MV	421	>;
	422	};
	423
78827ec0 LS	424	pinctrl_pcie_reg: pciereggrp {
	425	fsl,pins = <
	426	MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x1b0b0
	427	>;
	428	};
	429
817c27a1 SG	430	pinctrl_pwm1: pwm1grp {
	431	fsl,pins = <
	432	MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
	433	>;
	434	};
	435
	436	pinctrl_uart1: uart1grp {
	437	fsl,pins = <
	438	MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
	439	MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
	440	>;
	441	};
	442
	443	pinctrl_usbotg: usbotggrp {
	444	fsl,pins = <
	445	MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
	446	>;
	447	};
	448
	449	pinctrl_usdhc2: usdhc2grp {
	450	fsl,pins = <
	451	MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
	452	MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
	453	MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
	454	MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
	455	MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
	456	MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
	457	MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x17059
	458	MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x17059
	459	MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x17059
	460	MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x17059
	461	>;
	462	};
	463
	464	pinctrl_usdhc3: usdhc3grp {
	465	fsl,pins = <
	466	MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
	467	MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
	468	MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
	469	MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
	470	MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
	471	MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
	472	MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
	473	MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
	474	MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
	475	MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
	476	>;
	477	};
e02ab39a FE	478
	479	pinctrl_usdhc4: usdhc4grp {
	480	fsl,pins = <
	481	MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
	482	MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
	483	MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
	484	MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
	485	MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
	486	MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
	487	MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
	488	MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
	489	MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
	490	MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
	491	>;
	492	};
c56009b2	493	};
702bfbef VS	494
	495	gpio_leds {
	496	pinctrl_gpio_leds: gpioledsgrp {
	497	fsl,pins = <
9a060c1a	498	MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
702bfbef VS	499	>;
	500	};
	501	};
c56009b2 SG	502	};
c56009b2 SG	503
b7fb7105 SG	504	&ldb {
	505	status = "okay";
	506
	507	lvds-channel@1 {
	508	fsl,data-mapping = "spwg";
	509	fsl,data-width = <18>;
	510	status = "okay";
	511
	512	display-timings {
	513	native-mode = <&timing0>;
	514	timing0: hsd100pxn1 {
	515	clock-frequency = <65000000>;
	516	hactive = <1024>;
	517	vactive = <768>;
	518	hback-porch = <220>;
	519	hfront-porch = <40>;
	520	vback-porch = <21>;
	521	vfront-porch = <7>;
	522	hsync-len = <60>;
	523	vsync-len = <10>;
	524	};
	525	};
	526	};
	527	};
	528
9d4ebb36 MV	529	&pcie {
	530	pinctrl-names = "default";
	531	pinctrl-0 = <&pinctrl_pcie>;
9d4ebb36 MV	532	reset-gpio = <&gpio7 12 0>;
	533	status = "okay";
	534	};
	535
2f35c0c4 RP	536	&pwm1 {
2f35c0c4 RP	537	pinctrl-names = "default";
817c27a1	538	pinctrl-0 = <&pinctrl_pwm1>;
2f35c0c4 RP	539	status = "okay";
	540	};
	541
422b0676 RG	542	&snvs_poweroff {
	543	status = "okay";
	544	};
	545
48828700	546	&ssi2 {
48828700 NC	547	status = "okay";
	548	};
	549
082d33d0 SG	550	&uart1 {
082d33d0 SG	551	pinctrl-names = "default";
817c27a1	552	pinctrl-0 = <&pinctrl_uart1>;
082d33d0 SG	553	status = "okay";
	554	};
	555
	556	&usbh1 {
015fa46d	557	vbus-supply = <&reg_usb_h1_vbus>;
082d33d0 SG	558	status = "okay";
	559	};
	560
	561	&usbotg {
	562	vbus-supply = <&reg_usb_otg_vbus>;
	563	pinctrl-names = "default";
817c27a1	564	pinctrl-0 = <&pinctrl_usbotg>;
082d33d0 SG	565	disable-over-current;
	566	status = "okay";
	567	};
	568
	569	&usdhc2 {
	570	pinctrl-names = "default";
817c27a1	571	pinctrl-0 = <&pinctrl_usdhc2>;
e367817a	572	bus-width = <8>;
89c1a8cf DA	573	cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
89c1a8cf DA	574	wp-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
082d33d0 SG	575	status = "okay";
	576	};
	577
	578	&usdhc3 {
	579	pinctrl-names = "default";
817c27a1	580	pinctrl-0 = <&pinctrl_usdhc3>;
e367817a	581	bus-width = <8>;
89c1a8cf DA	582	cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
89c1a8cf DA	583	wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
082d33d0 SG	584	status = "okay";
082d33d0 SG	585	};
e02ab39a FE	586
	587	&usdhc4 {
	588	pinctrl-names = "default";
	589	pinctrl-0 = <&pinctrl_usdhc4>;
	590	bus-width = <8>;
	591	non-removable;
	592	no-1-8-v;
	593	status = "okay";
	594	};