[mirror_ubuntu-artful-kernel.git] / arch / arm / boot / dts / imx6qdl-wandboard.dtsi

/*
 * Copyright 2013 Freescale Semiconductor, Inc.
 *
 * Author: Fabio Estevam <fabio.estevam@freescale.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 */

/ {
	regulators {
		compatible = "simple-bus";

		reg_2p5v: 2p5v {
			compatible = "regulator-fixed";
			regulator-name = "2P5V";
			regulator-min-microvolt = <2500000>;
			regulator-max-microvolt = <2500000>;
			regulator-always-on;
		};

		reg_3p3v: 3p3v {
			compatible = "regulator-fixed";
			regulator-name = "3P3V";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			regulator-always-on;
		};
	};

	sound {
		compatible = "fsl,imx6-wandboard-sgtl5000",
			     "fsl,imx-audio-sgtl5000";
		model = "imx6-wandboard-sgtl5000";
		ssi-controller = <&ssi1>;
		audio-codec = <&codec>;
		audio-routing =
			"MIC_IN", "Mic Jack",
			"Mic Jack", "Mic Bias",
			"Headphone Jack", "HP_OUT";
		mux-int-port = <1>;
		mux-ext-port = <3>;
	};

	sound-spdif {
		compatible = "fsl,imx-audio-spdif";
		model = "imx-spdif";
		spdif-controller = <&spdif>;
		spdif-out;
	};
};

&audmux {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_audmux>;
	status = "okay";
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";

	codec: sgtl5000@0a {
		compatible = "fsl,sgtl5000";
		reg = <0x0a>;
		clocks = <&clks 201>;
		VDDA-supply = <&reg_2p5v>;
		VDDIO-supply = <&reg_3p3v>;
	};
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog>;

	imx6qdl-wandboard {
		pinctrl_hog: hoggrp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_0__CCM_CLKO1 	 0x130b0
				MX6QDL_PAD_GPIO_2__GPIO1_IO02	 0x80000000
				MX6QDL_PAD_EIM_DA9__GPIO3_IO09	 0x80000000
				MX6QDL_PAD_EIM_EB1__GPIO2_IO29   0x80000000 /* WL_REF_ON */
				MX6QDL_PAD_EIM_A25__GPIO5_IO02   0x80000000 /* WL_RST_N */
				MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* WL_REG_ON */
				MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* WL_HOST_WAKE */
				MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* WL_WAKE */
				MX6QDL_PAD_EIM_D29__GPIO3_IO29   0x80000000
			>;
		};

		pinctrl_audmux: audmuxgrp {
			fsl,pins = <
				MX6QDL_PAD_CSI0_DAT7__AUD3_RXD		0x80000000
				MX6QDL_PAD_CSI0_DAT4__AUD3_TXC		0x80000000
				MX6QDL_PAD_CSI0_DAT5__AUD3_TXD		0x80000000
				MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS		0x80000000
			>;
		};

		pinctrl_enet: enetgrp {
			fsl,pins = <
				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b0b0
				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b0b0
				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b0b0
				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b0b0
				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b0b0
				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b0b0
				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b0b0
				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b0b0
				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b0b0
				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b0b0
				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b0b0
				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b0b0
				MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8
			>;
		};

		pinctrl_i2c2: i2c2grp {
			fsl,pins = <
				MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
				MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
			>;
		};

		pinctrl_spdif: spdifgrp {
			fsl,pins = <
				MX6QDL_PAD_ENET_RXD0__SPDIF_OUT		0x1b0b0
			>;
		};

		pinctrl_uart1: uart1grp {
			fsl,pins = <
				MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA	0x1b0b1
				MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA	0x1b0b1
			>;
		};

		pinctrl_uart3: uart3grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1
				MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1
				MX6QDL_PAD_EIM_D23__UART3_CTS_B		0x1b0b1
				MX6QDL_PAD_EIM_EB3__UART3_RTS_B		0x1b0b1
			>;
		};

		pinctrl_usbotg: usbotggrp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059
			>;
		};

		pinctrl_usdhc1: usdhc1grp {
			fsl,pins = <
				MX6QDL_PAD_SD1_CMD__SD1_CMD		0x17059
				MX6QDL_PAD_SD1_CLK__SD1_CLK		0x10059
				MX6QDL_PAD_SD1_DAT0__SD1_DATA0		0x17059
				MX6QDL_PAD_SD1_DAT1__SD1_DATA1		0x17059
				MX6QDL_PAD_SD1_DAT2__SD1_DATA2		0x17059
				MX6QDL_PAD_SD1_DAT3__SD1_DATA3		0x17059
			>;
		};

		pinctrl_usdhc2: usdhc2grp {
			fsl,pins = <
				MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059
				MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10059
				MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059
				MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059
				MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059
				MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059
			>;
		};

		pinctrl_usdhc3: usdhc3grp {
			fsl,pins = <
				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
			>;
		};
	};
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-mode = "rgmii";
	phy-reset-gpios = <&gpio3 29 0>;
	status = "okay";
};

&spdif {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_spdif>;
	status = "okay";
};

&ssi1 {
	fsl,mode = "i2s-slave";
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	status = "okay";
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart3>;
	fsl,uart-has-rtscts;
	status = "okay";
};

&usbh1 {
	status = "okay";
};

&usbotg {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg>;
	disable-over-current;
	dr_mode = "peripheral";
	status = "okay";
};

&usdhc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc1>;
	cd-gpios = <&gpio1 2 0>;
	status = "okay";
};

&usdhc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc2>;
	non-removable;
	status = "okay";
};

&usdhc3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3>;
	cd-gpios = <&gpio3 9 0>;
	status = "okay";
};
Commit	Line	Data
2688a32f FE	1	/*
	2	* Copyright 2013 Freescale Semiconductor, Inc.
	3	*
	4	* Author: Fabio Estevam <fabio.estevam@freescale.com>
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2 as
	8	* published by the Free Software Foundation.
	9	*
	10	*/
	11
	12	/ {
	13	regulators {
	14	compatible = "simple-bus";
	15
	16	reg_2p5v: 2p5v {
	17	compatible = "regulator-fixed";
	18	regulator-name = "2P5V";
	19	regulator-min-microvolt = <2500000>;
	20	regulator-max-microvolt = <2500000>;
	21	regulator-always-on;
	22	};
	23
	24	reg_3p3v: 3p3v {
	25	compatible = "regulator-fixed";
	26	regulator-name = "3P3V";
	27	regulator-min-microvolt = <3300000>;
	28	regulator-max-microvolt = <3300000>;
	29	regulator-always-on;
	30	};
	31	};
	32
	33	sound {
	34	compatible = "fsl,imx6-wandboard-sgtl5000",
	35	"fsl,imx-audio-sgtl5000";
	36	model = "imx6-wandboard-sgtl5000";
	37	ssi-controller = <&ssi1>;
	38	audio-codec = <&codec>;
	39	audio-routing =
	40	"MIC_IN", "Mic Jack",
	41	"Mic Jack", "Mic Bias",
	42	"Headphone Jack", "HP_OUT";
	43	mux-int-port = <1>;
	44	mux-ext-port = <3>;
	45	};
c9d96df2 FE	46
	47	sound-spdif {
	48	compatible = "fsl,imx-audio-spdif";
	49	model = "imx-spdif";
	50	spdif-controller = <&spdif>;
	51	spdif-out;
	52	};
2688a32f FE	53	};
	54
	55	&audmux {
	56	pinctrl-names = "default";
817c27a1	57	pinctrl-0 = <&pinctrl_audmux>;
2688a32f FE	58	status = "okay";
	59	};
	60
	61	&i2c2 {
	62	clock-frequency = <100000>;
	63	pinctrl-names = "default";
817c27a1	64	pinctrl-0 = <&pinctrl_i2c2>;
2688a32f FE	65	status = "okay";
	66
	67	codec: sgtl5000@0a {
	68	compatible = "fsl,sgtl5000";
	69	reg = <0x0a>;
a94f8ecb	70	clocks = <&clks 201>;
2688a32f FE	71	VDDA-supply = <&reg_2p5v>;
	72	VDDIO-supply = <&reg_3p3v>;
	73	};
	74	};
	75
	76	&iomuxc {
	77	pinctrl-names = "default";
	78	pinctrl-0 = <&pinctrl_hog>;
	79
817c27a1	80	imx6qdl-wandboard {
2688a32f FE	81	pinctrl_hog: hoggrp {
2688a32f FE	82	fsl,pins = <
a338be9a TP	83	MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
	84	MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000
	85	MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x80000000
	86	MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x80000000 /* WL_REF_ON */
	87	MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000 /* WL_RST_N */
	88	MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* WL_REG_ON */
	89	MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* WL_HOST_WAKE */
	90	MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* WL_WAKE */
80121372	91	MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000
2688a32f FE	92	>;
2688a32f FE	93	};
817c27a1 SG	94
	95	pinctrl_audmux: audmuxgrp {
	96	fsl,pins = <
	97	MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x80000000
	98	MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x80000000
	99	MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x80000000
	100	MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x80000000
	101	>;
	102	};
	103
	104	pinctrl_enet: enetgrp {
	105	fsl,pins = <
	106	MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
	107	MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
	108	MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
	109	MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
	110	MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
	111	MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
	112	MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
	113	MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
	114	MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
	115	MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
	116	MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
	117	MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
	118	MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
	119	MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
	120	MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
	121	MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
	122	>;
	123	};
	124
	125	pinctrl_i2c2: i2c2grp {
	126	fsl,pins = <
	127	MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
	128	MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
	129	>;
	130	};
	131
	132	pinctrl_spdif: spdifgrp {
	133	fsl,pins = <
	134	MX6QDL_PAD_ENET_RXD0__SPDIF_OUT 0x1b0b0
	135	>;
	136	};
	137
	138	pinctrl_uart1: uart1grp {
	139	fsl,pins = <
	140	MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
	141	MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
	142	>;
	143	};
	144
	145	pinctrl_uart3: uart3grp {
	146	fsl,pins = <
	147	MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
	148	MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
	149	MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1
	150	MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1
	151	>;
	152	};
	153
	154	pinctrl_usbotg: usbotggrp {
	155	fsl,pins = <
	156	MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
	157	>;
158	};
159
160	pinctrl_usdhc1: usdhc1grp {
161	fsl,pins = <
162	MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
163	MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
164	MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
165	MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
166	MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
167	MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
168	>;
169	};
170
171	pinctrl_usdhc2: usdhc2grp {
172	fsl,pins = <
173	MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
174	MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
175	MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
176	MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
177	MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
178	MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
179	>;
180	};
181
182	pinctrl_usdhc3: usdhc3grp {
183	fsl,pins = <
184	MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
185	MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
186	MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
187	MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
188	MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
189	MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
190	>;
191	};
2688a32f FE	192	};
	193	};
	194
	195	&fec {
	196	pinctrl-names = "default";
817c27a1	197	pinctrl-0 = <&pinctrl_enet>;
2688a32f	198	phy-mode = "rgmii";
80121372	199	phy-reset-gpios = <&gpio3 29 0>;
2688a32f FE	200	status = "okay";
	201	};
	202
c9d96df2 FE	203	&spdif {
c9d96df2 FE	204	pinctrl-names = "default";
817c27a1	205	pinctrl-0 = <&pinctrl_spdif>;
c9d96df2 FE	206	status = "okay";
	207	};
	208
2688a32f FE	209	&ssi1 {
	210	fsl,mode = "i2s-slave";
	211	status = "okay";
	212	};
	213
	214	&uart1 {
	215	pinctrl-names = "default";
817c27a1	216	pinctrl-0 = <&pinctrl_uart1>;
2688a32f FE	217	status = "okay";
	218	};
	219
	220	&uart3 {
	221	pinctrl-names = "default";
817c27a1	222	pinctrl-0 = <&pinctrl_uart3>;
2688a32f FE	223	fsl,uart-has-rtscts;
	224	status = "okay";
	225	};
	226
	227	&usbh1 {
	228	status = "okay";
	229	};
	230
e9ac890a FE	231	&usbotg {
e9ac890a FE	232	pinctrl-names = "default";
817c27a1	233	pinctrl-0 = <&pinctrl_usbotg>;
e9ac890a FE	234	disable-over-current;
	235	dr_mode = "peripheral";
	236	status = "okay";
	237	};
	238
2688a32f FE	239	&usdhc1 {
2688a32f FE	240	pinctrl-names = "default";
817c27a1	241	pinctrl-0 = <&pinctrl_usdhc1>;
2688a32f FE	242	cd-gpios = <&gpio1 2 0>;
	243	status = "okay";
	244	};
	245
	246	&usdhc2 {
	247	pinctrl-names = "default";
817c27a1	248	pinctrl-0 = <&pinctrl_usdhc2>;
2688a32f FE	249	non-removable;
	250	status = "okay";
	251	};
	252
	253	&usdhc3 {
	254	pinctrl-names = "default";
817c27a1	255	pinctrl-0 = <&pinctrl_usdhc3>;
2688a32f FE	256	cd-gpios = <&gpio3 9 0>;
	257	status = "okay";
	258	};