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UBUNTU: Ubuntu-5.3.0-29.31
[mirror_ubuntu-eoan-kernel.git] / arch / arm / boot / dts / imx6sx-sdb.dtsi
CommitLineData
07a4b460
FE		 1// SPDX-License-Identifier: GPL-2.0
2//
3// Copyright (C) 2014 Freescale Semiconductor, Inc.
d2daa2f7
SG		 4
5/dts-v1/;
6
4014a4f7
AH		 7#include <dt-bindings/gpio/gpio.h>
8#include <dt-bindings/input/input.h>
d2daa2f7
SG		 9#include "imx6sx.dtsi"
10
11/ {
12 model = "Freescale i.MX6 SoloX SDB Board";
13 compatible = "fsl,imx6sx-sdb", "fsl,imx6sx";
14
15 chosen {
16 stdout-path = &uart1;
17 };
18
ad00e080 19 memory@80000000 {
216f35fe 20 device_type = "memory";
d2daa2f7
SG		 21 reg = <0x80000000 0x40000000>;
22 };
23
7caa59e0 24 backlight_display: backlight-display {
31ffdbc8
FE		 25 compatible = "pwm-backlight";
26 pwms = <&pwm3 0 5000000>;
27 brightness-levels = <0 4 8 16 32 64 128 255>;
28 default-brightness-level = <6>;
29 };
30
4014a4f7
AH		 31 gpio-keys {
32 compatible = "gpio-keys";
33 pinctrl-names = "default";
34 pinctrl-0 = <&pinctrl_gpio_keys>;
35
36 volume-up {
37 label = "Volume Up";
38 gpios = <&gpio1 18 GPIO_ACTIVE_LOW>;
39 linux,code = <KEY_VOLUMEUP>;
f5d5d2e6 40 wakeup-source;
4014a4f7
AH		 41 };
42
43 volume-down {
44 label = "Volume Down";
45 gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
46 linux,code = <KEY_VOLUMEDOWN>;
f5d5d2e6 47 wakeup-source;
4014a4f7
AH		 48 };
49 };
50
f92717f6
FE		 51 vcc_sd3: regulator-vcc-sd3 {
52 compatible = "regulator-fixed";
53 pinctrl-names = "default";
54 pinctrl-0 = <&pinctrl_vcc_sd3>;
55 regulator-name = "VCC_SD3";
56 regulator-min-microvolt = <3000000>;
57 regulator-max-microvolt = <3000000>;
58 gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
59 enable-active-high;
60 };
960fefff 61
f92717f6
FE		 62 reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
63 compatible = "regulator-fixed";
64 pinctrl-names = "default";
65 pinctrl-0 = <&pinctrl_usb_otg1>;
66 regulator-name = "usb_otg1_vbus";
67 regulator-min-microvolt = <5000000>;
68 regulator-max-microvolt = <5000000>;
69 gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
70 enable-active-high;
71 };
960fefff 72
f92717f6
FE		 73 reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
74 compatible = "regulator-fixed";
75 pinctrl-names = "default";
76 pinctrl-0 = <&pinctrl_usb_otg2>;
77 regulator-name = "usb_otg2_vbus";
78 regulator-min-microvolt = <5000000>;
79 regulator-max-microvolt = <5000000>;
80 gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
81 enable-active-high;
82 };
9c86ae8c 83
f92717f6
FE		 84 reg_psu_5v: regulator-psu-5v {
85 compatible = "regulator-fixed";
86 regulator-name = "PSU-5V0";
87 regulator-min-microvolt = <5000000>;
88 regulator-max-microvolt = <5000000>;
89 };
31ffdbc8 90
f92717f6
FE		 91 reg_lcd_3v3: regulator-lcd-3v3 {
92 compatible = "regulator-fixed";
93 regulator-name = "lcd-3v3";
94 gpio = <&gpio3 27 0>;
95 enable-active-high;
96 };
9863aba5 97
f92717f6
FE		 98 reg_peri_3v3: regulator-peri-3v3 {
99 compatible = "regulator-fixed";
100 pinctrl-names = "default";
101 pinctrl-0 = <&pinctrl_peri_3v3>;
102 regulator-name = "peri_3v3";
103 regulator-min-microvolt = <3300000>;
104 regulator-max-microvolt = <3300000>;
105 gpio = <&gpio4 16 GPIO_ACTIVE_HIGH>;
106 enable-active-high;
107 regulator-always-on;
108 };
9863aba5 109
f92717f6
FE		 110 reg_enet_3v3: regulator-enet-3v3 {
111 compatible = "regulator-fixed";
112 pinctrl-names = "default";
113 pinctrl-0 = <&pinctrl_enet_3v3>;
114 regulator-name = "enet_3v3";
115 regulator-min-microvolt = <3300000>;
116 regulator-max-microvolt = <3300000>;
1ad9fb75
LC		 117 gpio = <&gpio2 6 GPIO_ACTIVE_LOW>;
118 regulator-boot-on;
119 regulator-always-on;
9c86ae8c
FE		 120 };
121
03163470
FE		 122 reg_pcie_gpio: regulator-pcie-gpio {
123 compatible = "regulator-fixed";
124 pinctrl-names = "default";
125 pinctrl-0 = <&pinctrl_pcie_reg>;
126 regulator-name = "MPCIE_3V3";
127 regulator-min-microvolt = <3300000>;
128 regulator-max-microvolt = <3300000>;
129 gpio = <&gpio2 1 GPIO_ACTIVE_HIGH>;
130 enable-active-high;
131 };
132
7caa59e0
MF		 133 reg_lcd_5v: regulator-lcd-5v {
134 compatible = "regulator-fixed";
135 regulator-name = "lcd-5v0";
136 regulator-min-microvolt = <5000000>;
137 regulator-max-microvolt = <5000000>;
138 };
139
88dddae6
AD		 140 reg_can_en: regulator-can-en {
141 compatible = "regulator-fixed";
142 regulator-name = "can-en";
143 regulator-min-microvolt = <3300000>;
144 regulator-max-microvolt = <3300000>;
145 };
146
147 reg_can_stby: regulator-can-stby {
148 compatible = "regulator-fixed";
149 regulator-name = "can-stby";
150 regulator-min-microvolt = <3300000>;
151 regulator-max-microvolt = <3300000>;
152 };
153
9c86ae8c
FE		 154 sound {
155 compatible = "fsl,imx6sx-sdb-wm8962", "fsl,imx-audio-wm8962";
156 model = "wm8962-audio";
157 ssi-controller = <&ssi2>;
158 audio-codec = <&codec>;
159 audio-routing =
160 "Headphone Jack", "HPOUTL",
161 "Headphone Jack", "HPOUTR",
162 "Ext Spk", "SPKOUTL",
163 "Ext Spk", "SPKOUTR",
164 "AMIC", "MICBIAS",
165 "IN3R", "AMIC";
166 mux-int-port = <2>;
167 mux-ext-port = <6>;
d2daa2f7 168 };
7caa59e0
MF		 169
170 panel {
171 compatible = "sii,43wvf1g";
172 backlight = <&backlight_display>;
173 dvdd-supply = <&reg_lcd_3v3>;
174 avdd-supply = <&reg_lcd_5v>;
175
176 port {
177 panel_in: endpoint {
178 remote-endpoint = <&display_out>;
179 };
180 };
181 };
d2daa2f7
SG		 182};
183
9c86ae8c
FE		 184&audmux {
185 pinctrl-names = "default";
186 pinctrl-0 = <&pinctrl_audmux>;
187 status = "okay";
188};
189
d2daa2f7
SG		 190&fec1 {
191 pinctrl-names = "default";
192 pinctrl-0 = <&pinctrl_enet1>;
9863aba5 193 phy-supply = <&reg_enet_3v3>;
0672d22a 194 phy-mode = "rgmii-id";
3d125f9c 195 phy-handle = <&ethphy1>;
1ad9fb75 196 phy-reset-gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;
9863aba5 197 status = "okay";
3d125f9c
SA		 198
199 mdio {
200 #address-cells = <1>;
201 #size-cells = <0>;
202
9143e398
NA		 203 ethphy1: ethernet-phy@1 {
204 reg = <1>;
3d125f9c
SA		 205 };
206
9143e398
NA		 207 ethphy2: ethernet-phy@2 {
208 reg = <2>;
3d125f9c
SA		 209 };
210 };
9863aba5
FD		 211};
212
213&fec2 {
214 pinctrl-names = "default";
215 pinctrl-0 = <&pinctrl_enet2>;
d2daa2f7 216 phy-mode = "rgmii";
3d125f9c 217 phy-handle = <&ethphy2>;
d2daa2f7
SG		 218 status = "okay";
219};
220
88dddae6
AD		 221&flexcan1 {
222 pinctrl-names = "default";
223 pinctrl-0 = <&pinctrl_flexcan1>;
224 xceiver-supply = <&reg_can_stby>;
225 status = "okay";
226};
227
228&flexcan2 {
229 pinctrl-names = "default";
230 pinctrl-0 = <&pinctrl_flexcan2>;
231 xceiver-supply = <&reg_can_stby>;
232 status = "okay";
233};
234
b0e96f83
CF		 235&i2c3 {
236 clock-frequency = <100000>;
237 pinctrl-names = "default";
238 pinctrl-0 = <&pinctrl_i2c3>;
239 status = "okay";
240};
241
9c86ae8c 242&i2c4 {
46311707
JT		 243 clock-frequency = <100000>;
244 pinctrl-names = "default";
245 pinctrl-0 = <&pinctrl_i2c4>;
246 status = "okay";
9c86ae8c
FE		 247
248 codec: wm8962@1a {
249 compatible = "wlf,wm8962";
250 reg = <0x1a>;
251 clocks = <&clks IMX6SX_CLK_AUDIO>;
252 DCVDD-supply = <&vgen4_reg>;
253 DBVDD-supply = <&vgen4_reg>;
254 AVDD-supply = <&vgen4_reg>;
255 CPVDD-supply = <&vgen4_reg>;
256 MICVDD-supply = <&vgen3_reg>;
257 PLLVDD-supply = <&vgen4_reg>;
258 SPKVDD1-supply = <&reg_psu_5v>;
259 SPKVDD2-supply = <&reg_psu_5v>;
260 };
261};
262
03163470
FE		 263&pcie {
264 pinctrl-names = "default";
265 pinctrl-0 = <&pinctrl_pcie>;
266 reset-gpio = <&gpio2 0 GPIO_ACTIVE_LOW>;
267 vpcie-supply = <&reg_pcie_gpio>;
268 status = "okay";
269};
270
31ffdbc8
FE		 271&lcdif1 {
272 pinctrl-names = "default";
273 pinctrl-0 = <&pinctrl_lcd>;
31ffdbc8
FE		 274 status = "okay";
275
7caa59e0
MF		 276 port {
277 display_out: endpoint {
278 remote-endpoint = <&panel_in>;
31ffdbc8
FE		 279 };
280 };
281};
282
283&pwm3 {
284 pinctrl-names = "default";
285 pinctrl-0 = <&pinctrl_pwm3>;
286 status = "okay";
287};
288
422b0676
RG		 289&snvs_poweroff {
290 status = "okay";
291};
292
29e88b6d
FE		 293&sai1 {
294 pinctrl-names = "default";
295 pinctrl-0 = <&pinctrl_sai1>;
296 status = "disabled";
297};
298
9c86ae8c
FE		 299&ssi2 {
300 status = "okay";
301};
302
d2daa2f7
SG		 303&uart1 {
304 pinctrl-names = "default";
305 pinctrl-0 = <&pinctrl_uart1>;
306 status = "okay";
307};
308
309&uart5 { /* for bluetooth */
310 pinctrl-names = "default";
311 pinctrl-0 = <&pinctrl_uart5>;
2e7c416c 312 uart-has-rtscts;
d2daa2f7
SG		 313 status = "okay";
314};
315
960fefff
FE		 316&usbotg1 {
317 vbus-supply = <&reg_usb_otg1_vbus>;
318 pinctrl-names = "default";
319 pinctrl-0 = <&pinctrl_usb_otg1_id>;
320 status = "okay";
321};
322
323&usbotg2 {
324 vbus-supply = <&reg_usb_otg2_vbus>;
325 dr_mode = "host";
326 status = "okay";
327};
328
67cb5d52
PC		 329&usbphy1 {
330 fsl,tx-d-cal = <106>;
331};
332
333&usbphy2 {
334 fsl,tx-d-cal = <106>;
335};
336
d2daa2f7
SG		 337&usdhc2 {
338 pinctrl-names = "default";
339 pinctrl-0 = <&pinctrl_usdhc2>;
340 non-removable;
341 no-1-8-v;
342 keep-power-in-suspend;
26cefdd1 343 wakeup-source;
d2daa2f7
SG		 344 status = "okay";
345};
346
347&usdhc3 {
348 pinctrl-names = "default", "state_100mhz", "state_200mhz";
349 pinctrl-0 = <&pinctrl_usdhc3>;
350 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
351 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
352 bus-width = <8>;
89c1a8cf 353 cd-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
d2daa2f7
SG		 354 wp-gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>;
355 keep-power-in-suspend;
26cefdd1 356 wakeup-source;
d2daa2f7
SG		 357 vmmc-supply = <&vcc_sd3>;
358 status = "okay";
359};
360
361&usdhc4 {
362 pinctrl-names = "default";
363 pinctrl-0 = <&pinctrl_usdhc4>;
89c1a8cf 364 cd-gpios = <&gpio6 21 GPIO_ACTIVE_LOW>;
d2daa2f7
SG		 365 wp-gpios = <&gpio6 20 GPIO_ACTIVE_HIGH>;
366 status = "okay";
367};
368
8c4a18e2
FE		 369&wdog1 {
370 pinctrl-names = "default";
371 pinctrl-0 = <&pinctrl_wdog>;
372 fsl,ext-reset-output;
373};
374
d2daa2f7
SG		 375&iomuxc {
376 imx6x-sdb {
9c86ae8c
FE		 377 pinctrl_audmux: audmuxgrp {
378 fsl,pins = <
379 MX6SX_PAD_CSI_DATA00__AUDMUX_AUD6_TXC 0x130b0
380 MX6SX_PAD_CSI_DATA01__AUDMUX_AUD6_TXFS 0x130b0
381 MX6SX_PAD_CSI_HSYNC__AUDMUX_AUD6_TXD 0x120b0
382 MX6SX_PAD_CSI_VSYNC__AUDMUX_AUD6_RXD 0x130b0
383 MX6SX_PAD_CSI_PIXCLK__AUDMUX_MCLK 0x130b0
384 >;
385 };
386
d2daa2f7
SG		 387 pinctrl_enet1: enet1grp {
388 fsl,pins = <
389 MX6SX_PAD_ENET1_MDIO__ENET1_MDIO 0xa0b1
390 MX6SX_PAD_ENET1_MDC__ENET1_MDC 0xa0b1
391 MX6SX_PAD_RGMII1_TXC__ENET1_RGMII_TXC 0xa0b1
392 MX6SX_PAD_RGMII1_TD0__ENET1_TX_DATA_0 0xa0b1
393 MX6SX_PAD_RGMII1_TD1__ENET1_TX_DATA_1 0xa0b1
394 MX6SX_PAD_RGMII1_TD2__ENET1_TX_DATA_2 0xa0b1
395 MX6SX_PAD_RGMII1_TD3__ENET1_TX_DATA_3 0xa0b1
396 MX6SX_PAD_RGMII1_TX_CTL__ENET1_TX_EN 0xa0b1
397 MX6SX_PAD_RGMII1_RXC__ENET1_RX_CLK 0x3081
398 MX6SX_PAD_RGMII1_RD0__ENET1_RX_DATA_0 0x3081
399 MX6SX_PAD_RGMII1_RD1__ENET1_RX_DATA_1 0x3081
400 MX6SX_PAD_RGMII1_RD2__ENET1_RX_DATA_2 0x3081
401 MX6SX_PAD_RGMII1_RD3__ENET1_RX_DATA_3 0x3081
402 MX6SX_PAD_RGMII1_RX_CTL__ENET1_RX_EN 0x3081
9863aba5 403 MX6SX_PAD_ENET2_RX_CLK__ENET2_REF_CLK_25M 0x91
1ad9fb75
LC		 404 /* phy reset */
405 MX6SX_PAD_ENET2_CRS__GPIO2_IO_7 0x10b0
9863aba5
FD		 406 >;
407 };
408
409 pinctrl_enet_3v3: enet3v3grp {
410 fsl,pins = <
411 MX6SX_PAD_ENET2_COL__GPIO2_IO_6 0x80000000
412 >;
413 };
414
415 pinctrl_enet2: enet2grp {
416 fsl,pins = <
417 MX6SX_PAD_RGMII2_TXC__ENET2_RGMII_TXC 0xa0b9
418 MX6SX_PAD_RGMII2_TD0__ENET2_TX_DATA_0 0xa0b1
419 MX6SX_PAD_RGMII2_TD1__ENET2_TX_DATA_1 0xa0b1
420 MX6SX_PAD_RGMII2_TD2__ENET2_TX_DATA_2 0xa0b1
421 MX6SX_PAD_RGMII2_TD3__ENET2_TX_DATA_3 0xa0b1
422 MX6SX_PAD_RGMII2_TX_CTL__ENET2_TX_EN 0xa0b1
423 MX6SX_PAD_RGMII2_RXC__ENET2_RX_CLK 0x3081
424 MX6SX_PAD_RGMII2_RD0__ENET2_RX_DATA_0 0x3081
425 MX6SX_PAD_RGMII2_RD1__ENET2_RX_DATA_1 0x3081
426 MX6SX_PAD_RGMII2_RD2__ENET2_RX_DATA_2 0x3081
427 MX6SX_PAD_RGMII2_RD3__ENET2_RX_DATA_3 0x3081
428 MX6SX_PAD_RGMII2_RX_CTL__ENET2_RX_EN 0x3081
d2daa2f7
SG		 429 >;
430 };
431
88dddae6
AD		 432 pinctrl_flexcan1: flexcan1grp {
433 fsl,pins = <
434 MX6SX_PAD_QSPI1B_DQS__CAN1_TX 0x1b020
435 MX6SX_PAD_QSPI1A_SS1_B__CAN1_RX 0x1b020
436 >;
437 };
438
439 pinctrl_flexcan2: flexcan2grp {
440 fsl,pins = <
441 MX6SX_PAD_QSPI1B_SS1_B__CAN2_RX 0x1b020
442 MX6SX_PAD_QSPI1A_DQS__CAN2_TX 0x1b020
443 >;
444 };
445
4014a4f7
AH		 446 pinctrl_gpio_keys: gpio_keysgrp {
447 fsl,pins = <
448 MX6SX_PAD_CSI_DATA04__GPIO1_IO_18 0x17059
449 MX6SX_PAD_CSI_DATA05__GPIO1_IO_19 0x17059
450 >;
451 };
452
b3d8e11f
FE		 453 pinctrl_i2c1: i2c1grp {
454 fsl,pins = <
455 MX6SX_PAD_GPIO1_IO01__I2C1_SDA 0x4001b8b1
456 MX6SX_PAD_GPIO1_IO00__I2C1_SCL 0x4001b8b1
457 >;
458 };
459
b0e96f83
CF		 460 pinctrl_i2c3: i2c3grp {
461 fsl,pins = <
462 MX6SX_PAD_KEY_ROW4__I2C3_SDA 0x4001b8b1
463 MX6SX_PAD_KEY_COL4__I2C3_SCL 0x4001b8b1
464 >;
465 };
466
9c86ae8c
FE		 467 pinctrl_i2c4: i2c4grp {
468 fsl,pins = <
469 MX6SX_PAD_CSI_DATA07__I2C4_SDA 0x4001b8b1
470 MX6SX_PAD_CSI_DATA06__I2C4_SCL 0x4001b8b1
471 >;
472 };
473
31ffdbc8
FE		 474 pinctrl_lcd: lcdgrp {
475 fsl,pins = <
476 MX6SX_PAD_LCD1_DATA00__LCDIF1_DATA_0 0x4001b0b0
477 MX6SX_PAD_LCD1_DATA01__LCDIF1_DATA_1 0x4001b0b0
478 MX6SX_PAD_LCD1_DATA02__LCDIF1_DATA_2 0x4001b0b0
479 MX6SX_PAD_LCD1_DATA03__LCDIF1_DATA_3 0x4001b0b0
480 MX6SX_PAD_LCD1_DATA04__LCDIF1_DATA_4 0x4001b0b0
481 MX6SX_PAD_LCD1_DATA05__LCDIF1_DATA_5 0x4001b0b0
482 MX6SX_PAD_LCD1_DATA06__LCDIF1_DATA_6 0x4001b0b0
483 MX6SX_PAD_LCD1_DATA07__LCDIF1_DATA_7 0x4001b0b0
484 MX6SX_PAD_LCD1_DATA08__LCDIF1_DATA_8 0x4001b0b0
485 MX6SX_PAD_LCD1_DATA09__LCDIF1_DATA_9 0x4001b0b0
486 MX6SX_PAD_LCD1_DATA10__LCDIF1_DATA_10 0x4001b0b0
487 MX6SX_PAD_LCD1_DATA11__LCDIF1_DATA_11 0x4001b0b0
488 MX6SX_PAD_LCD1_DATA12__LCDIF1_DATA_12 0x4001b0b0
489 MX6SX_PAD_LCD1_DATA13__LCDIF1_DATA_13 0x4001b0b0
490 MX6SX_PAD_LCD1_DATA14__LCDIF1_DATA_14 0x4001b0b0
491 MX6SX_PAD_LCD1_DATA15__LCDIF1_DATA_15 0x4001b0b0
492 MX6SX_PAD_LCD1_DATA16__LCDIF1_DATA_16 0x4001b0b0
493 MX6SX_PAD_LCD1_DATA17__LCDIF1_DATA_17 0x4001b0b0
494 MX6SX_PAD_LCD1_DATA18__LCDIF1_DATA_18 0x4001b0b0
495 MX6SX_PAD_LCD1_DATA19__LCDIF1_DATA_19 0x4001b0b0
496 MX6SX_PAD_LCD1_DATA20__LCDIF1_DATA_20 0x4001b0b0
497 MX6SX_PAD_LCD1_DATA21__LCDIF1_DATA_21 0x4001b0b0
498 MX6SX_PAD_LCD1_DATA22__LCDIF1_DATA_22 0x4001b0b0
499 MX6SX_PAD_LCD1_DATA23__LCDIF1_DATA_23 0x4001b0b0
500 MX6SX_PAD_LCD1_CLK__LCDIF1_CLK 0x4001b0b0
501 MX6SX_PAD_LCD1_ENABLE__LCDIF1_ENABLE 0x4001b0b0
502 MX6SX_PAD_LCD1_VSYNC__LCDIF1_VSYNC 0x4001b0b0
503 MX6SX_PAD_LCD1_HSYNC__LCDIF1_HSYNC 0x4001b0b0
504 MX6SX_PAD_LCD1_RESET__GPIO3_IO_27 0x4001b0b0
505 >;
506 };
507
03163470
FE		 508 pinctrl_pcie: pciegrp {
509 fsl,pins = <
510 MX6SX_PAD_ENET1_COL__GPIO2_IO_0 0x10b0
511 >;
512 };
513
514 pinctrl_pcie_reg: pciereggrp {
515 fsl,pins = <
516 MX6SX_PAD_ENET1_CRS__GPIO2_IO_1 0x10b0
517 >;
518 };
519
9863aba5
FD		 520 pinctrl_peri_3v3: peri3v3grp {
521 fsl,pins = <
522 MX6SX_PAD_QSPI1A_DATA0__GPIO4_IO_16 0x80000000
523 >;
524 };
525
31ffdbc8
FE		 526 pinctrl_pwm3: pwm3grp-1 {
527 fsl,pins = <
528 MX6SX_PAD_SD1_DATA2__PWM3_OUT 0x110b0
529 >;
530 };
531
c565e146
FE		 532 pinctrl_qspi2: qspi2grp {
533 fsl,pins = <
534 MX6SX_PAD_NAND_WP_B__QSPI2_A_DATA_0 0x70f1
535 MX6SX_PAD_NAND_READY_B__QSPI2_A_DATA_1 0x70f1
536 MX6SX_PAD_NAND_CE0_B__QSPI2_A_DATA_2 0x70f1
537 MX6SX_PAD_NAND_CE1_B__QSPI2_A_DATA_3 0x70f1
538 MX6SX_PAD_NAND_CLE__QSPI2_A_SCLK 0x70f1
539 MX6SX_PAD_NAND_ALE__QSPI2_A_SS0_B 0x70f1
540 MX6SX_PAD_NAND_DATA01__QSPI2_B_DATA_0 0x70f1
541 MX6SX_PAD_NAND_DATA00__QSPI2_B_DATA_1 0x70f1
542 MX6SX_PAD_NAND_WE_B__QSPI2_B_DATA_2 0x70f1
543 MX6SX_PAD_NAND_RE_B__QSPI2_B_DATA_3 0x70f1
544 MX6SX_PAD_NAND_DATA02__QSPI2_B_SCLK 0x70f1
545 MX6SX_PAD_NAND_DATA03__QSPI2_B_SS0_B 0x70f1
546 >;
547 };
548
d2daa2f7
SG		 549 pinctrl_vcc_sd3: vccsd3grp {
550 fsl,pins = <
551 MX6SX_PAD_KEY_COL1__GPIO2_IO_11 0x17059
552 >;
553 };
554
29e88b6d
FE		 555 pinctrl_sai1: sai1grp {
556 fsl,pins = <
557 MX6SX_PAD_CSI_DATA00__SAI1_TX_BCLK 0x130b0
558 MX6SX_PAD_CSI_DATA01__SAI1_TX_SYNC 0x130b0
559 MX6SX_PAD_CSI_HSYNC__SAI1_TX_DATA_0 0x120b0
560 MX6SX_PAD_CSI_VSYNC__SAI1_RX_DATA_0 0x130b0
561 MX6SX_PAD_CSI_PIXCLK__AUDMUX_MCLK 0x130b0
562 >;
563 };
564
d2daa2f7
SG		 565 pinctrl_uart1: uart1grp {
566 fsl,pins = <
567 MX6SX_PAD_GPIO1_IO04__UART1_TX 0x1b0b1
568 MX6SX_PAD_GPIO1_IO05__UART1_RX 0x1b0b1
569 >;
570 };
571
572 pinctrl_uart5: uart5grp {
573 fsl,pins = <
574 MX6SX_PAD_KEY_ROW3__UART5_RX 0x1b0b1
575 MX6SX_PAD_KEY_COL3__UART5_TX 0x1b0b1
576 MX6SX_PAD_KEY_ROW2__UART5_CTS_B 0x1b0b1
577 MX6SX_PAD_KEY_COL2__UART5_RTS_B 0x1b0b1
578 >;
579 };
580
960fefff
FE		 581 pinctrl_usb_otg1: usbotg1grp {
582 fsl,pins = <
583 MX6SX_PAD_GPIO1_IO09__GPIO1_IO_9 0x10b0
584 >;
585 };
586
587 pinctrl_usb_otg1_id: usbotg1idgrp {
588 fsl,pins = <
589 MX6SX_PAD_GPIO1_IO10__ANATOP_OTG1_ID 0x17059
590 >;
591 };
592
593 pinctrl_usb_otg2: usbot2ggrp {
594 fsl,pins = <
595 MX6SX_PAD_GPIO1_IO12__GPIO1_IO_12 0x10b0
596 >;
597 };
598
d2daa2f7
SG		 599 pinctrl_usdhc2: usdhc2grp {
600 fsl,pins = <
601 MX6SX_PAD_SD2_CMD__USDHC2_CMD 0x17059
602 MX6SX_PAD_SD2_CLK__USDHC2_CLK 0x10059
603 MX6SX_PAD_SD2_DATA0__USDHC2_DATA0 0x17059
604 MX6SX_PAD_SD2_DATA1__USDHC2_DATA1 0x17059
605 MX6SX_PAD_SD2_DATA2__USDHC2_DATA2 0x17059
606 MX6SX_PAD_SD2_DATA3__USDHC2_DATA3 0x17059
607 >;
608 };
609
610 pinctrl_usdhc3: usdhc3grp {
611 fsl,pins = <
612 MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x17059
613 MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x10059
614 MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x17059
615 MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x17059
616 MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x17059
617 MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x17059
618 MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x17059
619 MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x17059
620 MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x17059
621 MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x17059
622 MX6SX_PAD_KEY_COL0__GPIO2_IO_10 0x17059 /* CD */
623 MX6SX_PAD_KEY_ROW0__GPIO2_IO_15 0x17059 /* WP */
624 >;
625 };
626
627 pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {
628 fsl,pins = <
629 MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x170b9
630 MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x100b9
631 MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x170b9
632 MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x170b9
633 MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x170b9
634 MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x170b9
635 MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x170b9
636 MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x170b9
637 MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x170b9
638 MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x170b9
639 >;
640 };
641
642 pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {
643 fsl,pins = <
644 MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x170f9
645 MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x100f9
646 MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x170f9
647 MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x170f9
648 MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x170f9
649 MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x170f9
650 MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x170f9
651 MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x170f9
652 MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x170f9
653 MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x170f9
654 >;
655 };
656
657 pinctrl_usdhc4: usdhc4grp {
658 fsl,pins = <
659 MX6SX_PAD_SD4_CMD__USDHC4_CMD 0x17059
660 MX6SX_PAD_SD4_CLK__USDHC4_CLK 0x10059
661 MX6SX_PAD_SD4_DATA0__USDHC4_DATA0 0x17059
662 MX6SX_PAD_SD4_DATA1__USDHC4_DATA1 0x17059
663 MX6SX_PAD_SD4_DATA2__USDHC4_DATA2 0x17059
664 MX6SX_PAD_SD4_DATA3__USDHC4_DATA3 0x17059
665 MX6SX_PAD_SD4_DATA7__GPIO6_IO_21 0x17059 /* CD */
666 MX6SX_PAD_SD4_DATA6__GPIO6_IO_20 0x17059 /* WP */
667 >;
668 };
8c4a18e2
FE		 669
670 pinctrl_wdog: wdoggrp {
671 fsl,pins = <
672 MX6SX_PAD_GPIO1_IO13__WDOG1_WDOG_ANY 0x30b0
673 >;
674 };
d2daa2f7
SG		 675 };
676};
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