]>
Commit | Line | Data |
---|---|---|
d5e9fe84 SS |
1 | /* |
2 | * Copyright 2013 Texas Instruments, Inc. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 as | |
6 | * published by the Free Software Foundation. | |
7 | */ | |
8 | ||
eb788f43 SS |
9 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
10 | ||
226d1c5b | 11 | #include "skeleton.dtsi" |
d5e9fe84 SS |
12 | |
13 | / { | |
14 | model = "Texas Instruments Keystone 2 SoC"; | |
d5e9fe84 SS |
15 | #address-cells = <2>; |
16 | #size-cells = <2>; | |
17 | interrupt-parent = <&gic>; | |
18 | ||
19 | aliases { | |
20 | serial0 = &uart0; | |
21 | }; | |
22 | ||
23 | memory { | |
24 | reg = <0x00000000 0x80000000 0x00000000 0x40000000>; | |
25 | }; | |
26 | ||
27 | cpus { | |
28 | #address-cells = <1>; | |
29 | #size-cells = <0>; | |
30 | ||
31 | interrupt-parent = <&gic>; | |
32 | ||
33 | cpu@0 { | |
34 | compatible = "arm,cortex-a15"; | |
35 | device_type = "cpu"; | |
36 | reg = <0>; | |
37 | }; | |
38 | ||
39 | cpu@1 { | |
40 | compatible = "arm,cortex-a15"; | |
41 | device_type = "cpu"; | |
42 | reg = <1>; | |
43 | }; | |
44 | ||
45 | cpu@2 { | |
46 | compatible = "arm,cortex-a15"; | |
47 | device_type = "cpu"; | |
48 | reg = <2>; | |
49 | }; | |
50 | ||
51 | cpu@3 { | |
52 | compatible = "arm,cortex-a15"; | |
53 | device_type = "cpu"; | |
54 | reg = <3>; | |
55 | }; | |
56 | }; | |
57 | ||
58 | gic: interrupt-controller { | |
59 | compatible = "arm,cortex-a15-gic"; | |
60 | #interrupt-cells = <3>; | |
61 | #size-cells = <0>; | |
62 | #address-cells = <1>; | |
63 | interrupt-controller; | |
64 | reg = <0x0 0x02561000 0x0 0x1000>, | |
65 | <0x0 0x02562000 0x0 0x2000>; | |
66 | }; | |
67 | ||
68 | timer { | |
69 | compatible = "arm,armv7-timer"; | |
eb788f43 SS |
70 | interrupts = |
71 | <GIC_PPI 13 | |
72 | (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, | |
73 | <GIC_PPI 14 | |
74 | (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, | |
75 | <GIC_PPI 11 | |
76 | (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, | |
77 | <GIC_PPI 10 | |
78 | (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; | |
d5e9fe84 SS |
79 | }; |
80 | ||
81 | pmu { | |
82 | compatible = "arm,cortex-a15-pmu"; | |
eb788f43 SS |
83 | interrupts = <GIC_SPI 20 IRQ_TYPE_EDGE_RISING>, |
84 | <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>, | |
85 | <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>, | |
86 | <GIC_SPI 23 IRQ_TYPE_EDGE_RISING>; | |
d5e9fe84 SS |
87 | }; |
88 | ||
89 | soc { | |
90 | #address-cells = <1>; | |
91 | #size-cells = <1>; | |
92 | compatible = "ti,keystone","simple-bus"; | |
93 | interrupt-parent = <&gic>; | |
94 | ranges = <0x0 0x0 0x0 0xc0000000>; | |
95 | ||
96 | rstctrl: reset-controller { | |
97 | compatible = "ti,keystone-reset"; | |
98 | reg = <0x023100e8 4>; /* pll reset control reg */ | |
99 | }; | |
100 | ||
feeea8f3 SS |
101 | /include/ "keystone-clocks.dtsi" |
102 | ||
d5e9fe84 SS |
103 | uart0: serial@02530c00 { |
104 | compatible = "ns16550a"; | |
105 | current-speed = <115200>; | |
106 | reg-shift = <2>; | |
107 | reg-io-width = <4>; | |
108 | reg = <0x02530c00 0x100>; | |
f023bd10 | 109 | clocks = <&clkuart0>; |
eb788f43 | 110 | interrupts = <GIC_SPI 277 IRQ_TYPE_EDGE_RISING>; |
d5e9fe84 SS |
111 | }; |
112 | ||
113 | uart1: serial@02531000 { | |
114 | compatible = "ns16550a"; | |
115 | current-speed = <115200>; | |
116 | reg-shift = <2>; | |
117 | reg-io-width = <4>; | |
118 | reg = <0x02531000 0x100>; | |
f023bd10 | 119 | clocks = <&clkuart1>; |
eb788f43 | 120 | interrupts = <GIC_SPI 280 IRQ_TYPE_EDGE_RISING>; |
d5e9fe84 SS |
121 | }; |
122 | ||
6120ac23 SS |
123 | i2c0: i2c@2530000 { |
124 | compatible = "ti,davinci-i2c"; | |
125 | reg = <0x02530000 0x400>; | |
126 | clock-frequency = <100000>; | |
127 | clocks = <&clki2c>; | |
128 | interrupts = <GIC_SPI 283 IRQ_TYPE_EDGE_RISING>; | |
129 | #address-cells = <1>; | |
130 | #size-cells = <0>; | |
131 | ||
132 | dtt@50 { | |
133 | compatible = "at,24c1024"; | |
134 | reg = <0x50>; | |
135 | }; | |
136 | }; | |
137 | ||
138 | i2c1: i2c@2530400 { | |
139 | compatible = "ti,davinci-i2c"; | |
140 | reg = <0x02530400 0x400>; | |
141 | clock-frequency = <100000>; | |
142 | clocks = <&clki2c>; | |
143 | interrupts = <GIC_SPI 286 IRQ_TYPE_EDGE_RISING>; | |
144 | }; | |
145 | ||
146 | i2c2: i2c@2530800 { | |
147 | compatible = "ti,davinci-i2c"; | |
148 | reg = <0x02530800 0x400>; | |
149 | clock-frequency = <100000>; | |
150 | clocks = <&clki2c>; | |
151 | interrupts = <GIC_SPI 289 IRQ_TYPE_EDGE_RISING>; | |
152 | }; | |
b3bd6c59 SS |
153 | |
154 | spi0: spi@21000400 { | |
155 | compatible = "ti,dm6441-spi"; | |
156 | reg = <0x21000400 0x200>; | |
157 | num-cs = <4>; | |
158 | ti,davinci-spi-intr-line = <0>; | |
159 | interrupts = <GIC_SPI 292 IRQ_TYPE_EDGE_RISING>; | |
160 | clocks = <&clkspi>; | |
161 | }; | |
162 | ||
163 | spi1: spi@21000600 { | |
164 | compatible = "ti,dm6441-spi"; | |
165 | reg = <0x21000600 0x200>; | |
166 | num-cs = <4>; | |
167 | ti,davinci-spi-intr-line = <0>; | |
168 | interrupts = <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>; | |
169 | clocks = <&clkspi>; | |
170 | }; | |
171 | ||
172 | spi2: spi@21000800 { | |
173 | compatible = "ti,dm6441-spi"; | |
174 | reg = <0x21000800 0x200>; | |
175 | num-cs = <4>; | |
176 | ti,davinci-spi-intr-line = <0>; | |
177 | interrupts = <GIC_SPI 300 IRQ_TYPE_EDGE_RISING>; | |
178 | clocks = <&clkspi>; | |
179 | }; | |
d5e9fe84 SS |
180 | }; |
181 | }; |