]>
Commit | Line | Data |
---|---|---|
d5e9fe84 SS |
1 | /* |
2 | * Copyright 2013 Texas Instruments, Inc. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 as | |
6 | * published by the Free Software Foundation. | |
7 | */ | |
8 | ||
eb788f43 | 9 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
970c2256 | 10 | #include <dt-bindings/gpio/gpio.h> |
eb788f43 | 11 | |
226d1c5b | 12 | #include "skeleton.dtsi" |
d5e9fe84 SS |
13 | |
14 | / { | |
15 | model = "Texas Instruments Keystone 2 SoC"; | |
d5e9fe84 SS |
16 | #address-cells = <2>; |
17 | #size-cells = <2>; | |
18 | interrupt-parent = <&gic>; | |
19 | ||
20 | aliases { | |
21 | serial0 = &uart0; | |
22 | }; | |
23 | ||
24 | memory { | |
25 | reg = <0x00000000 0x80000000 0x00000000 0x40000000>; | |
26 | }; | |
27 | ||
d5e9fe84 SS |
28 | gic: interrupt-controller { |
29 | compatible = "arm,cortex-a15-gic"; | |
30 | #interrupt-cells = <3>; | |
d5e9fe84 SS |
31 | interrupt-controller; |
32 | reg = <0x0 0x02561000 0x0 0x1000>, | |
a18b4aa2 SS |
33 | <0x0 0x02562000 0x0 0x2000>, |
34 | <0x0 0x02564000 0x0 0x1000>, | |
35 | <0x0 0x02566000 0x0 0x2000>; | |
0ee15444 SS |
36 | interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | |
37 | IRQ_TYPE_LEVEL_HIGH)>; | |
d5e9fe84 SS |
38 | }; |
39 | ||
40 | timer { | |
41 | compatible = "arm,armv7-timer"; | |
eb788f43 SS |
42 | interrupts = |
43 | <GIC_PPI 13 | |
44 | (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, | |
45 | <GIC_PPI 14 | |
46 | (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, | |
47 | <GIC_PPI 11 | |
48 | (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, | |
49 | <GIC_PPI 10 | |
50 | (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; | |
d5e9fe84 SS |
51 | }; |
52 | ||
53 | pmu { | |
54 | compatible = "arm,cortex-a15-pmu"; | |
eb788f43 SS |
55 | interrupts = <GIC_SPI 20 IRQ_TYPE_EDGE_RISING>, |
56 | <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>, | |
57 | <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>, | |
58 | <GIC_SPI 23 IRQ_TYPE_EDGE_RISING>; | |
d5e9fe84 SS |
59 | }; |
60 | ||
61 | soc { | |
62 | #address-cells = <1>; | |
63 | #size-cells = <1>; | |
64 | compatible = "ti,keystone","simple-bus"; | |
65 | interrupt-parent = <&gic>; | |
66 | ranges = <0x0 0x0 0x0 0xc0000000>; | |
4d46596d | 67 | dma-ranges = <0x80000000 0x8 0x00000000 0x80000000>; |
d5e9fe84 | 68 | |
ded79beb IK |
69 | pllctrl: pll-controller@02310000 { |
70 | compatible = "ti,keystone-pllctrl", "syscon"; | |
71 | reg = <0x02310000 0x200>; | |
72 | }; | |
73 | ||
74 | devctrl: device-state-control@02620000 { | |
75 | compatible = "ti,keystone-devctrl", "syscon"; | |
76 | reg = <0x02620000 0x1000>; | |
77 | }; | |
78 | ||
d5e9fe84 SS |
79 | rstctrl: reset-controller { |
80 | compatible = "ti,keystone-reset"; | |
ded79beb IK |
81 | ti,syscon-pll = <&pllctrl 0xe4>; |
82 | ti,syscon-dev = <&devctrl 0x328>; | |
83 | ti,wdt-list = <0>; | |
d5e9fe84 SS |
84 | }; |
85 | ||
feeea8f3 SS |
86 | /include/ "keystone-clocks.dtsi" |
87 | ||
d5e9fe84 SS |
88 | uart0: serial@02530c00 { |
89 | compatible = "ns16550a"; | |
90 | current-speed = <115200>; | |
91 | reg-shift = <2>; | |
92 | reg-io-width = <4>; | |
93 | reg = <0x02530c00 0x100>; | |
f023bd10 | 94 | clocks = <&clkuart0>; |
eb788f43 | 95 | interrupts = <GIC_SPI 277 IRQ_TYPE_EDGE_RISING>; |
d5e9fe84 SS |
96 | }; |
97 | ||
98 | uart1: serial@02531000 { | |
99 | compatible = "ns16550a"; | |
100 | current-speed = <115200>; | |
101 | reg-shift = <2>; | |
102 | reg-io-width = <4>; | |
103 | reg = <0x02531000 0x100>; | |
f023bd10 | 104 | clocks = <&clkuart1>; |
eb788f43 | 105 | interrupts = <GIC_SPI 280 IRQ_TYPE_EDGE_RISING>; |
d5e9fe84 SS |
106 | }; |
107 | ||
6120ac23 SS |
108 | i2c0: i2c@2530000 { |
109 | compatible = "ti,davinci-i2c"; | |
110 | reg = <0x02530000 0x400>; | |
111 | clock-frequency = <100000>; | |
112 | clocks = <&clki2c>; | |
113 | interrupts = <GIC_SPI 283 IRQ_TYPE_EDGE_RISING>; | |
114 | #address-cells = <1>; | |
115 | #size-cells = <0>; | |
6120ac23 SS |
116 | }; |
117 | ||
118 | i2c1: i2c@2530400 { | |
119 | compatible = "ti,davinci-i2c"; | |
120 | reg = <0x02530400 0x400>; | |
121 | clock-frequency = <100000>; | |
122 | clocks = <&clki2c>; | |
123 | interrupts = <GIC_SPI 286 IRQ_TYPE_EDGE_RISING>; | |
3953505a GS |
124 | #address-cells = <1>; |
125 | #size-cells = <0>; | |
6120ac23 SS |
126 | }; |
127 | ||
128 | i2c2: i2c@2530800 { | |
129 | compatible = "ti,davinci-i2c"; | |
130 | reg = <0x02530800 0x400>; | |
131 | clock-frequency = <100000>; | |
132 | clocks = <&clki2c>; | |
133 | interrupts = <GIC_SPI 289 IRQ_TYPE_EDGE_RISING>; | |
3953505a GS |
134 | #address-cells = <1>; |
135 | #size-cells = <0>; | |
6120ac23 | 136 | }; |
b3bd6c59 SS |
137 | |
138 | spi0: spi@21000400 { | |
139 | compatible = "ti,dm6441-spi"; | |
140 | reg = <0x21000400 0x200>; | |
141 | num-cs = <4>; | |
142 | ti,davinci-spi-intr-line = <0>; | |
143 | interrupts = <GIC_SPI 292 IRQ_TYPE_EDGE_RISING>; | |
144 | clocks = <&clkspi>; | |
509046a7 GS |
145 | #address-cells = <1>; |
146 | #size-cells = <0>; | |
b3bd6c59 SS |
147 | }; |
148 | ||
149 | spi1: spi@21000600 { | |
150 | compatible = "ti,dm6441-spi"; | |
151 | reg = <0x21000600 0x200>; | |
152 | num-cs = <4>; | |
153 | ti,davinci-spi-intr-line = <0>; | |
154 | interrupts = <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>; | |
155 | clocks = <&clkspi>; | |
509046a7 GS |
156 | #address-cells = <1>; |
157 | #size-cells = <0>; | |
b3bd6c59 SS |
158 | }; |
159 | ||
160 | spi2: spi@21000800 { | |
161 | compatible = "ti,dm6441-spi"; | |
162 | reg = <0x21000800 0x200>; | |
163 | num-cs = <4>; | |
164 | ti,davinci-spi-intr-line = <0>; | |
165 | interrupts = <GIC_SPI 300 IRQ_TYPE_EDGE_RISING>; | |
166 | clocks = <&clkspi>; | |
509046a7 GS |
167 | #address-cells = <1>; |
168 | #size-cells = <0>; | |
b3bd6c59 | 169 | }; |
08c36762 WK |
170 | |
171 | usb_phy: usb_phy@2620738 { | |
172 | compatible = "ti,keystone-usbphy"; | |
173 | #address-cells = <1>; | |
174 | #size-cells = <1>; | |
cfb198ce | 175 | reg = <0x2620738 24>; |
08c36762 WK |
176 | status = "disabled"; |
177 | }; | |
73207956 WK |
178 | |
179 | usb: usb@2680000 { | |
180 | compatible = "ti,keystone-dwc3"; | |
181 | #address-cells = <1>; | |
182 | #size-cells = <1>; | |
183 | reg = <0x2680000 0x10000>; | |
184 | clocks = <&clkusb>; | |
185 | clock-names = "usb"; | |
186 | interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>; | |
187 | ranges; | |
86156978 SS |
188 | dma-coherent; |
189 | dma-ranges; | |
73207956 WK |
190 | status = "disabled"; |
191 | ||
192 | dwc3@2690000 { | |
193 | compatible = "synopsys,dwc3"; | |
194 | reg = <0x2690000 0x70000>; | |
195 | interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>; | |
196 | usb-phy = <&usb_phy>, <&usb_phy>; | |
197 | }; | |
198 | }; | |
20d89313 IK |
199 | |
200 | wdt: wdt@022f0080 { | |
201 | compatible = "ti,keystone-wdt","ti,davinci-wdt"; | |
202 | reg = <0x022f0080 0x80>; | |
203 | clocks = <&clkwdtimer0>; | |
204 | }; | |
2b4f76b6 IK |
205 | |
206 | clock_event: timer@22f0000 { | |
207 | compatible = "ti,keystone-timer"; | |
208 | reg = <0x022f0000 0x80>; | |
209 | interrupts = <GIC_SPI 110 IRQ_TYPE_EDGE_RISING>; | |
210 | clocks = <&clktimer15>; | |
211 | }; | |
970c2256 GS |
212 | |
213 | gpio0: gpio@260bf00 { | |
214 | compatible = "ti,keystone-gpio"; | |
215 | reg = <0x0260bf00 0x100>; | |
216 | gpio-controller; | |
217 | #gpio-cells = <2>; | |
218 | /* HW Interrupts mapped to GPIO pins */ | |
219 | interrupts = <GIC_SPI 120 IRQ_TYPE_EDGE_RISING>, | |
220 | <GIC_SPI 121 IRQ_TYPE_EDGE_RISING>, | |
221 | <GIC_SPI 122 IRQ_TYPE_EDGE_RISING>, | |
222 | <GIC_SPI 123 IRQ_TYPE_EDGE_RISING>, | |
223 | <GIC_SPI 124 IRQ_TYPE_EDGE_RISING>, | |
224 | <GIC_SPI 125 IRQ_TYPE_EDGE_RISING>, | |
225 | <GIC_SPI 126 IRQ_TYPE_EDGE_RISING>, | |
226 | <GIC_SPI 127 IRQ_TYPE_EDGE_RISING>, | |
227 | <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>, | |
228 | <GIC_SPI 129 IRQ_TYPE_EDGE_RISING>, | |
229 | <GIC_SPI 130 IRQ_TYPE_EDGE_RISING>, | |
230 | <GIC_SPI 131 IRQ_TYPE_EDGE_RISING>, | |
231 | <GIC_SPI 132 IRQ_TYPE_EDGE_RISING>, | |
232 | <GIC_SPI 133 IRQ_TYPE_EDGE_RISING>, | |
233 | <GIC_SPI 134 IRQ_TYPE_EDGE_RISING>, | |
234 | <GIC_SPI 135 IRQ_TYPE_EDGE_RISING>, | |
235 | <GIC_SPI 136 IRQ_TYPE_EDGE_RISING>, | |
236 | <GIC_SPI 137 IRQ_TYPE_EDGE_RISING>, | |
237 | <GIC_SPI 138 IRQ_TYPE_EDGE_RISING>, | |
238 | <GIC_SPI 139 IRQ_TYPE_EDGE_RISING>, | |
239 | <GIC_SPI 140 IRQ_TYPE_EDGE_RISING>, | |
240 | <GIC_SPI 141 IRQ_TYPE_EDGE_RISING>, | |
241 | <GIC_SPI 142 IRQ_TYPE_EDGE_RISING>, | |
242 | <GIC_SPI 143 IRQ_TYPE_EDGE_RISING>, | |
243 | <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>, | |
244 | <GIC_SPI 145 IRQ_TYPE_EDGE_RISING>, | |
245 | <GIC_SPI 146 IRQ_TYPE_EDGE_RISING>, | |
246 | <GIC_SPI 147 IRQ_TYPE_EDGE_RISING>, | |
247 | <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>, | |
248 | <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>, | |
249 | <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>, | |
250 | <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>; | |
251 | clocks = <&clkgpio>; | |
252 | clock-names = "gpio"; | |
253 | ti,ngpio = <32>; | |
254 | ti,davinci-gpio-unbanked = <32>; | |
255 | }; | |
82c04f71 IK |
256 | |
257 | aemif: aemif@21000A00 { | |
258 | compatible = "ti,keystone-aemif", "ti,davinci-aemif"; | |
259 | #address-cells = <2>; | |
260 | #size-cells = <1>; | |
261 | clocks = <&clkaemif>; | |
262 | clock-names = "aemif"; | |
263 | clock-ranges; | |
264 | ||
265 | reg = <0x21000A00 0x00000100>; | |
266 | ranges = <0 0 0x30000000 0x10000000 | |
267 | 1 0 0x21000A00 0x00000100>; | |
268 | }; | |
979c36c8 GS |
269 | |
270 | mdio: mdio@02090300 { | |
271 | compatible = "ti,keystone_mdio", "ti,davinci_mdio"; | |
272 | #address-cells = <1>; | |
273 | #size-cells = <0>; | |
274 | reg = <0x02090300 0x100>; | |
275 | status = "disabled"; | |
276 | clocks = <&clkpa>; | |
277 | clock-names = "fck"; | |
278 | bus_freq = <2500000>; | |
279 | }; | |
a392d42d GS |
280 | |
281 | kirq0: keystone_irq@26202a0 { | |
282 | compatible = "ti,keystone-irq"; | |
283 | interrupts = <GIC_SPI 4 IRQ_TYPE_EDGE_RISING>; | |
284 | interrupt-controller; | |
285 | #interrupt-cells = <1>; | |
286 | ti,syscon-dev = <&devctrl 0x2a0>; | |
287 | }; | |
bed80507 MK |
288 | |
289 | pcie@21800000 { | |
290 | compatible = "ti,keystone-pcie", "snps,dw-pcie"; | |
291 | clocks = <&clkpcie>; | |
292 | clock-names = "pcie"; | |
293 | #address-cells = <3>; | |
294 | #size-cells = <2>; | |
295 | reg = <0x21801000 0x2000>, <0x21800000 0x1000>, <0x02620128 4>; | |
296 | ranges = <0x81000000 0 0 0x23250000 0 0x4000 | |
297 | 0x82000000 0 0x50000000 0x50000000 0 0x10000000>; | |
298 | ||
9dd4f28f | 299 | status = "disabled"; |
bed80507 MK |
300 | device_type = "pci"; |
301 | num-lanes = <2>; | |
302 | ||
303 | #interrupt-cells = <1>; | |
304 | interrupt-map-mask = <0 0 0 7>; | |
305 | interrupt-map = <0 0 0 1 &pcie_intc0 0>, /* INT A */ | |
306 | <0 0 0 2 &pcie_intc0 1>, /* INT B */ | |
307 | <0 0 0 3 &pcie_intc0 2>, /* INT C */ | |
308 | <0 0 0 4 &pcie_intc0 3>; /* INT D */ | |
309 | ||
310 | pcie_msi_intc0: msi-interrupt-controller { | |
311 | interrupt-controller; | |
312 | #interrupt-cells = <1>; | |
313 | interrupt-parent = <&gic>; | |
314 | interrupts = <GIC_SPI 30 IRQ_TYPE_EDGE_RISING>, | |
315 | <GIC_SPI 31 IRQ_TYPE_EDGE_RISING>, | |
316 | <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>, | |
317 | <GIC_SPI 33 IRQ_TYPE_EDGE_RISING>, | |
318 | <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>, | |
319 | <GIC_SPI 35 IRQ_TYPE_EDGE_RISING>, | |
320 | <GIC_SPI 36 IRQ_TYPE_EDGE_RISING>, | |
321 | <GIC_SPI 37 IRQ_TYPE_EDGE_RISING>; | |
322 | }; | |
323 | ||
324 | pcie_intc0: legacy-interrupt-controller { | |
325 | interrupt-controller; | |
326 | #interrupt-cells = <1>; | |
327 | interrupt-parent = <&gic>; | |
328 | interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>, | |
329 | <GIC_SPI 27 IRQ_TYPE_EDGE_RISING>, | |
330 | <GIC_SPI 28 IRQ_TYPE_EDGE_RISING>, | |
331 | <GIC_SPI 29 IRQ_TYPE_EDGE_RISING>; | |
332 | }; | |
333 | }; | |
d5e9fe84 SS |
334 | }; |
335 | }; |