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Commit | Line | Data |
---|---|---|
82bb2da1 | 1 | / { |
5d7fd656 | 2 | mbus@f1000000 { |
28fbb9c5 | 3 | pciec: pcie@82000000 { |
54397d85 EG |
4 | compatible = "marvell,kirkwood-pcie"; |
5 | status = "disabled"; | |
6 | device_type = "pci"; | |
7 | ||
8 | #address-cells = <3>; | |
9 | #size-cells = <2>; | |
10 | ||
11 | bus-range = <0x00 0xff>; | |
12 | ||
13 | ranges = | |
14 | <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 | |
15 | 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 | |
16 | 0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000 | |
17 | 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */ | |
18 | 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */ | |
19 | 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 1.0 MEM */ | |
20 | 0x81000000 0x2 0 MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 1.0 IO */>; | |
21 | ||
7b36efd0 | 22 | pcie0: pcie@1,0 { |
54397d85 EG |
23 | device_type = "pci"; |
24 | assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>; | |
25 | reg = <0x0800 0 0 0 0>; | |
26 | #address-cells = <3>; | |
27 | #size-cells = <2>; | |
28 | #interrupt-cells = <1>; | |
29 | ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 | |
30 | 0x81000000 0 0 0x81000000 0x1 0 1 0>; | |
28fbb9c5 | 31 | bus-range = <0x00 0xff>; |
54397d85 EG |
32 | interrupt-map-mask = <0 0 0 0>; |
33 | interrupt-map = <0 0 0 0 &intc 9>; | |
34 | marvell,pcie-port = <0>; | |
35 | marvell,pcie-lane = <0>; | |
36 | clocks = <&gate_clk 2>; | |
37 | status = "disabled"; | |
38 | }; | |
39 | ||
7b36efd0 | 40 | pcie1: pcie@2,0 { |
54397d85 EG |
41 | device_type = "pci"; |
42 | assigned-addresses = <0x82001000 0 0x00044000 0 0x2000>; | |
43 | reg = <0x1000 0 0 0 0>; | |
44 | #address-cells = <3>; | |
45 | #size-cells = <2>; | |
46 | #interrupt-cells = <1>; | |
47 | ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 | |
48 | 0x81000000 0 0 0x81000000 0x2 0 1 0>; | |
28fbb9c5 | 49 | bus-range = <0x00 0xff>; |
54397d85 EG |
50 | interrupt-map-mask = <0 0 0 0>; |
51 | interrupt-map = <0 0 0 0 &intc 10>; | |
52 | marvell,pcie-port = <1>; | |
53 | marvell,pcie-lane = <0>; | |
54 | clocks = <&gate_clk 18>; | |
55 | status = "disabled"; | |
56 | }; | |
57 | }; | |
58 | }; | |
82bb2da1 AL |
59 | ocp@f1000000 { |
60 | ||
a9483969 | 61 | pinctrl: pin-controller@10000 { |
82bb2da1 | 62 | compatible = "marvell,88f6282-pinctrl"; |
82bb2da1 AL |
63 | |
64 | pmx_sata0: pmx-sata0 { | |
65 | marvell,pins = "mpp5", "mpp21", "mpp23"; | |
66 | marvell,function = "sata0"; | |
67 | }; | |
68 | pmx_sata1: pmx-sata1 { | |
69 | marvell,pins = "mpp4", "mpp20", "mpp22"; | |
70 | marvell,function = "sata1"; | |
71 | }; | |
00211e96 | 72 | |
d7e1c076 SH |
73 | /* |
74 | * Default I2C1 pinctrl setting on mpp36/mpp37, | |
75 | * overwrite marvell,pins on board level if required. | |
76 | */ | |
00211e96 NI |
77 | pmx_twsi1: pmx-twsi1 { |
78 | marvell,pins = "mpp36", "mpp37"; | |
79 | marvell,function = "twsi1"; | |
80 | }; | |
81 | ||
8059fc1d TP |
82 | pmx_sdio: pmx-sdio { |
83 | marvell,pins = "mpp12", "mpp13", "mpp14", | |
84 | "mpp15", "mpp16", "mpp17"; | |
85 | marvell,function = "sdio"; | |
86 | }; | |
82bb2da1 | 87 | }; |
083651f2 | 88 | |
7b36efd0 | 89 | thermal: thermal@10078 { |
d8e0a2b6 JC |
90 | compatible = "marvell,kirkwood-thermal"; |
91 | reg = <0x10078 0x4>; | |
92 | status = "okay"; | |
93 | }; | |
94 | ||
7b36efd0 | 95 | rtc: rtc@10300 { |
df6bf2e9 VL |
96 | compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc"; |
97 | reg = <0x10300 0x20>; | |
98 | interrupts = <53>; | |
99 | clocks = <&gate_clk 7>; | |
100 | }; | |
101 | ||
7b36efd0 | 102 | i2c1: i2c@11100 { |
d8e0a2b6 JC |
103 | compatible = "marvell,mv64xxx-i2c"; |
104 | reg = <0x11100 0x20>; | |
105 | #address-cells = <1>; | |
106 | #size-cells = <0>; | |
107 | interrupts = <32>; | |
108 | clock-frequency = <100000>; | |
109 | clocks = <&gate_clk 7>; | |
d7e1c076 SH |
110 | pinctrl-0 = <&pmx_twsi1>; |
111 | pinctrl-names = "default"; | |
d8e0a2b6 JC |
112 | status = "disabled"; |
113 | }; | |
114 | ||
7b36efd0 | 115 | sata: sata@80000 { |
df6bf2e9 VL |
116 | compatible = "marvell,orion-sata"; |
117 | reg = <0x80000 0x5000>; | |
118 | interrupts = <21>; | |
119 | clocks = <&gate_clk 14>, <&gate_clk 15>; | |
120 | clock-names = "0", "1"; | |
0ad82cd8 AL |
121 | phys = <&sata_phy0>, <&sata_phy1>; |
122 | phy-names = "port0", "port1"; | |
df6bf2e9 VL |
123 | status = "disabled"; |
124 | }; | |
125 | ||
7b36efd0 | 126 | sdio: mvsdio@90000 { |
df6bf2e9 VL |
127 | compatible = "marvell,orion-sdio"; |
128 | reg = <0x90000 0x200>; | |
129 | interrupts = <28>; | |
130 | clocks = <&gate_clk 4>; | |
0242399e SH |
131 | pinctrl-0 = <&pmx_sdio>; |
132 | pinctrl-names = "default"; | |
df6bf2e9 VL |
133 | bus-width = <4>; |
134 | cap-sdio-irq; | |
135 | cap-sd-highspeed; | |
136 | cap-mmc-highspeed; | |
137 | status = "disabled"; | |
138 | }; | |
82bb2da1 | 139 | }; |
083651f2 | 140 | }; |