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e7822263 | 1 | // SPDX-License-Identifier: GPL-2.0 |
0c2d652f SG |
2 | /* |
3 | * Device Tree file for LaCie 2Big NAS | |
4 | * | |
5 | * Copyright (C) 2015 Seagate | |
6 | * | |
7 | * Author: Simon Guinot <simon.guinot@sequanux.org> | |
8 | * | |
0c2d652f SG |
9 | */ |
10 | ||
11 | /dts-v1/; | |
12 | ||
13 | #include "kirkwood-netxbig.dtsi" | |
14 | ||
15 | / { | |
16 | model = "LaCie 2Big NAS"; | |
17 | compatible = "lacie,nas2big", "lacie,netxbig", "marvell,kirkwood-88f6282", "marvell,kirkwood"; | |
18 | ||
19 | memory { | |
20 | device_type = "memory"; | |
21 | reg = <0x00000000 0x10000000>; | |
22 | }; | |
23 | ||
24 | chosen { | |
25 | bootargs = "console=ttyS0,115200n8"; | |
26 | stdout-path = &uart0; | |
27 | }; | |
28 | ||
0c2d652f SG |
29 | ocp@f1000000 { |
30 | rtc@10300 { | |
31 | /* The on-chip RTC is not powered (no supercap). */ | |
32 | status = "disabled"; | |
33 | }; | |
34 | spi@10600 { | |
35 | /* | |
36 | * A NAND flash is used instead of an SPI flash for | |
37 | * the other netxbig-compatible boards. | |
38 | */ | |
39 | status = "disabled"; | |
40 | }; | |
41 | }; | |
42 | ||
43 | fan { | |
44 | /* | |
45 | * An I2C fan controller (GMT G762) is used but alarm is | |
46 | * wired to a separate GPIO. | |
47 | */ | |
48 | compatible = "gpio-fan"; | |
49 | alarm-gpios = <&gpio0 25 GPIO_ACTIVE_LOW>; | |
50 | }; | |
51 | ||
52 | regulators: regulators { | |
53 | status = "okay"; | |
54 | compatible = "simple-bus"; | |
55 | #address-cells = <1>; | |
56 | #size-cells = <0>; | |
57 | pinctrl-names = "default"; | |
58 | ||
59 | regulator@2 { | |
60 | compatible = "regulator-fixed"; | |
61 | reg = <2>; | |
62 | regulator-name = "hdd1power"; | |
63 | regulator-min-microvolt = <5000000>; | |
64 | regulator-max-microvolt = <5000000>; | |
65 | enable-active-high; | |
66 | regulator-always-on; | |
67 | regulator-boot-on; | |
68 | gpio = <&gpio0 17 GPIO_ACTIVE_HIGH>; | |
69 | }; | |
70 | clocks { | |
71 | g762_clk: g762-oscillator { | |
72 | compatible = "fixed-clock"; | |
73 | #clock-cells = <0>; | |
74 | clock-frequency = <32768>; | |
75 | }; | |
76 | }; | |
77 | }; | |
78 | }; | |
79 | ||
80 | &mdio { | |
81 | status = "okay"; | |
82 | ||
83 | ethphy0: ethernet-phy@0 { | |
84 | reg = <0>; | |
85 | }; | |
86 | }; | |
87 | ||
88 | &i2c0 { | |
89 | status = "okay"; | |
90 | ||
91 | /* | |
92 | * An external I2C RTC (Dallas DS1337S+) is used. This allows | |
93 | * to power-up the board on an RTC alarm. The external RTC can | |
94 | * be kept powered, even when the SoC is off. | |
95 | */ | |
96 | rtc@68 { | |
97 | compatible = "dallas,ds1307"; | |
98 | reg = <0x68>; | |
99 | interrupts = <43>; | |
100 | }; | |
101 | g762@3e { | |
102 | compatible = "gmt,g762"; | |
103 | reg = <0x3e>; | |
104 | clocks = <&g762_clk>; | |
105 | }; | |
106 | }; | |
107 | ||
108 | &nand { | |
109 | chip-delay = <50>; | |
110 | status = "okay"; | |
111 | ||
112 | partition@0 { | |
113 | label = "U-Boot"; | |
114 | reg = <0x0 0x100000>; | |
115 | }; | |
116 | ||
117 | partition@100000 { | |
118 | label = "uImage"; | |
119 | reg = <0x100000 0x1000000>; | |
120 | }; | |
121 | ||
122 | partition@1100000 { | |
123 | label = "root"; | |
124 | reg = <0x1100000 0x8000000>; | |
125 | }; | |
126 | ||
127 | partition@9100000 { | |
128 | label = "unused"; | |
129 | reg = <0x9100000 0x6f00000>; | |
130 | }; | |
131 | }; | |
eb13cf83 AL |
132 | |
133 | &pciec { | |
134 | status = "okay"; | |
135 | }; | |
136 | ||
137 | &pcie0 { | |
138 | status = "okay"; | |
139 | }; |