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e2eaa339 AL |
1 | /* |
2 | * Marvell RD88F6181 Common Board descrition | |
3 | * | |
4 | * Andrew Lunn <andrew@lunn.ch> | |
5 | * | |
6 | * This file is licensed under the terms of the GNU General Public | |
7 | * License version 2. This program is licensed "as is" without any | |
8 | * warranty of any kind, whether express or implied. | |
9 | * | |
10 | * This file contains the definitions that are common between the two | |
11 | * variants of the Marvell Kirkwood Development Board. | |
12 | */ | |
13 | ||
14 | #include "kirkwood.dtsi" | |
15 | #include "kirkwood-6281.dtsi" | |
16 | ||
17 | / { | |
18 | memory { | |
19 | device_type = "memory"; | |
20 | reg = <0x00000000 0x20000000>; | |
21 | }; | |
22 | ||
23 | chosen { | |
24 | bootargs = "console=ttyS0,115200n8"; | |
ab833614 | 25 | stdout-path = &uart0; |
e2eaa339 AL |
26 | }; |
27 | ||
e2eaa339 | 28 | ocp@f1000000 { |
a9483969 | 29 | pinctrl: pin-controller@10000 { |
e2eaa339 AL |
30 | pinctrl-names = "default"; |
31 | ||
32 | pmx_sdio_cd: pmx-sdio-cd { | |
33 | marvell,pins = "mpp28"; | |
34 | marvell,function = "gpio"; | |
35 | }; | |
36 | }; | |
37 | ||
38 | serial@12000 { | |
39 | status = "okay"; | |
40 | ||
41 | }; | |
42 | ||
43 | sata@80000 { | |
44 | status = "okay"; | |
45 | nr-ports = <2>; | |
46 | }; | |
47 | mvsdio@90000 { | |
48 | pinctrl-0 = <&pmx_sdio &pmx_sdio_cd>; | |
49 | pinctrl-names = "default"; | |
50 | status = "okay"; | |
51 | cd-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>; | |
52 | /* No WP GPIO */ | |
53 | }; | |
54 | }; | |
55 | ||
689168aa | 56 | dsa { |
a3fe1d5d FF |
57 | status = "disabled"; |
58 | ||
e2eaa339 AL |
59 | compatible = "marvell,dsa"; |
60 | #address-cells = <2>; | |
61 | #size-cells = <0>; | |
62 | ||
4f5e01e9 AL |
63 | dsa,ethernet = <ð0port>; |
64 | dsa,mii-bus = <&mdio>; | |
e2eaa339 AL |
65 | |
66 | switch@0 { | |
67 | #address-cells = <1>; | |
68 | #size-cells = <0>; | |
69 | ||
70 | port@0 { | |
71 | reg = <0>; | |
72 | label = "lan1"; | |
73 | }; | |
74 | ||
75 | port@1 { | |
76 | reg = <1>; | |
77 | label = "lan2"; | |
78 | }; | |
79 | ||
80 | port@2 { | |
81 | reg = <2>; | |
82 | label = "lan3"; | |
83 | }; | |
84 | ||
85 | port@3 { | |
86 | reg = <3>; | |
87 | label = "lan4"; | |
88 | }; | |
89 | ||
90 | port@5 { | |
91 | reg = <5>; | |
92 | label = "cpu"; | |
93 | }; | |
94 | }; | |
95 | }; | |
96 | }; | |
97 | ||
98 | &nand { | |
99 | status = "okay"; | |
100 | ||
101 | partition@0 { | |
102 | label = "u-boot"; | |
103 | reg = <0x0000000 0x100000>; | |
104 | read-only; | |
105 | }; | |
106 | ||
107 | partition@100000 { | |
108 | label = "uImage"; | |
109 | reg = <0x0100000 0x200000>; | |
110 | }; | |
111 | ||
112 | partition@300000 { | |
4f5e01e9 | 113 | label = "rootfs"; |
e2eaa339 AL |
114 | reg = <0x0300000 0x500000>; |
115 | }; | |
116 | }; | |
117 | ||
118 | &mdio { | |
119 | status = "okay"; | |
a3fe1d5d FF |
120 | |
121 | switch: switch@0 { | |
122 | compatible = "marvell,mv88e6085"; | |
123 | #address-cells = <1>; | |
124 | #size-cells = <0>; | |
125 | ||
126 | ports { | |
127 | #address-cells = <1>; | |
128 | #size-cells = <0>; | |
129 | ||
130 | port@0 { | |
131 | reg = <0>; | |
132 | label = "lan1"; | |
133 | }; | |
134 | ||
135 | port@1 { | |
136 | reg = <1>; | |
137 | label = "lan2"; | |
138 | }; | |
139 | ||
140 | port@2 { | |
141 | reg = <2>; | |
142 | label = "lan3"; | |
143 | }; | |
144 | ||
145 | port@3 { | |
146 | reg = <3>; | |
147 | label = "lan4"; | |
148 | }; | |
149 | ||
150 | port@5 { | |
151 | reg = <5>; | |
152 | label = "cpu"; | |
153 | ethernet = <ð0port>; | |
154 | fixed-link { | |
155 | speed = <1000>; | |
156 | full-duplex; | |
157 | }; | |
158 | }; | |
159 | ||
160 | }; | |
161 | }; | |
e2eaa339 AL |
162 | }; |
163 | ||
164 | ð0 { | |
165 | status = "okay"; | |
166 | ethernet0-port@0 { | |
4f5e01e9 AL |
167 | speed = <1000>; |
168 | duplex = <1>; | |
e2eaa339 AL |
169 | }; |
170 | }; | |
eb13cf83 AL |
171 | |
172 | &pciec { | |
173 | status = "okay"; | |
174 | }; | |
175 | ||
176 | &pcie0 { | |
177 | status = "okay"; | |
178 | }; |