[mirror_ubuntu-eoan-kernel.git] / arch / arm / boot / dts / logicpd-som-lv.dtsi

// SPDX-License-Identifier: GPL-2.0-only

#include <dt-bindings/input/input.h>

/ {
	cpus {
		cpu@0 {
			cpu0-supply = <&vcc>;
		};
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0>;
	};

	wl12xx_vmmc: wl12xx_vmmc {
		compatible = "regulator-fixed";
		regulator-name = "vwl1271";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		gpio = <&gpio1 3 0>;   /* gpio_3 */
		startup-delay-us = <70000>;
		enable-active-high;
		vin-supply = <&vaux3>;
	};

	/* HS USB Host PHY on PORT 1 */
	hsusb2_phy: hsusb2_phy {
		compatible = "usb-nop-xceiv";
		reset-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; /* gpio_4 */
		#phy-cells = <0>;
	};

	/* fixed 26MHz oscillator */
	hfclk_26m: oscillator {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <26000000>;
	};
};

&gpmc {
	ranges = <0 0 0x30000000 0x1000000>;	/* CS0: 16MB for NAND */

	nand@0,0 {
		compatible = "ti,omap2-nand";
		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
		interrupt-parent = <&gpmc>;
		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
			     <1 IRQ_TYPE_NONE>;	/* termcount */
		linux,mtd-name = "micron,mt29f4g16abbda3w";
		nand-bus-width = <16>;
		ti,nand-ecc-opt = "bch8";
		rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
		gpmc,sync-clk-ps = <0>;
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <44>;
		gpmc,cs-wr-off-ns = <44>;
		gpmc,adv-on-ns = <6>;
		gpmc,adv-rd-off-ns = <34>;
		gpmc,adv-wr-off-ns = <44>;
		gpmc,we-off-ns = <40>;
		gpmc,oe-off-ns = <54>;
		gpmc,access-ns = <64>;
		gpmc,rd-cycle-ns = <82>;
		gpmc,wr-cycle-ns = <82>;
		gpmc,wr-access-ns = <40>;
		gpmc,wr-data-mux-bus-ns = <0>;
		gpmc,device-width = <2>;
		#address-cells = <1>;
		#size-cells = <1>;
	};
};

&i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c1_pins>;
	clock-frequency = <2600000>;

	twl: twl@48 {
		reg = <0x48>;
		interrupts = <7>; /* SYS_NIRQ cascaded to intc */
		interrupt-parent = <&intc>;
		clocks = <&hfclk_26m>;
		clock-names = "fck";
		twl_audio: audio {
			compatible = "ti,twl4030-audio";
			codec {
				ti,hs_extmute_gpio = <&gpio2 25 GPIO_ACTIVE_HIGH>;
			};
		};
	};
};

&i2c2 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c2_pins>;
	clock-frequency = <400000>;
};

&i2c3 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c3_pins>;
	clock-frequency = <400000>;

	touchscreen: tsc2004@48 {
		compatible = "ti,tsc2004";
		reg = <0x48>;
		vio-supply = <&vaux1>;
		pinctrl-names = "default";
		pinctrl-0 = <&tsc2004_pins>;
		interrupts-extended = <&gpio5 25 IRQ_TYPE_EDGE_RISING>; /* gpio 153 */

		touchscreen-fuzz-x = <4>;
		touchscreen-fuzz-y = <7>;
		touchscreen-fuzz-pressure = <2>;
		touchscreen-size-x = <4096>;
		touchscreen-size-y = <4096>;
		touchscreen-max-pressure = <2048>;

		ti,x-plate-ohms = <280>;
		ti,esd-recovery-timeout-ms = <8000>;
	};
};

&mmc3 {
	interrupts-extended = <&intc 94 &omap3_pmx_core 0x136>;
	pinctrl-0 = <&mmc3_pins &wl127x_gpio>;
	pinctrl-names = "default";
	vmmc-supply = <&wl12xx_vmmc>;
	non-removable;
	bus-width = <4>;
	cap-power-off-card;
	#address-cells = <1>;
	#size-cells = <0>;
	wlcore: wlcore@2 {
		compatible = "ti,wl1273";
		reg = <2>;
		interrupt-parent = <&gpio1>;
		interrupts = <2 IRQ_TYPE_EDGE_RISING>; /* gpio 2 */
		ref-clock-frequency = <26000000>;
	};
};

&usbhshost {
	port2-mode = "ehci-phy";
};

&usbhsehci {
	phys = <0 &hsusb2_phy>;
};


&omap3_pmx_core {
	pinctrl-names = "default";
	pinctrl-0 = <&hsusb2_pins>;

	mmc3_pins: pinmux_mm3_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE3)	/* sdmmc2_dat4.sdmmc3_dat0 */
			OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE3)	/* sdmmc2_dat5.sdmmc3_dat1 */
			OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE3)	/* sdmmc2_dat6.sdmmc3_dat2 */
			OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE3)	/* sdmmc2_dat6.sdmmc3_dat3 */
			OMAP3_CORE1_IOPAD(0x21d0, PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs1.sdmmc3_cmd */
			OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT_PULLUP | MUX_MODE3)	/* mcspi1_cs2.sdmmc_clk */
		>;
	};
	mcbsp2_pins: pinmux_mcbsp2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0)        /* mcbsp2_fsx */
			OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0)        /* mcbsp2_clkx */
			OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0)        /* mcbsp2_dr */
			OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0)       /* mcbsp2_dx */
		>;
	};
	uart2_pins: pinmux_uart2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0)	/* uart2_cts.uart2_cts */
			OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0)	/* uart2_rts .uart2_rts*/
			OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0)	/* uart2_tx.uart2_tx */
			OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0)	/* uart2_rx.uart2_rx */
			OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4)	/* GPIO_162,BT_EN */
		>;
	};
	mcspi1_pins: pinmux_mcspi1_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0)        /* mcspi1_clk.mcspi1_clk */
			OMAP3_CORE1_IOPAD(0x21ca, PIN_OUTPUT | MUX_MODE0)       /* mcspi1_simo.mcspi1_simo */
			OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */
			OMAP3_CORE1_IOPAD(0x21ce, PIN_OUTPUT | MUX_MODE0)       /* mcspi1_cs0.mcspi1_cs0 */
		>;
	};

	hsusb2_pins: pinmux_hsusb2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi1_cs3.hsusb2_data2 */
			OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_clk.hsusb2_data7 */
			OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_simo.hsusb2_data4 */
			OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_somi.hsusb2_data5 */
			OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_cs0.hsusb2_data6 */
			OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_cs1.hsusb2_data3 */
		>;
	};

	hsusb_otg_pins: pinmux_hsusb_otg_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0)	/* hsusb0_clk.hsusb0_clk */
			OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0)	/* hsusb0_stp.hsusb0_stp */
			OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0)	/* hsusb0_dir.hsusb0_dir */
			OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0)	/* hsusb0_nxt.hsusb0_nxt */
			OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0)	/* hsusb0_data0.hsusb0_data0 */
			OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0)	/* hsusb0_data1.hsusb0_data1 */
			OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0)	/* hsusb0_data2.hsusb0_data2 */
			OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0)	/* hsusb0_data3.hsusb0_data3 */
			OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0)	/* hsusb0_data4.hsusb0_data4 */
			OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0)	/* hsusb0_data5.hsusb0_data5 */
			OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0)	/* hsusb0_data6.hsusb0_data6 */
			OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0)	/* hsusb0_data7.hsusb0_data7 */
		>;
	};

	i2c1_pins: pinmux_i2c1_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0)        /* i2c1_scl.i2c1_scl */
			OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0)        /* i2c1_sda.i2c1_sda */
			OMAP3_CORE1_IOPAD(0x20ba, PIN_OUTPUT | MUX_MODE4)        /* gpmc_ncs6.gpio_57 */
		>;
	};

	tsc2004_pins: pinmux_tsc2004_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE4)	/* mcbsp4_dr.gpio_153 */
		>;
	};
};

&omap3_pmx_wkup {
	pinctrl-names = "default";
	pinctrl-0 = <&hsusb2_reset_pin>;
	hsusb2_reset_pin: pinmux_hsusb1_reset_pin {
		pinctrl-single,pins = <
			OMAP3_WKUP_IOPAD(0x2a0e, PIN_OUTPUT | MUX_MODE4)	/* sys_boot2.gpio_4 */
		>;
	};
	wl127x_gpio: pinmux_wl127x_gpio_pin {
		pinctrl-single,pins = <
			OMAP3_WKUP_IOPAD(0x2a0a, PIN_INPUT | MUX_MODE4)		/* sys_boot0.gpio_2 */
			OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE4)	/* sys_boot1.gpio_3 */
		>;
	};
	i2c2_pins: pinmux_i2c2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0)	/* i2c2_scl */
			OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0)	/* i2c2_sda */
		>;
	};
	i2c3_pins: pinmux_i2c3_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0)	/* i2c3_scl */
			OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0)	/* i2c3_sda */
		>;
	};
};

&omap3_pmx_core2 {
	pinctrl-names = "default";
	pinctrl-0 = <&hsusb2_2_pins>;
	hsusb2_2_pins: pinmux_hsusb2_2_pins {
		pinctrl-single,pins = <
			OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)            /* etk_d10.hsusb2_clk */
			OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)            /* etk_d11.hsusb2_stp */
			OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d12.hsusb2_dir */
			OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d13.hsusb2_nxt */
			OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d14.hsusb2_data0 */
			OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d15.hsusb2_data1 */
		>;
	};
};

&uart2 {
	interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
	pinctrl-names = "default";
	pinctrl-0 = <&uart2_pins>;
};

&mcspi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&mcspi1_pins>;
};

#include "twl4030.dtsi"
#include "twl4030_omap3.dtsi"

&vaux3 {
	regulator-min-microvolt = <2800000>;
	regulator-max-microvolt = <2800000>;
};

&twl {
	twl_power: power {
		compatible = "ti,twl4030-power-idle-osc-off", "ti,twl4030-power-idle";
		ti,use_poweroff;
	};
};

&twl_gpio {
	ti,use-leds;
};
Commit	Line	Data
d2912cb1	1	// SPDX-License-Identifier: GPL-2.0-only
ab8dd3ae AF	2
	3	#include <dt-bindings/input/input.h>
	4
	5	/ {
	6	cpus {
	7	cpu@0 {
	8	cpu0-supply = <&vcc>;
	9	};
	10	};
	11
80513a2b AF	12	memory@80000000 {
	13	device_type = "memory";
	14	reg = <0x80000000 0>;
	15	};
	16
ab8dd3ae AF	17	wl12xx_vmmc: wl12xx_vmmc {
	18	compatible = "regulator-fixed";
	19	regulator-name = "vwl1271";
	20	regulator-min-microvolt = <1800000>;
	21	regulator-max-microvolt = <1800000>;
	22	gpio = <&gpio1 3 0>; /* gpio_3 */
	23	startup-delay-us = <70000>;
	24	enable-active-high;
189822cb	25	vin-supply = <&vaux3>;
ab8dd3ae	26	};
89077c71 AF	27
	28	/* HS USB Host PHY on PORT 1 */
	29	hsusb2_phy: hsusb2_phy {
	30	compatible = "usb-nop-xceiv";
	31	reset-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; /* gpio_4 */
f568f6f5	32	#phy-cells = <0>;
89077c71	33	};
8eb43b0a AF	34
	35	/* fixed 26MHz oscillator */
	36	hfclk_26m: oscillator {
	37	#clock-cells = <0>;
	38	compatible = "fixed-clock";
	39	clock-frequency = <26000000>;
	40	};
ab8dd3ae AF	41	};
	42
	43	&gpmc {
3c18bbf3	44	ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
ab8dd3ae AF	45
ab8dd3ae AF	46	nand@0,0 {
4875b8fc	47	compatible = "ti,omap2-nand";
ab8dd3ae	48	reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
4875b8fc AF	49	interrupt-parent = <&gpmc>;
	50	interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
	51	<1 IRQ_TYPE_NONE>; /* termcount */
	52	linux,mtd-name = "micron,mt29f4g16abbda3w";
ab8dd3ae AF	53	nand-bus-width = <16>;
ab8dd3ae AF	54	ti,nand-ecc-opt = "bch8";
4875b8fc	55	rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
ab8dd3ae AF	56	gpmc,sync-clk-ps = <0>;
	57	gpmc,cs-on-ns = <0>;
	58	gpmc,cs-rd-off-ns = <44>;
	59	gpmc,cs-wr-off-ns = <44>;
	60	gpmc,adv-on-ns = <6>;
	61	gpmc,adv-rd-off-ns = <34>;
	62	gpmc,adv-wr-off-ns = <44>;
	63	gpmc,we-off-ns = <40>;
	64	gpmc,oe-off-ns = <54>;
	65	gpmc,access-ns = <64>;
	66	gpmc,rd-cycle-ns = <82>;
	67	gpmc,wr-cycle-ns = <82>;
	68	gpmc,wr-access-ns = <40>;
	69	gpmc,wr-data-mux-bus-ns = <0>;
	70	gpmc,device-width = <2>;
ab8dd3ae AF	71	#address-cells = <1>;
ab8dd3ae AF	72	#size-cells = <1>;
ab8dd3ae AF	73	};
	74	};
	75
	76	&i2c1 {
84c7efd6 AF	77	pinctrl-names = "default";
84c7efd6 AF	78	pinctrl-0 = <&i2c1_pins>;
ab8dd3ae AF	79	clock-frequency = <2600000>;
	80
	81	twl: twl@48 {
	82	reg = <0x48>;
	83	interrupts = <7>; /* SYS_NIRQ cascaded to intc */
	84	interrupt-parent = <&intc>;
8eb43b0a AF	85	clocks = <&hfclk_26m>;
8eb43b0a AF	86	clock-names = "fck";
ab8dd3ae AF	87	twl_audio: audio {
	88	compatible = "ti,twl4030-audio";
	89	codec {
95e59fc3	90	ti,hs_extmute_gpio = <&gpio2 25 GPIO_ACTIVE_HIGH>;
ab8dd3ae AF	91	};
	92	};
	93	};
	94	};
	95
	96	&i2c2 {
5fe3c0fa AF	97	pinctrl-names = "default";
5fe3c0fa AF	98	pinctrl-0 = <&i2c2_pins>;
ab8dd3ae AF	99	clock-frequency = <400000>;
	100	};
	101
	102	&i2c3 {
5fe3c0fa AF	103	pinctrl-names = "default";
5fe3c0fa AF	104	pinctrl-0 = <&i2c3_pins>;
ab8dd3ae	105	clock-frequency = <400000>;
121685b1 AF	106
	107	touchscreen: tsc2004@48 {
	108	compatible = "ti,tsc2004";
	109	reg = <0x48>;
	110	vio-supply = <&vaux1>;
	111	pinctrl-names = "default";
	112	pinctrl-0 = <&tsc2004_pins>;
	113	interrupts-extended = <&gpio5 25 IRQ_TYPE_EDGE_RISING>; /* gpio 153 */
	114
	115	touchscreen-fuzz-x = <4>;
	116	touchscreen-fuzz-y = <7>;
	117	touchscreen-fuzz-pressure = <2>;
	118	touchscreen-size-x = <4096>;
	119	touchscreen-size-y = <4096>;
	120	touchscreen-max-pressure = <2048>;
	121
	122	ti,x-plate-ohms = <280>;
	123	ti,esd-recovery-timeout-ms = <8000>;
	124	};
ab8dd3ae AF	125	};
	126
	127	&mmc3 {
3d8b804b	128	interrupts-extended = <&intc 94 &omap3_pmx_core 0x136>;
cd7594ac	129	pinctrl-0 = <&mmc3_pins &wl127x_gpio>;
ab8dd3ae AF	130	pinctrl-names = "default";
	131	vmmc-supply = <&wl12xx_vmmc>;
	132	non-removable;
	133	bus-width = <4>;
	134	cap-power-off-card;
	135	#address-cells = <1>;
	136	#size-cells = <0>;
	137	wlcore: wlcore@2 {
	138	compatible = "ti,wl1273";
	139	reg = <2>;
cd7594ac	140	interrupt-parent = <&gpio1>;
572cf7d7	141	interrupts = <2 IRQ_TYPE_EDGE_RISING>; /* gpio 2 */
ab8dd3ae AF	142	ref-clock-frequency = <26000000>;
	143	};
	144	};
	145
89077c71 AF	146	&usbhshost {
	147	port2-mode = "ehci-phy";
	148	};
	149
	150	&usbhsehci {
	151	phys = <0 &hsusb2_phy>;
	152	};
	153
	154
ab8dd3ae	155	&omap3_pmx_core {
89077c71 AF	156	pinctrl-names = "default";
	157	pinctrl-0 = <&hsusb2_pins>;
	158
ab8dd3ae AF	159	mmc3_pins: pinmux_mm3_pins {
	160	pinctrl-single,pins = <
	161	OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP \| MUX_MODE3) /* sdmmc2_dat4.sdmmc3_dat0 */
	162	OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP \| MUX_MODE3) /* sdmmc2_dat5.sdmmc3_dat1 */
	163	OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP \| MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat2 */
	164	OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP \| MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat3 */
ab8dd3ae AF	165	OMAP3_CORE1_IOPAD(0x21d0, PIN_INPUT_PULLUP \| MUX_MODE3) /* mcspi1_cs1.sdmmc3_cmd */
	166	OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT_PULLUP \| MUX_MODE3) /* mcspi1_cs2.sdmmc_clk */
	167	>;
	168	};
	169	mcbsp2_pins: pinmux_mcbsp2_pins {
	170	pinctrl-single,pins = <
	171	OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT \| MUX_MODE0) /* mcbsp2_fsx */
	172	OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT \| MUX_MODE0) /* mcbsp2_clkx */
	173	OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT \| MUX_MODE0) /* mcbsp2_dr */
	174	OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT \| MUX_MODE0) /* mcbsp2_dx */
	175	>;
	176	};
	177	uart2_pins: pinmux_uart2_pins {
	178	pinctrl-single,pins = <
	179	OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT \| MUX_MODE0) /* uart2_cts.uart2_cts */
	180	OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT \| MUX_MODE0) /* uart2_rts .uart2_rts*/
	181	OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT \| MUX_MODE0) /* uart2_tx.uart2_tx */
	182	OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT \| MUX_MODE0) /* uart2_rx.uart2_rx */
	183	OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT \| MUX_MODE4) /* GPIO_162,BT_EN */
	184	>;
	185	};
	186	mcspi1_pins: pinmux_mcspi1_pins {
	187	pinctrl-single,pins = <
	188	OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT \| MUX_MODE0) /* mcspi1_clk.mcspi1_clk */
	189	OMAP3_CORE1_IOPAD(0x21ca, PIN_OUTPUT \| MUX_MODE0) /* mcspi1_simo.mcspi1_simo */
	190	OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT_PULLUP \| MUX_MODE0) /* mcspi1_somi.mcspi1_somi */
	191	OMAP3_CORE1_IOPAD(0x21ce, PIN_OUTPUT \| MUX_MODE0) /* mcspi1_cs0.mcspi1_cs0 */
	192	>;
	193	};
89077c71 AF	194
	195	hsusb2_pins: pinmux_hsusb2_pins {
	196	pinctrl-single,pins = <
	197	OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */
	198	OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */
	199	OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */
	200	OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */
	201	OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */
	202	OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */
	203	>;
	204	};
	205
ab8dd3ae AF	206	hsusb_otg_pins: pinmux_hsusb_otg_pins {
	207	pinctrl-single,pins = <
	208	OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT \| MUX_MODE0) /* hsusb0_clk.hsusb0_clk */
	209	OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT \| MUX_MODE0) /* hsusb0_stp.hsusb0_stp */
	210	OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT \| MUX_MODE0) /* hsusb0_dir.hsusb0_dir */
	211	OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT \| MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */
	212	OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT \| MUX_MODE0) /* hsusb0_data0.hsusb0_data0 */
	213	OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT \| MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */
	214	OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT \| MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */
	215	OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT \| MUX_MODE0) /* hsusb0_data3.hsusb0_data3 */
	216	OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT \| MUX_MODE0) /* hsusb0_data4.hsusb0_data4 */
	217	OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT \| MUX_MODE0) /* hsusb0_data5.hsusb0_data5 */
	218	OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT \| MUX_MODE0) /* hsusb0_data6.hsusb0_data6 */
	219	OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT \| MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */
	220	>;
	221	};
89077c71	222
84c7efd6 AF	223	i2c1_pins: pinmux_i2c1_pins {
	224	pinctrl-single,pins = <
	225	OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT \| MUX_MODE0) /* i2c1_scl.i2c1_scl */
	226	OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT \| MUX_MODE0) /* i2c1_sda.i2c1_sda */
95e59fc3	227	OMAP3_CORE1_IOPAD(0x20ba, PIN_OUTPUT \| MUX_MODE4) /* gpmc_ncs6.gpio_57 */
84c7efd6 AF	228	>;
84c7efd6 AF	229	};
121685b1 AF	230
	231	tsc2004_pins: pinmux_tsc2004_pins {
	232	pinctrl-single,pins = <
	233	OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT \| MUX_MODE4) /* mcbsp4_dr.gpio_153 */
	234	>;
	235	};
89077c71 AF	236	};
	237
	238	&omap3_pmx_wkup {
41bd6adf TL	239	pinctrl-names = "default";
41bd6adf TL	240	pinctrl-0 = <&hsusb2_reset_pin>;
89077c71 AF	241	hsusb2_reset_pin: pinmux_hsusb1_reset_pin {
	242	pinctrl-single,pins = <
	243	OMAP3_WKUP_IOPAD(0x2a0e, PIN_OUTPUT \| MUX_MODE4) /* sys_boot2.gpio_4 */
	244	>;
	245	};
cd7594ac AF	246	wl127x_gpio: pinmux_wl127x_gpio_pin {
cd7594ac AF	247	pinctrl-single,pins = <
189822cb	248	OMAP3_WKUP_IOPAD(0x2a0a, PIN_INPUT \| MUX_MODE4) /* sys_boot0.gpio_2 */
cd7594ac AF	249	OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT \| MUX_MODE4) /* sys_boot1.gpio_3 */
	250	>;
	251	};
5fe3c0fa AF	252	i2c2_pins: pinmux_i2c2_pins {
	253	pinctrl-single,pins = <
	254	OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT \| MUX_MODE0) /* i2c2_scl */
	255	OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT \| MUX_MODE0) /* i2c2_sda */
	256	>;
	257	};
	258	i2c3_pins: pinmux_i2c3_pins {
	259	pinctrl-single,pins = <
	260	OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT \| MUX_MODE0) /* i2c3_scl */
	261	OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT \| MUX_MODE0) /* i2c3_sda */
	262	>;
	263	};
89077c71 AF	264	};
	265
	266	&omap3_pmx_core2 {
41bd6adf TL	267	pinctrl-names = "default";
41bd6adf TL	268	pinctrl-0 = <&hsusb2_2_pins>;
89077c71 AF	269	hsusb2_2_pins: pinmux_hsusb2_2_pins {
	270	pinctrl-single,pins = <
	271	OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT \| MUX_MODE3) /* etk_d10.hsusb2_clk */
	272	OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT \| MUX_MODE3) /* etk_d11.hsusb2_stp */
	273	OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* etk_d12.hsusb2_dir */
	274	OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* etk_d13.hsusb2_nxt */
	275	OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* etk_d14.hsusb2_data0 */
	276	OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* etk_d15.hsusb2_data1 */
	277	>;
	278	};
ab8dd3ae AF	279	};
	280
	281	&uart2 {
	282	interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
	283	pinctrl-names = "default";
	284	pinctrl-0 = <&uart2_pins>;
	285	};
	286
	287	&mcspi1 {
	288	pinctrl-names = "default";
	289	pinctrl-0 = <&mcspi1_pins>;
	290	};
	291
	292	#include "twl4030.dtsi"
	293	#include "twl4030_omap3.dtsi"
	294
189822cb AF	295	&vaux3 {
	296	regulator-min-microvolt = <2800000>;
	297	regulator-max-microvolt = <2800000>;
	298	};
	299
ab8dd3ae AF	300	&twl {
	301	twl_power: power {
	302	compatible = "ti,twl4030-power-idle-osc-off", "ti,twl4030-power-idle";
	303	ti,use_poweroff;
	304	};
	305	};
	306
	307	&twl_gpio {
	308	ti,use-leds;
	309	};