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1 | /* |
2 | * Copyright (c) 2014 MundoReader S.L. | |
3 | * Author: Matthias Brugger <matthias.bgg@gmail.com> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License as published by | |
7 | * the Free Software Foundation; either version 2 of the License, or | |
8 | * (at your option) any later version. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | */ | |
15 | ||
16 | #include <dt-bindings/interrupt-controller/irq.h> | |
17 | #include <dt-bindings/interrupt-controller/arm-gic.h> | |
18 | #include "skeleton.dtsi" | |
19 | ||
20 | / { | |
21 | compatible = "mediatek,mt6589"; | |
22 | interrupt-parent = <&gic>; | |
23 | ||
24 | cpus { | |
25 | #address-cells = <1>; | |
26 | #size-cells = <0>; | |
27 | ||
28 | cpu@0 { | |
29 | device_type = "cpu"; | |
30 | compatible = "arm,cortex-a7"; | |
31 | reg = <0x0>; | |
32 | }; | |
33 | cpu@1 { | |
34 | device_type = "cpu"; | |
35 | compatible = "arm,cortex-a7"; | |
36 | reg = <0x1>; | |
37 | }; | |
38 | cpu@2 { | |
39 | device_type = "cpu"; | |
40 | compatible = "arm,cortex-a7"; | |
41 | reg = <0x2>; | |
42 | }; | |
43 | cpu@3 { | |
44 | device_type = "cpu"; | |
45 | compatible = "arm,cortex-a7"; | |
46 | reg = <0x3>; | |
47 | }; | |
48 | ||
49 | }; | |
50 | ||
51 | clocks { | |
52 | #address-cells = <1>; | |
53 | #size-cells = <1>; | |
54 | compatible = "simple-bus"; | |
55 | ranges; | |
56 | ||
57 | system_clk: dummy13m { | |
58 | compatible = "fixed-clock"; | |
59 | clock-frequency = <13000000>; | |
60 | #clock-cells = <0>; | |
61 | }; | |
62 | ||
63 | rtc_clk: dummy32k { | |
64 | compatible = "fixed-clock"; | |
65 | clock-frequency = <32000>; | |
66 | #clock-cells = <0>; | |
67 | }; | |
68 | }; | |
69 | ||
70 | soc { | |
71 | #address-cells = <1>; | |
72 | #size-cells = <1>; | |
73 | compatible = "simple-bus"; | |
74 | ranges; | |
75 | ||
76 | timer: timer@10008000 { | |
77 | compatible = "mediatek,mt6577-timer"; | |
78 | reg = <0x10008000 0x80>; | |
79 | interrupts = <GIC_SPI 113 IRQ_TYPE_EDGE_RISING>; | |
80 | clocks = <&system_clk>, <&rtc_clk>; | |
81 | clock-names = "system-clk", "rtc-clk"; | |
82 | }; | |
83 | ||
510f1d72 | 84 | gic: interrupt-controller@10211000 { |
7e9b2828 | 85 | compatible = "arm,cortex-a7-gic"; |
f682a218 MB |
86 | interrupt-controller; |
87 | #interrupt-cells = <3>; | |
88 | reg = <0x10211000 0x1000>, | |
89 | <0x10212000 0x1000>, | |
90 | <0x10214000 0x2000>, | |
91 | <0x10216000 0x2000>; | |
92 | }; | |
93 | }; | |
94 | }; |