]> git.proxmox.com Git - mirror_ubuntu-hirsute-kernel.git/blame - arch/arm/boot/dts/omap3-beagle-xm.dts
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 499
[mirror_ubuntu-hirsute-kernel.git] / arch / arm / boot / dts / omap3-beagle-xm.dts
CommitLineData
295e98c6
BC
1/*
2 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8/dts-v1/;
9
98ef7957 10#include "omap36xx.dtsi"
295e98c6
BC
11
12/ {
642f12b4 13 model = "TI OMAP3 BeagleBoard xM";
016c12d2 14 compatible = "ti,omap3-beagle-xm", "ti,omap36xx", "ti,omap3";
295e98c6 15
a134be34
NM
16 cpus {
17 cpu@0 {
18 cpu0-supply = <&vcc>;
19 };
20 };
21
81777ff9 22 memory@80000000 {
295e98c6
BC
23 device_type = "memory";
24 reg = <0x80000000 0x20000000>; /* 512 MB */
25 };
a60be2fe 26
9955a9e5
TV
27 aliases {
28 display0 = &dvi0;
29 display1 = &tv0;
055d31de 30 ethernet = &ethernet;
9955a9e5
TV
31 };
32
bcddb927
PU
33 /* fixed 26MHz oscillator */
34 hfclk_26m: oscillator {
35 #clock-cells = <0>;
36 compatible = "fixed-clock";
37 clock-frequency = <26000000>;
38 };
39
a60be2fe
FV
40 leds {
41 compatible = "gpio-leds";
1c1737e5
BC
42
43 heartbeat {
44 label = "beagleboard::usr0";
6d624eab 45 gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>; /* 150 -> D6 LED */
1c1737e5
BC
46 linux,default-trigger = "heartbeat";
47 };
48
49 mmc {
50 label = "beagleboard::usr1";
6d624eab 51 gpios = <&gpio5 21 GPIO_ACTIVE_HIGH>; /* 149 -> D7 LED */
1c1737e5
BC
52 linux,default-trigger = "mmc0";
53 };
a60be2fe 54 };
2c195f9c 55
2c09c60c
PU
56 pwmleds {
57 compatible = "pwm-leds";
58
59 pmu_stat {
60 label = "beagleboard::pmu_stat";
61 pwms = <&twl_pwmled 1 7812500>;
62 max-brightness = <127>;
63 };
64 };
65
2c195f9c
PU
66 sound {
67 compatible = "ti,omap-twl4030";
68 ti,model = "omap3beagle";
69
70 ti,mcbsp = <&mcbsp2>;
2c195f9c 71 };
d641c3d5
KH
72
73 gpio_keys {
74 compatible = "gpio-keys";
75
76 user {
77 label = "user";
78 gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
79 linux,code = <0x114>;
0c4d63b3 80 wakeup-source;
d641c3d5
KH
81 };
82
83 };
aaba9442
RQ
84
85 /* HS USB Port 2 Power */
86 hsusb2_power: hsusb2_power_reg {
87 compatible = "regulator-fixed";
88 regulator-name = "hsusb2_vbus";
89 regulator-min-microvolt = <3300000>;
90 regulator-max-microvolt = <3300000>;
3a637e00 91 gpio = <&twl_gpio 18 GPIO_ACTIVE_HIGH>; /* GPIO LEDA */
aaba9442
RQ
92 startup-delay-us = <70000>;
93 };
94
95 /* HS USB Host PHY on PORT 2 */
96 hsusb2_phy: hsusb2_phy {
97 compatible = "usb-nop-xceiv";
98 reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>; /* gpio_147 */
99 vcc-supply = <&hsusb2_power>;
f568f6f5 100 #phy-cells = <0>;
aaba9442 101 };
9955a9e5 102
a58280e5 103 tfp410: encoder0 {
9955a9e5
TV
104 compatible = "ti,tfp410";
105 powerdown-gpios = <&twl_gpio 2 GPIO_ACTIVE_LOW>;
106
107 /* XXX pinctrl from twl */
108
109 ports {
110 #address-cells = <1>;
111 #size-cells = <0>;
112
113 port@0 {
114 reg = <0>;
115
a58280e5 116 tfp410_in: endpoint {
9955a9e5
TV
117 remote-endpoint = <&dpi_out>;
118 };
119 };
120
121 port@1 {
122 reg = <1>;
123
a58280e5 124 tfp410_out: endpoint {
9955a9e5
TV
125 remote-endpoint = <&dvi_connector_in>;
126 };
127 };
128 };
129 };
130
a58280e5 131 dvi0: connector0 {
9955a9e5
TV
132 compatible = "dvi-connector";
133 label = "dvi";
134
135 digital;
136
137 ddc-i2c-bus = <&i2c3>;
138
139 port {
140 dvi_connector_in: endpoint {
141 remote-endpoint = <&tfp410_out>;
142 };
143 };
144 };
145
a58280e5 146 tv0: connector1 {
9955a9e5
TV
147 compatible = "svideo-connector";
148 label = "tv";
149
150 port {
151 tv_connector_in: endpoint {
152 remote-endpoint = <&venc_out>;
153 };
154 };
155 };
9d316202
MP
156
157 etb@5401b000 {
158 compatible = "arm,coresight-etb10", "arm,primecell";
159 reg = <0x5401b000 0x1000>;
160
9d316202
MP
161 clocks = <&emu_src_ck>;
162 clock-names = "apb_pclk";
f2b07213
SP
163 in-ports {
164 port {
165 etb_in: endpoint {
166 remote-endpoint = <&etm_out>;
167 };
9d316202
MP
168 };
169 };
170 };
171
172 etm@54010000 {
173 compatible = "arm,coresight-etm3x", "arm,primecell";
174 reg = <0x54010000 0x1000>;
175
176 clocks = <&emu_src_ck>;
177 clock-names = "apb_pclk";
f2b07213
SP
178 out-ports {
179 port {
180 etm_out: endpoint {
181 remote-endpoint = <&etb_in>;
182 };
9d316202
MP
183 };
184 };
185 };
d641c3d5
KH
186};
187
188&omap3_pmx_wkup {
189 gpio1_pins: pinmux_gpio1_pins {
190 pinctrl-single,pins = <
0ba47e43 191 OMAP3_WKUP_IOPAD(0x2a0e, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_boot2.gpio_4 */
d641c3d5
KH
192 >;
193 };
9955a9e5
TV
194
195 dss_dpi_pins2: pinmux_dss_dpi_pins1 {
196 pinctrl-single,pins = <
0ba47e43
JMC
197 OMAP3_WKUP_IOPAD(0x2a0a, PIN_OUTPUT | MUX_MODE3) /* sys_boot0.dss_data18 */
198 OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE3) /* sys_boot1.dss_data19 */
199 OMAP3_WKUP_IOPAD(0x2a10, PIN_OUTPUT | MUX_MODE3) /* sys_boot3.dss_data20 */
200 OMAP3_WKUP_IOPAD(0x2a12, PIN_OUTPUT | MUX_MODE3) /* sys_boot4.dss_data21 */
201 OMAP3_WKUP_IOPAD(0x2a14, PIN_OUTPUT | MUX_MODE3) /* sys_boot5.dss_data22 */
202 OMAP3_WKUP_IOPAD(0x2a16, PIN_OUTPUT | MUX_MODE3) /* sys_boot6.dss_data23 */
9955a9e5
TV
203 >;
204 };
295e98c6 205};
5340b51d 206
aaba9442
RQ
207&omap3_pmx_core {
208 pinctrl-names = "default";
209 pinctrl-0 = <
3d495383 210 &hsusb2_pins
aaba9442
RQ
211 >;
212
213 uart3_pins: pinmux_uart3_pins {
214 pinctrl-single,pins = <
0ba47e43
JMC
215 OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
216 OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx OUTPUT | MODE0 */
aaba9442
RQ
217 >;
218 };
219
3d495383 220 hsusb2_pins: pinmux_hsusb2_pins {
aaba9442 221 pinctrl-single,pins = <
3d495383
LP
222 OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */
223 OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */
224 OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */
225 OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */
226 OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */
227 OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */
228 >;
229 };
9955a9e5
TV
230
231 dss_dpi_pins1: pinmux_dss_dpi_pins2 {
232 pinctrl-single,pins = <
233 OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
234 OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
235 OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
236 OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
237
238 OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
239 OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
240 OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
241 OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
242 OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
243 OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
244 OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
245 OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
246 OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
247 OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
248 OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */
249 OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */
250
251 OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE3) /* dss_data18.dss_data0 */
252 OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE3) /* dss_data19.dss_data1 */
253 OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE3) /* dss_data20.dss_data2 */
254 OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE3) /* dss_data21.dss_data3 */
255 OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE3) /* dss_data22.dss_data4 */
256 OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE3) /* dss_data23.dss_data5 */
257 >;
258 };
3d495383
LP
259};
260
261&omap3_pmx_core2 {
262 pinctrl-names = "default";
263 pinctrl-0 = <
264 &hsusb2_2_pins
265 >;
266
267 hsusb2_2_pins: pinmux_hsusb2_2_pins {
268 pinctrl-single,pins = <
269 OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */
270 OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */
271 OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */
272 OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */
273 OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */
274 OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */
aaba9442
RQ
275 >;
276 };
277};
278
5340b51d
BC
279&i2c1 {
280 clock-frequency = <2600000>;
281
282 twl: twl@48 {
283 reg = <0x48>;
284 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
285 interrupt-parent = <&intc>;
ecc7b060 286
bcddb927
PU
287 clocks = <&hfclk_26m>;
288 clock-names = "fck";
289
2c195f9c
PU
290 twl_audio: audio {
291 compatible = "ti,twl4030-audio";
292 codec {
293 };
294 };
9188883f
TL
295
296 twl_power: power {
297 compatible = "ti,twl4030-power-beagleboard-xm", "ti,twl4030-power-idle-osc-off";
298 ti,use_poweroff;
299 };
5340b51d
BC
300 };
301};
302
98ef7957 303#include "twl4030.dtsi"
f9688457 304#include "twl4030_omap3.dtsi"
5340b51d
BC
305
306&i2c2 {
307 clock-frequency = <400000>;
308};
309
310&i2c3 {
311 clock-frequency = <100000>;
5340b51d 312};
b3431f5b
RN
313
314&mmc1 {
315 vmmc-supply = <&vmmc1>;
45ea75eb 316 vqmmc-supply = <&vsim>;
7f217794 317 bus-width = <8>;
b3431f5b
RN
318};
319
320&mmc2 {
fd5c3fd7 321 status = "disabled";
b3431f5b
RN
322};
323
324&mmc3 {
fd5c3fd7 325 status = "disabled";
b3431f5b 326};
a60be2fe
FV
327
328&twl_gpio {
329 ti,use-leds;
330 /* pullups: BIT(1) */
331 ti,pullups = <0x000002>;
332 /*
333 * pulldowns:
334 * BIT(2), BIT(6), BIT(7), BIT(8), BIT(13)
335 * BIT(15), BIT(16), BIT(17)
336 */
337 ti,pulldowns = <0x03a1c4>;
338};
ad871c10
KVA
339
340&usb_otg_hs {
341 interface-type = <0>;
914dc329 342 usb-phy = <&usb2_phy>;
975d963e
KVA
343 phys = <&usb2_phy>;
344 phy-names = "usb2-phy";
ad871c10
KVA
345 mode = <3>;
346 power = <50>;
347};
b859c1ef 348
b859c1ef 349&uart3 {
9188883f 350 interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
b859c1ef
KH
351 pinctrl-names = "default";
352 pinctrl-0 = <&uart3_pins>;
353};
d641c3d5
KH
354
355&gpio1 {
356 pinctrl-names = "default";
357 pinctrl-0 = <&gpio1_pins>;
358};
aaba9442
RQ
359
360&usbhshost {
361 port2-mode = "ehci-phy";
362};
363
364&usbhsehci {
365 phys = <0 &hsusb2_phy>;
055d31de
LP
366
367 #address-cells = <1>;
368 #size-cells = <0>;
369
370 hub@2 {
371 compatible = "usb424,9514";
372 reg = <2>;
373 #address-cells = <1>;
374 #size-cells = <0>;
375
376 ethernet: usbether@1 {
377 compatible = "usb424,ec00";
378 reg = <1>;
379 };
380 };
aaba9442 381};
30023a7e
RQ
382
383&vaux2 {
384 regulator-name = "usb_1v8";
385 regulator-min-microvolt = <1800000>;
386 regulator-max-microvolt = <1800000>;
387 regulator-always-on;
388};
726322ce
PU
389
390&mcbsp2 {
391 status = "okay";
392};
9955a9e5
TV
393
394&dss {
395 status = "ok";
396
397 pinctrl-names = "default";
398 pinctrl-0 = <
399 &dss_dpi_pins1
400 &dss_dpi_pins2
401 >;
402
403 port {
404 dpi_out: endpoint {
405 remote-endpoint = <&tfp410_in>;
406 data-lines = <24>;
407 };
408 };
409};
410
411&venc {
412 status = "ok";
413
414 vdda-supply = <&vdac>;
415
416 port {
417 venc_out: endpoint {
418 remote-endpoint = <&tv_connector_in>;
419 ti,channels = <2>;
420 };
421 };
422};