[mirror_ubuntu-eoan-kernel.git] / arch / arm / boot / dts / omap3-beagle.dts

/*
 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
/dts-v1/;

#include "omap34xx.dtsi"

/ {
	model = "TI OMAP3 BeagleBoard";
	compatible = "ti,omap3-beagle", "ti,omap3";

	cpus {
		cpu@0 {
			cpu0-supply = <&vcc>;
		};
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x10000000>; /* 256 MB */
	};

	aliases {
		display0 = &dvi0;
		display1 = &tv0;
	};

	leds {
		compatible = "gpio-leds";
		pmu_stat {
			label = "beagleboard::pmu_stat";
			gpios = <&twl_gpio 19 GPIO_ACTIVE_HIGH>; /* LEDB */
		};

		heartbeat {
			label = "beagleboard::usr0";
			gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>; /* 150 -> D6 LED */
			linux,default-trigger = "heartbeat";
		};

		mmc {
			label = "beagleboard::usr1";
			gpios = <&gpio5 21 GPIO_ACTIVE_HIGH>; /* 149 -> D7 LED */
			linux,default-trigger = "mmc0";
		};
	};

	/* HS USB Port 2 Power */
	hsusb2_power: hsusb2_power_reg {
		compatible = "regulator-fixed";
		regulator-name = "hsusb2_vbus";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&twl_gpio 18 GPIO_ACTIVE_HIGH>;	/* GPIO LEDA */
		startup-delay-us = <70000>;
	};

	/* HS USB Host PHY on PORT 2 */
	hsusb2_phy: hsusb2_phy {
		compatible = "usb-nop-xceiv";
		reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>;	/* gpio_147 */
		vcc-supply = <&hsusb2_power>;
		#phy-cells = <0>;
	};

	sound {
		compatible = "ti,omap-twl4030";
		ti,model = "omap3beagle";

		ti,mcbsp = <&mcbsp2>;
	};

	gpio_keys {
		compatible = "gpio-keys";

		user {
			label = "user";
			gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
			linux,code = <0x114>;
			wakeup-source;
		};

	};

	tfp410: encoder0 {
		compatible = "ti,tfp410";
		powerdown-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>;	/* gpio_170 */

		pinctrl-names = "default";
		pinctrl-0 = <&tfp410_pins>;

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;

				tfp410_in: endpoint {
					remote-endpoint = <&dpi_out>;
				};
			};

			port@1 {
				reg = <1>;

				tfp410_out: endpoint {
					remote-endpoint = <&dvi_connector_in>;
				};
			};
		};
	};

	dvi0: connector0 {
		compatible = "dvi-connector";
		label = "dvi";

		digital;

		ddc-i2c-bus = <&i2c3>;

		port {
			dvi_connector_in: endpoint {
				remote-endpoint = <&tfp410_out>;
			};
		};
	};

	tv0: connector1 {
		compatible = "svideo-connector";
		label = "tv";

		port {
			tv_connector_in: endpoint {
				remote-endpoint = <&venc_out>;
			};
		};
	};

	etb@540000000 {
		compatible = "arm,coresight-etb10", "arm,primecell";
		reg = <0x5401b000 0x1000>;

		clocks = <&emu_src_ck>;
		clock-names = "apb_pclk";
		in-ports {
			port {
				etb_in: endpoint {
					remote-endpoint = <&etm_out>;
				};
			};
		};
	};

	etm@54010000 {
		compatible = "arm,coresight-etm3x", "arm,primecell";
		reg = <0x54010000 0x1000>;

		clocks = <&emu_src_ck>;
		clock-names = "apb_pclk";
		out-ports {
			port {
				etm_out: endpoint {
					remote-endpoint = <&etb_in>;
				};
			};
		};
	};
};

&omap3_pmx_wkup {
	gpio1_pins: pinmux_gpio1_pins {
		pinctrl-single,pins = <
			OMAP3_WKUP_IOPAD(0x2a14, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_boot5.gpio_7 */
		>;
	};
};

&omap3_pmx_core {
	pinctrl-names = "default";
	pinctrl-0 = <
			&hsusb2_pins
	>;

	hsusb2_pins: pinmux_hsusb2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi1_cs3.hsusb2_data2 */
			OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_clk.hsusb2_data7 */
			OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_simo.hsusb2_data4 */
			OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_somi.hsusb2_data5 */
			OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_cs0.hsusb2_data6 */
			OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_cs1.hsusb2_data3 */
		>;
	};

	uart3_pins: pinmux_uart3_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
			OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
		>;
	};

	tfp410_pins: pinmux_tfp410_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21c6, PIN_OUTPUT | MUX_MODE4)	/* hdq_sio.gpio_170 */
		>;
	};

	dss_dpi_pins: pinmux_dss_dpi_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0)   /* dss_pclk.dss_pclk */
			OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0)   /* dss_hsync.dss_hsync */
			OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0)   /* dss_vsync.dss_vsync */
			OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0)   /* dss_acbias.dss_acbias */
			OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0)   /* dss_data0.dss_data0 */
			OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0)   /* dss_data1.dss_data1 */
			OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0)   /* dss_data2.dss_data2 */
			OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0)   /* dss_data3.dss_data3 */
			OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0)   /* dss_data4.dss_data4 */
			OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0)   /* dss_data5.dss_data5 */
			OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0)   /* dss_data6.dss_data6 */
			OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0)   /* dss_data7.dss_data7 */
			OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0)   /* dss_data8.dss_data8 */
			OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0)   /* dss_data9.dss_data9 */
			OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0)   /* dss_data10.dss_data10 */
			OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0)   /* dss_data11.dss_data11 */
			OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0)   /* dss_data12.dss_data12 */
			OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0)   /* dss_data13.dss_data13 */
			OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0)   /* dss_data14.dss_data14 */
			OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0)   /* dss_data15.dss_data15 */
			OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0)   /* dss_data16.dss_data16 */
			OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0)   /* dss_data17.dss_data17 */
			OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0)   /* dss_data18.dss_data18 */
			OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0)   /* dss_data19.dss_data19 */
			OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0)   /* dss_data20.dss_data20 */
			OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0)   /* dss_data21.dss_data21 */
			OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0)   /* dss_data22.dss_data22 */
			OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0)   /* dss_data23.dss_data23 */
		>;
	};
};

&omap3_pmx_core2 {
	pinctrl-names = "default";
	pinctrl-0 = <
			&hsusb2_2_pins
	>;

	hsusb2_2_pins: pinmux_hsusb2_2_pins {
		pinctrl-single,pins = <
			OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)		/* etk_d10.hsusb2_clk */
			OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)		/* etk_d11.hsusb2_stp */
			OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d12.hsusb2_dir */
			OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d13.hsusb2_nxt */
			OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d14.hsusb2_data0 */
			OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d15.hsusb2_data1 */
		>;
	};
};

&i2c1 {
	clock-frequency = <2600000>;

	twl: twl@48 {
		reg = <0x48>;
		interrupts = <7>; /* SYS_NIRQ cascaded to intc */
		interrupt-parent = <&intc>;

		twl_audio: audio {
			compatible = "ti,twl4030-audio";
			codec {
			};
		};
	};
};

#include "twl4030.dtsi"
#include "twl4030_omap3.dtsi"

&i2c3 {
	clock-frequency = <100000>;
};

&mmc1 {
	vmmc-supply = <&vmmc1>;
	vqmmc-supply = <&vsim>;
	bus-width = <8>;
};

&mmc2 {
	status = "disabled";
};

&mmc3 {
	status = "disabled";
};

&usbhshost {
	port2-mode = "ehci-phy";
};

&usbhsehci {
	phys = <0 &hsusb2_phy>;
};

&twl_gpio {
	ti,use-leds;
	/* pullups: BIT(1) */
	ti,pullups = <0x000002>;
	/*
	 * pulldowns:
	 * BIT(2), BIT(6), BIT(7), BIT(8), BIT(13)
	 * BIT(15), BIT(16), BIT(17)
	 */
	ti,pulldowns = <0x03a1c4>;
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart3_pins>;
	interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
};

&gpio1 {
	pinctrl-names = "default";
	pinctrl-0 = <&gpio1_pins>;
};

&usb_otg_hs {
	interface-type = <0>;
	usb-phy = <&usb2_phy>;
	phys = <&usb2_phy>;
	phy-names = "usb2-phy";
	mode = <3>;
	power = <50>;
};

&vaux2 {
	regulator-name = "vdd_ehci";
	regulator-min-microvolt = <1800000>;
	regulator-max-microvolt = <1800000>;
	regulator-always-on;
};

&mcbsp2 {
	status = "okay";
};

/* Needed to power the DPI pins */
&vpll2 {
	regulator-always-on;
};

&dss {
	status = "ok";

	pinctrl-names = "default";
	pinctrl-0 = <&dss_dpi_pins>;

	port {
		dpi_out: endpoint {
			remote-endpoint = <&tfp410_in>;
			data-lines = <24>;
		};
	};
};

&venc {
	status = "ok";

	vdda-supply = <&vdac>;

	port {
		venc_out: endpoint {
			remote-endpoint = <&tv_connector_in>;
			ti,channels = <2>;
		};
	};
};

&gpmc {
	status = "ok";
	ranges = <0 0 0x30000000 0x1000000>;	/* CS0 space, 16MB */

	/* Chip select 0 */
	nand@0,0 {
		compatible = "ti,omap2-nand";
		reg = <0 0 4>;		/* NAND I/O window, 4 bytes */
		interrupt-parent = <&gpmc>;
		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
			     <1 IRQ_TYPE_NONE>;	/* termcount */
		ti,nand-ecc-opt = "ham1";
		rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
		nand-bus-width = <16>;
		#address-cells = <1>;
		#size-cells = <1>;

		gpmc,device-width = <2>;
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <36>;
		gpmc,cs-wr-off-ns = <36>;
		gpmc,adv-on-ns = <6>;
		gpmc,adv-rd-off-ns = <24>;
		gpmc,adv-wr-off-ns = <36>;
		gpmc,oe-on-ns = <6>;
		gpmc,oe-off-ns = <48>;
		gpmc,we-on-ns = <6>;
		gpmc,we-off-ns = <30>;
		gpmc,rd-cycle-ns = <72>;
		gpmc,wr-cycle-ns = <72>;
		gpmc,access-ns = <54>;
		gpmc,wr-access-ns = <30>;

		partition@0 {
			label = "X-Loader";
			reg = <0 0x80000>;
		};
		partition@80000 {
			label = "U-Boot";
			reg = <0x80000 0x1e0000>;
		};
		partition@1c0000 {
			label = "U-Boot Env";
			reg = <0x260000 0x20000>;
		};
		partition@280000 {
			label = "Kernel";
			reg = <0x280000 0x400000>;
		};
		partition@780000 {
			label = "Filesystem";
			reg = <0x680000 0xf980000>;
		};
	};
};
Commit	Line	Data
5a8095e9 JH	1	/*
	2	* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License version 2 as
	6	* published by the Free Software Foundation.
	7	*/
	8	/dts-v1/;
	9
98ef7957	10	#include "omap34xx.dtsi"
5a8095e9 JH	11
	12	/ {
	13	model = "TI OMAP3 BeagleBoard";
	14	compatible = "ti,omap3-beagle", "ti,omap3";
	15
a134be34 NM	16	cpus {
	17	cpu@0 {
	18	cpu0-supply = <&vcc>;
	19	};
	20	};
	21
81777ff9	22	memory@80000000 {
5a8095e9 JH	23	device_type = "memory";
	24	reg = <0x80000000 0x10000000>; /* 256 MB */
	25	};
	26
8cecf52b TV	27	aliases {
	28	display0 = &dvi0;
	29	display1 = &tv0;
	30	};
	31
5a8095e9 JH	32	leds {
	33	compatible = "gpio-leds";
	34	pmu_stat {
	35	label = "beagleboard::pmu_stat";
6d624eab	36	gpios = <&twl_gpio 19 GPIO_ACTIVE_HIGH>; /* LEDB */
5a8095e9 JH	37	};
	38
	39	heartbeat {
	40	label = "beagleboard::usr0";
6d624eab	41	gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>; /* 150 -> D6 LED */
5a8095e9 JH	42	linux,default-trigger = "heartbeat";
	43	};
	44
	45	mmc {
	46	label = "beagleboard::usr1";
6d624eab	47	gpios = <&gpio5 21 GPIO_ACTIVE_HIGH>; /* 149 -> D7 LED */
5a8095e9 JH	48	linux,default-trigger = "mmc0";
	49	};
	50	};
	51
2e5f78ae RQ	52	/* HS USB Port 2 Power */
	53	hsusb2_power: hsusb2_power_reg {
	54	compatible = "regulator-fixed";
	55	regulator-name = "hsusb2_vbus";
	56	regulator-min-microvolt = <3300000>;
	57	regulator-max-microvolt = <3300000>;
3a637e00	58	gpio = <&twl_gpio 18 GPIO_ACTIVE_HIGH>; /* GPIO LEDA */
2e5f78ae RQ	59	startup-delay-us = <70000>;
	60	};
	61
	62	/* HS USB Host PHY on PORT 2 */
	63	hsusb2_phy: hsusb2_phy {
	64	compatible = "usb-nop-xceiv";
633b940f	65	reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>; /* gpio_147 */
2e5f78ae	66	vcc-supply = <&hsusb2_power>;
f568f6f5	67	#phy-cells = <0>;
2e5f78ae	68	};
d641c3d5	69
33e9c392 JN	70	sound {
	71	compatible = "ti,omap-twl4030";
	72	ti,model = "omap3beagle";
	73
	74	ti,mcbsp = <&mcbsp2>;
33e9c392 JN	75	};
33e9c392 JN	76
d641c3d5 KH	77	gpio_keys {
	78	compatible = "gpio-keys";
	79
	80	user {
	81	label = "user";
	82	gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
	83	linux,code = <0x114>;
0c4d63b3	84	wakeup-source;
d641c3d5 KH	85	};
	86
	87	};
8cecf52b	88
a3c4c757	89	tfp410: encoder0 {
8cecf52b TV	90	compatible = "ti,tfp410";
	91	powerdown-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>; /* gpio_170 */
	92
	93	pinctrl-names = "default";
	94	pinctrl-0 = <&tfp410_pins>;
	95
	96	ports {
	97	#address-cells = <1>;
	98	#size-cells = <0>;
	99
	100	port@0 {
	101	reg = <0>;
	102
a3c4c757	103	tfp410_in: endpoint {
8cecf52b TV	104	remote-endpoint = <&dpi_out>;
	105	};
	106	};
	107
	108	port@1 {
	109	reg = <1>;
	110
a3c4c757	111	tfp410_out: endpoint {
8cecf52b TV	112	remote-endpoint = <&dvi_connector_in>;
	113	};
	114	};
	115	};
	116	};
	117
a3c4c757	118	dvi0: connector0 {
8cecf52b TV	119	compatible = "dvi-connector";
	120	label = "dvi";
	121
	122	digital;
	123
	124	ddc-i2c-bus = <&i2c3>;
	125
	126	port {
	127	dvi_connector_in: endpoint {
	128	remote-endpoint = <&tfp410_out>;
	129	};
	130	};
	131	};
	132
a3c4c757	133	tv0: connector1 {
8cecf52b TV	134	compatible = "svideo-connector";
	135	label = "tv";
	136
	137	port {
	138	tv_connector_in: endpoint {
	139	remote-endpoint = <&venc_out>;
	140	};
	141	};
	142	};
9d316202 MP	143
	144	etb@540000000 {
	145	compatible = "arm,coresight-etb10", "arm,primecell";
	146	reg = <0x5401b000 0x1000>;
	147
9d316202 MP	148	clocks = <&emu_src_ck>;
9d316202 MP	149	clock-names = "apb_pclk";
f2b07213 SP	150	in-ports {
	151	port {
	152	etb_in: endpoint {
	153	remote-endpoint = <&etm_out>;
	154	};
9d316202 MP	155	};
	156	};
	157	};
	158
	159	etm@54010000 {
	160	compatible = "arm,coresight-etm3x", "arm,primecell";
	161	reg = <0x54010000 0x1000>;
	162
	163	clocks = <&emu_src_ck>;
	164	clock-names = "apb_pclk";
f2b07213 SP	165	out-ports {
	166	port {
	167	etm_out: endpoint {
	168	remote-endpoint = <&etb_in>;
	169	};
9d316202 MP	170	};
	171	};
	172	};
d641c3d5 KH	173	};
	174
	175	&omap3_pmx_wkup {
	176	gpio1_pins: pinmux_gpio1_pins {
	177	pinctrl-single,pins = <
161312d6	178	OMAP3_WKUP_IOPAD(0x2a14, PIN_INPUT \| PIN_OFF_WAKEUPENABLE \| MUX_MODE4) /* sys_boot5.gpio_7 */
d641c3d5 KH	179	>;
d641c3d5 KH	180	};
2e5f78ae RQ	181	};
	182
	183	&omap3_pmx_core {
	184	pinctrl-names = "default";
	185	pinctrl-0 = <
3d495383	186	&hsusb2_pins
2e5f78ae RQ	187	>;
2e5f78ae RQ	188
3d495383	189	hsusb2_pins: pinmux_hsusb2_pins {
2e5f78ae	190	pinctrl-single,pins = <
3d495383 LP	191	OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */
	192	OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */
	193	OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */
	194	OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */
	195	OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */
	196	OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */
2e5f78ae RQ	197	>;
2e5f78ae RQ	198	};
b859c1ef KH	199
	200	uart3_pins: pinmux_uart3_pins {
	201	pinctrl-single,pins = <
161312d6 JMC	202	OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT \| PIN_OFF_WAKEUPENABLE \| MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
161312d6 JMC	203	OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT \| MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
b859c1ef KH	204	>;
b859c1ef KH	205	};
8cecf52b TV	206
	207	tfp410_pins: pinmux_tfp410_pins {
	208	pinctrl-single,pins = <
161312d6	209	OMAP3_CORE1_IOPAD(0x21c6, PIN_OUTPUT \| MUX_MODE4) /* hdq_sio.gpio_170 */
8cecf52b TV	210	>;
	211	};
	212
	213	dss_dpi_pins: pinmux_dss_dpi_pins {
	214	pinctrl-single,pins = <
161312d6 JMC	215	OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT \| MUX_MODE0) /* dss_pclk.dss_pclk */
	216	OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT \| MUX_MODE0) /* dss_hsync.dss_hsync */
	217	OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT \| MUX_MODE0) /* dss_vsync.dss_vsync */
	218	OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT \| MUX_MODE0) /* dss_acbias.dss_acbias */
	219	OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT \| MUX_MODE0) /* dss_data0.dss_data0 */
	220	OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT \| MUX_MODE0) /* dss_data1.dss_data1 */
	221	OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT \| MUX_MODE0) /* dss_data2.dss_data2 */
	222	OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT \| MUX_MODE0) /* dss_data3.dss_data3 */
	223	OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT \| MUX_MODE0) /* dss_data4.dss_data4 */
	224	OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT \| MUX_MODE0) /* dss_data5.dss_data5 */
	225	OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT \| MUX_MODE0) /* dss_data6.dss_data6 */
	226	OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT \| MUX_MODE0) /* dss_data7.dss_data7 */
	227	OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT \| MUX_MODE0) /* dss_data8.dss_data8 */
	228	OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT \| MUX_MODE0) /* dss_data9.dss_data9 */
	229	OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT \| MUX_MODE0) /* dss_data10.dss_data10 */
	230	OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT \| MUX_MODE0) /* dss_data11.dss_data11 */
	231	OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT \| MUX_MODE0) /* dss_data12.dss_data12 */
	232	OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT \| MUX_MODE0) /* dss_data13.dss_data13 */
	233	OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT \| MUX_MODE0) /* dss_data14.dss_data14 */
	234	OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT \| MUX_MODE0) /* dss_data15.dss_data15 */
	235	OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT \| MUX_MODE0) /* dss_data16.dss_data16 */
	236	OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT \| MUX_MODE0) /* dss_data17.dss_data17 */
	237	OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT \| MUX_MODE0) /* dss_data18.dss_data18 */
	238	OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT \| MUX_MODE0) /* dss_data19.dss_data19 */
	239	OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT \| MUX_MODE0) /* dss_data20.dss_data20 */
	240	OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT \| MUX_MODE0) /* dss_data21.dss_data21 */
	241	OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT \| MUX_MODE0) /* dss_data22.dss_data22 */
	242	OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT \| MUX_MODE0) /* dss_data23.dss_data23 */
8cecf52b TV	243	>;
8cecf52b TV	244	};
5a8095e9 JH	245	};
5a8095e9 JH	246
3d495383 LP	247	&omap3_pmx_core2 {
	248	pinctrl-names = "default";
	249	pinctrl-0 = <
	250	&hsusb2_2_pins
	251	>;
	252
	253	hsusb2_2_pins: pinmux_hsusb2_2_pins {
	254	pinctrl-single,pins = <
	255	OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT \| MUX_MODE3) /* etk_d10.hsusb2_clk */
	256	OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT \| MUX_MODE3) /* etk_d11.hsusb2_stp */
	257	OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* etk_d12.hsusb2_dir */
	258	OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* etk_d13.hsusb2_nxt */
	259	OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* etk_d14.hsusb2_data0 */
	260	OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* etk_d15.hsusb2_data1 */
	261	>;
	262	};
	263	};
	264
5a8095e9 JH	265	&i2c1 {
	266	clock-frequency = <2600000>;
	267
	268	twl: twl@48 {
	269	reg = <0x48>;
	270	interrupts = <7>; /* SYS_NIRQ cascaded to intc */
	271	interrupt-parent = <&intc>;
33e9c392 JN	272
	273	twl_audio: audio {
	274	compatible = "ti,twl4030-audio";
	275	codec {
	276	};
	277	};
5a8095e9 JH	278	};
	279	};
	280
98ef7957	281	#include "twl4030.dtsi"
f9688457	282	#include "twl4030_omap3.dtsi"
5a8095e9	283
8cecf52b TV	284	&i2c3 {
	285	clock-frequency = <100000>;
	286	};
	287
5a8095e9 JH	288	&mmc1 {
5a8095e9 JH	289	vmmc-supply = <&vmmc1>;
45ea75eb	290	vqmmc-supply = <&vsim>;
5a8095e9 JH	291	bus-width = <8>;
	292	};
	293
	294	&mmc2 {
	295	status = "disabled";
	296	};
	297
	298	&mmc3 {
	299	status = "disabled";
	300	};
2e5f78ae RQ	301
	302	&usbhshost {
	303	port2-mode = "ehci-phy";
	304	};
	305
	306	&usbhsehci {
	307	phys = <0 &hsusb2_phy>;
	308	};
	309
	310	&twl_gpio {
	311	ti,use-leds;
	312	/* pullups: BIT(1) */
	313	ti,pullups = <0x000002>;
	314	/*
	315	* pulldowns:
	316	* BIT(2), BIT(6), BIT(7), BIT(8), BIT(13)
	317	* BIT(15), BIT(16), BIT(17)
	318	*/
	319	ti,pulldowns = <0x03a1c4>;
	320	};
b859c1ef KH	321
	322	&uart3 {
	323	pinctrl-names = "default";
	324	pinctrl-0 = <&uart3_pins>;
c15adae8	325	interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
b859c1ef	326	};
d641c3d5 KH	327
	328	&gpio1 {
	329	pinctrl-names = "default";
	330	pinctrl-0 = <&gpio1_pins>;
	331	};
81660208 RQ	332
	333	&usb_otg_hs {
	334	interface-type = <0>;
	335	usb-phy = <&usb2_phy>;
b462b05a RQ	336	phys = <&usb2_phy>;
b462b05a RQ	337	phy-names = "usb2-phy";
81660208 RQ	338	mode = <3>;
	339	power = <50>;
	340	};
30023a7e RQ	341
	342	&vaux2 {
	343	regulator-name = "vdd_ehci";
	344	regulator-min-microvolt = <1800000>;
	345	regulator-max-microvolt = <1800000>;
	346	regulator-always-on;
	347	};
726322ce PU	348
	349	&mcbsp2 {
	350	status = "okay";
	351	};
8cecf52b TV	352
	353	/* Needed to power the DPI pins */
	354	&vpll2 {
	355	regulator-always-on;
	356	};
	357
	358	&dss {
	359	status = "ok";
	360
	361	pinctrl-names = "default";
	362	pinctrl-0 = <&dss_dpi_pins>;
	363
	364	port {
	365	dpi_out: endpoint {
	366	remote-endpoint = <&tfp410_in>;
	367	data-lines = <24>;
	368	};
	369	};
	370	};
	371
	372	&venc {
	373	status = "ok";
	374
	375	vdda-supply = <&vdac>;
	376
	377	port {
	378	venc_out: endpoint {
	379	remote-endpoint = <&tv_connector_in>;
	380	ti,channels = <2>;
	381	};
	382	};
	383	};
d37530a0 RQ	384
	385	&gpmc {
	386	status = "ok";
	387	ranges = <0 0 0x30000000 0x1000000>; /* CS0 space, 16MB */
	388
	389	/* Chip select 0 */
	390	nand@0,0 {
44e47164	391	compatible = "ti,omap2-nand";
d37530a0	392	reg = <0 0 4>; /* NAND I/O window, 4 bytes */
44e47164 RQ	393	interrupt-parent = <&gpmc>;
	394	interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
	395	<1 IRQ_TYPE_NONE>; /* termcount */
d37530a0	396	ti,nand-ecc-opt = "ham1";
4cb53a23	397	rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
d37530a0 RQ	398	nand-bus-width = <16>;
	399	#address-cells = <1>;
	400	#size-cells = <1>;
	401
	402	gpmc,device-width = <2>;
	403	gpmc,cs-on-ns = <0>;
	404	gpmc,cs-rd-off-ns = <36>;
	405	gpmc,cs-wr-off-ns = <36>;
	406	gpmc,adv-on-ns = <6>;
	407	gpmc,adv-rd-off-ns = <24>;
	408	gpmc,adv-wr-off-ns = <36>;
	409	gpmc,oe-on-ns = <6>;
	410	gpmc,oe-off-ns = <48>;
	411	gpmc,we-on-ns = <6>;
	412	gpmc,we-off-ns = <30>;
	413	gpmc,rd-cycle-ns = <72>;
	414	gpmc,wr-cycle-ns = <72>;
	415	gpmc,access-ns = <54>;
	416	gpmc,wr-access-ns = <30>;
	417
	418	partition@0 {
	419	label = "X-Loader";
	420	reg = <0 0x80000>;
	421	};
	422	partition@80000 {
	423	label = "U-Boot";
	424	reg = <0x80000 0x1e0000>;
	425	};
	426	partition@1c0000 {
	427	label = "U-Boot Env";
	428	reg = <0x260000 0x20000>;
	429	};
	430	partition@280000 {
	431	label = "Kernel";
	432	reg = <0x280000 0x400000>;
	433	};
	434	partition@780000 {
	435	label = "Filesystem";
	436	reg = <0x680000 0xf980000>;
	437	};
	438	};
	439	};