[mirror_ubuntu-artful-kernel.git] / arch / arm / boot / dts / omap3-beagle.dts

/*
 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
/dts-v1/;

#include "omap34xx.dtsi"

/ {
	model = "TI OMAP3 BeagleBoard";
	compatible = "ti,omap3-beagle", "ti,omap3";

	cpus {
		cpu@0 {
			cpu0-supply = <&vcc>;
		};
	};

	memory {
		device_type = "memory";
		reg = <0x80000000 0x10000000>; /* 256 MB */
	};

	aliases {
		display0 = &dvi0;
		display1 = &tv0;
	};

	leds {
		compatible = "gpio-leds";
		pmu_stat {
			label = "beagleboard::pmu_stat";
			gpios = <&twl_gpio 19 GPIO_ACTIVE_HIGH>; /* LEDB */
		};

		heartbeat {
			label = "beagleboard::usr0";
			gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>; /* 150 -> D6 LED */
			linux,default-trigger = "heartbeat";
		};

		mmc {
			label = "beagleboard::usr1";
			gpios = <&gpio5 21 GPIO_ACTIVE_HIGH>; /* 149 -> D7 LED */
			linux,default-trigger = "mmc0";
		};
	};

	/* HS USB Port 2 Power */
	hsusb2_power: hsusb2_power_reg {
		compatible = "regulator-fixed";
		regulator-name = "hsusb2_vbus";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&twl_gpio 18 GPIO_ACTIVE_HIGH>;	/* GPIO LEDA */
		startup-delay-us = <70000>;
	};

	/* HS USB Host PHY on PORT 2 */
	hsusb2_phy: hsusb2_phy {
		compatible = "usb-nop-xceiv";
		reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>;	/* gpio_147 */
		vcc-supply = <&hsusb2_power>;
	};

	sound {
		compatible = "ti,omap-twl4030";
		ti,model = "omap3beagle";

		ti,mcbsp = <&mcbsp2>;
	};

	gpio_keys {
		compatible = "gpio-keys";

		user {
			label = "user";
			gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
			linux,code = <0x114>;
			gpio-key,wakeup;
		};

	};

	tfp410: encoder@0 {
		compatible = "ti,tfp410";
		powerdown-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>;	/* gpio_170 */

		pinctrl-names = "default";
		pinctrl-0 = <&tfp410_pins>;

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;

				tfp410_in: endpoint@0 {
					remote-endpoint = <&dpi_out>;
				};
			};

			port@1 {
				reg = <1>;

				tfp410_out: endpoint@0 {
					remote-endpoint = <&dvi_connector_in>;
				};
			};
		};
	};

	dvi0: connector@0 {
		compatible = "dvi-connector";
		label = "dvi";

		digital;

		ddc-i2c-bus = <&i2c3>;

		port {
			dvi_connector_in: endpoint {
				remote-endpoint = <&tfp410_out>;
			};
		};
	};

	tv0: connector@1 {
		compatible = "svideo-connector";
		label = "tv";

		port {
			tv_connector_in: endpoint {
				remote-endpoint = <&venc_out>;
			};
		};
	};

	etb@540000000 {
		compatible = "arm,coresight-etb10", "arm,primecell";
		reg = <0x5401b000 0x1000>;

		clocks = <&emu_src_ck>;
		clock-names = "apb_pclk";
		port {
			etb_in: endpoint {
				slave-mode;
				remote-endpoint = <&etm_out>;
			};
		};
	};

	etm@54010000 {
		compatible = "arm,coresight-etm3x", "arm,primecell";
		reg = <0x54010000 0x1000>;

		clocks = <&emu_src_ck>;
		clock-names = "apb_pclk";
		port {
			etm_out: endpoint {
				remote-endpoint = <&etb_in>;
			};
		};
	};
};

&omap3_pmx_wkup {
	gpio1_pins: pinmux_gpio1_pins {
		pinctrl-single,pins = <
			0x14 (PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_boot5.gpio_7 */
		>;
	};
};

&omap3_pmx_core {
	pinctrl-names = "default";
	pinctrl-0 = <
			&hsusb2_pins
	>;

	hsusb2_pins: pinmux_hsusb2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi1_cs3.hsusb2_data2 */
			OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_clk.hsusb2_data7 */
			OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_simo.hsusb2_data4 */
			OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_somi.hsusb2_data5 */
			OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_cs0.hsusb2_data6 */
			OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_cs1.hsusb2_data3 */
		>;
	};

	uart3_pins: pinmux_uart3_pins {
		pinctrl-single,pins = <
			0x16e (PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
			0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
		>;
	};

	tfp410_pins: pinmux_tfp410_pins {
		pinctrl-single,pins = <
			0x196 (PIN_OUTPUT | MUX_MODE4)	/* hdq_sio.gpio_170 */
		>;
	};

	dss_dpi_pins: pinmux_dss_dpi_pins {
		pinctrl-single,pins = <
			0x0a4 (PIN_OUTPUT | MUX_MODE0)   /* dss_pclk.dss_pclk */
			0x0a6 (PIN_OUTPUT | MUX_MODE0)   /* dss_hsync.dss_hsync */
			0x0a8 (PIN_OUTPUT | MUX_MODE0)   /* dss_vsync.dss_vsync */
			0x0aa (PIN_OUTPUT | MUX_MODE0)   /* dss_acbias.dss_acbias */
			0x0ac (PIN_OUTPUT | MUX_MODE0)   /* dss_data0.dss_data0 */
			0x0ae (PIN_OUTPUT | MUX_MODE0)   /* dss_data1.dss_data1 */
			0x0b0 (PIN_OUTPUT | MUX_MODE0)   /* dss_data2.dss_data2 */
			0x0b2 (PIN_OUTPUT | MUX_MODE0)   /* dss_data3.dss_data3 */
			0x0b4 (PIN_OUTPUT | MUX_MODE0)   /* dss_data4.dss_data4 */
			0x0b6 (PIN_OUTPUT | MUX_MODE0)   /* dss_data5.dss_data5 */
			0x0b8 (PIN_OUTPUT | MUX_MODE0)   /* dss_data6.dss_data6 */
			0x0ba (PIN_OUTPUT | MUX_MODE0)   /* dss_data7.dss_data7 */
			0x0bc (PIN_OUTPUT | MUX_MODE0)   /* dss_data8.dss_data8 */
			0x0be (PIN_OUTPUT | MUX_MODE0)   /* dss_data9.dss_data9 */
			0x0c0 (PIN_OUTPUT | MUX_MODE0)   /* dss_data10.dss_data10 */
			0x0c2 (PIN_OUTPUT | MUX_MODE0)   /* dss_data11.dss_data11 */
			0x0c4 (PIN_OUTPUT | MUX_MODE0)   /* dss_data12.dss_data12 */
			0x0c6 (PIN_OUTPUT | MUX_MODE0)   /* dss_data13.dss_data13 */
			0x0c8 (PIN_OUTPUT | MUX_MODE0)   /* dss_data14.dss_data14 */
			0x0ca (PIN_OUTPUT | MUX_MODE0)   /* dss_data15.dss_data15 */
			0x0cc (PIN_OUTPUT | MUX_MODE0)   /* dss_data16.dss_data16 */
			0x0ce (PIN_OUTPUT | MUX_MODE0)   /* dss_data17.dss_data17 */
			0x0d0 (PIN_OUTPUT | MUX_MODE0)   /* dss_data18.dss_data18 */
			0x0d2 (PIN_OUTPUT | MUX_MODE0)   /* dss_data19.dss_data19 */
			0x0d4 (PIN_OUTPUT | MUX_MODE0)   /* dss_data20.dss_data20 */
			0x0d6 (PIN_OUTPUT | MUX_MODE0)   /* dss_data21.dss_data21 */
			0x0d8 (PIN_OUTPUT | MUX_MODE0)   /* dss_data22.dss_data22 */
			0x0da (PIN_OUTPUT | MUX_MODE0)   /* dss_data23.dss_data23 */
		>;
	};
};

&omap3_pmx_core2 {
	pinctrl-names = "default";
	pinctrl-0 = <
			&hsusb2_2_pins
	>;

	hsusb2_2_pins: pinmux_hsusb2_2_pins {
		pinctrl-single,pins = <
			OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)		/* etk_d10.hsusb2_clk */
			OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)		/* etk_d11.hsusb2_stp */
			OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d12.hsusb2_dir */
			OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d13.hsusb2_nxt */
			OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d14.hsusb2_data0 */
			OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d15.hsusb2_data1 */
		>;
	};
};

&i2c1 {
	clock-frequency = <2600000>;

	twl: twl@48 {
		reg = <0x48>;
		interrupts = <7>; /* SYS_NIRQ cascaded to intc */
		interrupt-parent = <&intc>;

		twl_audio: audio {
			compatible = "ti,twl4030-audio";
			codec {
			};
		};
	};
};

#include "twl4030.dtsi"
#include "twl4030_omap3.dtsi"

&i2c3 {
	clock-frequency = <100000>;
};

&mmc1 {
	vmmc-supply = <&vmmc1>;
	vmmc_aux-supply = <&vsim>;
	bus-width = <8>;
};

&mmc2 {
	status = "disabled";
};

&mmc3 {
	status = "disabled";
};

&usbhshost {
	port2-mode = "ehci-phy";
};

&usbhsehci {
	phys = <0 &hsusb2_phy>;
};

&twl_gpio {
	ti,use-leds;
	/* pullups: BIT(1) */
	ti,pullups = <0x000002>;
	/*
	 * pulldowns:
	 * BIT(2), BIT(6), BIT(7), BIT(8), BIT(13)
	 * BIT(15), BIT(16), BIT(17)
	 */
	ti,pulldowns = <0x03a1c4>;
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart3_pins>;
	interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
};

&gpio1 {
	pinctrl-names = "default";
	pinctrl-0 = <&gpio1_pins>;
};

&usb_otg_hs {
	interface-type = <0>;
	usb-phy = <&usb2_phy>;
	phys = <&usb2_phy>;
	phy-names = "usb2-phy";
	mode = <3>;
	power = <50>;
};

&vaux2 {
	regulator-name = "vdd_ehci";
	regulator-min-microvolt = <1800000>;
	regulator-max-microvolt = <1800000>;
	regulator-always-on;
};

&mcbsp2 {
	status = "okay";
};

/* Needed to power the DPI pins */
&vpll2 {
	regulator-always-on;
};

&dss {
	status = "ok";

	pinctrl-names = "default";
	pinctrl-0 = <&dss_dpi_pins>;

	port {
		dpi_out: endpoint {
			remote-endpoint = <&tfp410_in>;
			data-lines = <24>;
		};
	};
};

&venc {
	status = "ok";

	vdda-supply = <&vdac>;

	port {
		venc_out: endpoint {
			remote-endpoint = <&tv_connector_in>;
			ti,channels = <2>;
		};
	};
};

&gpmc {
	status = "ok";
	ranges = <0 0 0x30000000 0x1000000>;	/* CS0 space, 16MB */

	/* Chip select 0 */
	nand@0,0 {
		reg = <0 0 4>;		/* NAND I/O window, 4 bytes */
		interrupts = <20>;
		ti,nand-ecc-opt = "ham1";
		nand-bus-width = <16>;
		#address-cells = <1>;
		#size-cells = <1>;

		gpmc,device-width = <2>;
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <36>;
		gpmc,cs-wr-off-ns = <36>;
		gpmc,adv-on-ns = <6>;
		gpmc,adv-rd-off-ns = <24>;
		gpmc,adv-wr-off-ns = <36>;
		gpmc,oe-on-ns = <6>;
		gpmc,oe-off-ns = <48>;
		gpmc,we-on-ns = <6>;
		gpmc,we-off-ns = <30>;
		gpmc,rd-cycle-ns = <72>;
		gpmc,wr-cycle-ns = <72>;
		gpmc,access-ns = <54>;
		gpmc,wr-access-ns = <30>;

		partition@0 {
			label = "X-Loader";
			reg = <0 0x80000>;
		};
		partition@80000 {
			label = "U-Boot";
			reg = <0x80000 0x1e0000>;
		};
		partition@1c0000 {
			label = "U-Boot Env";
			reg = <0x260000 0x20000>;
		};
		partition@280000 {
			label = "Kernel";
			reg = <0x280000 0x400000>;
		};
		partition@780000 {
			label = "Filesystem";
			reg = <0x680000 0xf980000>;
		};
	};
};
Commit	Line	Data
5a8095e9 JH	1	/*
	2	* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License version 2 as
	6	* published by the Free Software Foundation.
	7	*/
	8	/dts-v1/;
	9
98ef7957	10	#include "omap34xx.dtsi"
5a8095e9 JH	11
	12	/ {
	13	model = "TI OMAP3 BeagleBoard";
	14	compatible = "ti,omap3-beagle", "ti,omap3";
	15
a134be34 NM	16	cpus {
	17	cpu@0 {
	18	cpu0-supply = <&vcc>;
	19	};
	20	};
	21
5a8095e9 JH	22	memory {
	23	device_type = "memory";
	24	reg = <0x80000000 0x10000000>; /* 256 MB */
	25	};
	26
8cecf52b TV	27	aliases {
	28	display0 = &dvi0;
	29	display1 = &tv0;
	30	};
	31
5a8095e9 JH	32	leds {
	33	compatible = "gpio-leds";
	34	pmu_stat {
	35	label = "beagleboard::pmu_stat";
6d624eab	36	gpios = <&twl_gpio 19 GPIO_ACTIVE_HIGH>; /* LEDB */
5a8095e9 JH	37	};
	38
	39	heartbeat {
	40	label = "beagleboard::usr0";
6d624eab	41	gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>; /* 150 -> D6 LED */
5a8095e9 JH	42	linux,default-trigger = "heartbeat";
	43	};
	44
	45	mmc {
	46	label = "beagleboard::usr1";
6d624eab	47	gpios = <&gpio5 21 GPIO_ACTIVE_HIGH>; /* 149 -> D7 LED */
5a8095e9 JH	48	linux,default-trigger = "mmc0";
	49	};
	50	};
	51
2e5f78ae RQ	52	/* HS USB Port 2 Power */
	53	hsusb2_power: hsusb2_power_reg {
	54	compatible = "regulator-fixed";
	55	regulator-name = "hsusb2_vbus";
	56	regulator-min-microvolt = <3300000>;
	57	regulator-max-microvolt = <3300000>;
3a637e00	58	gpio = <&twl_gpio 18 GPIO_ACTIVE_HIGH>; /* GPIO LEDA */
2e5f78ae RQ	59	startup-delay-us = <70000>;
	60	};
	61
	62	/* HS USB Host PHY on PORT 2 */
	63	hsusb2_phy: hsusb2_phy {
	64	compatible = "usb-nop-xceiv";
633b940f	65	reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>; /* gpio_147 */
2e5f78ae RQ	66	vcc-supply = <&hsusb2_power>;
2e5f78ae RQ	67	};
d641c3d5	68
33e9c392 JN	69	sound {
	70	compatible = "ti,omap-twl4030";
	71	ti,model = "omap3beagle";
	72
	73	ti,mcbsp = <&mcbsp2>;
33e9c392 JN	74	};
33e9c392 JN	75
d641c3d5 KH	76	gpio_keys {
	77	compatible = "gpio-keys";
	78
	79	user {
	80	label = "user";
	81	gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
	82	linux,code = <0x114>;
	83	gpio-key,wakeup;
	84	};
	85
	86	};
8cecf52b TV	87
	88	tfp410: encoder@0 {
	89	compatible = "ti,tfp410";
	90	powerdown-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>; /* gpio_170 */
	91
	92	pinctrl-names = "default";
	93	pinctrl-0 = <&tfp410_pins>;
	94
	95	ports {
	96	#address-cells = <1>;
	97	#size-cells = <0>;
	98
	99	port@0 {
	100	reg = <0>;
	101
	102	tfp410_in: endpoint@0 {
	103	remote-endpoint = <&dpi_out>;
	104	};
	105	};
	106
	107	port@1 {
	108	reg = <1>;
	109
	110	tfp410_out: endpoint@0 {
	111	remote-endpoint = <&dvi_connector_in>;
	112	};
	113	};
	114	};
	115	};
	116
	117	dvi0: connector@0 {
	118	compatible = "dvi-connector";
	119	label = "dvi";
	120
	121	digital;
	122
	123	ddc-i2c-bus = <&i2c3>;
	124
	125	port {
	126	dvi_connector_in: endpoint {
	127	remote-endpoint = <&tfp410_out>;
	128	};
	129	};
	130	};
	131
	132	tv0: connector@1 {
	133	compatible = "svideo-connector";
	134	label = "tv";
	135
	136	port {
	137	tv_connector_in: endpoint {
	138	remote-endpoint = <&venc_out>;
	139	};
	140	};
	141	};
9d316202 MP	142
	143	etb@540000000 {
	144	compatible = "arm,coresight-etb10", "arm,primecell";
	145	reg = <0x5401b000 0x1000>;
	146
9d316202 MP	147	clocks = <&emu_src_ck>;
	148	clock-names = "apb_pclk";
	149	port {
	150	etb_in: endpoint {
	151	slave-mode;
	152	remote-endpoint = <&etm_out>;
	153	};
	154	};
	155	};
	156
	157	etm@54010000 {
	158	compatible = "arm,coresight-etm3x", "arm,primecell";
	159	reg = <0x54010000 0x1000>;
	160
	161	clocks = <&emu_src_ck>;
	162	clock-names = "apb_pclk";
	163	port {
	164	etm_out: endpoint {
	165	remote-endpoint = <&etb_in>;
	166	};
	167	};
	168	};
d641c3d5 KH	169	};
	170
	171	&omap3_pmx_wkup {
	172	gpio1_pins: pinmux_gpio1_pins {
	173	pinctrl-single,pins = <
	174	0x14 (PIN_INPUT \| PIN_OFF_WAKEUPENABLE \| MUX_MODE4) /* sys_boot5.gpio_7 */
	175	>;
	176	};
2e5f78ae RQ	177	};
	178
	179	&omap3_pmx_core {
	180	pinctrl-names = "default";
	181	pinctrl-0 = <
3d495383	182	&hsusb2_pins
2e5f78ae RQ	183	>;
2e5f78ae RQ	184
3d495383	185	hsusb2_pins: pinmux_hsusb2_pins {
2e5f78ae	186	pinctrl-single,pins = <
3d495383 LP	187	OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */
	188	OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */
	189	OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */
	190	OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */
	191	OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */
	192	OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */
2e5f78ae RQ	193	>;
2e5f78ae RQ	194	};
b859c1ef KH	195
	196	uart3_pins: pinmux_uart3_pins {
	197	pinctrl-single,pins = <
	198	0x16e (PIN_INPUT \| PIN_OFF_WAKEUPENABLE \| MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
	199	0x170 (PIN_OUTPUT \| MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
	200	>;
	201	};
8cecf52b TV	202
	203	tfp410_pins: pinmux_tfp410_pins {
	204	pinctrl-single,pins = <
3a2fa775	205	0x196 (PIN_OUTPUT \| MUX_MODE4) /* hdq_sio.gpio_170 */
8cecf52b TV	206	>;
	207	};
	208
	209	dss_dpi_pins: pinmux_dss_dpi_pins {
	210	pinctrl-single,pins = <
	211	0x0a4 (PIN_OUTPUT \| MUX_MODE0) /* dss_pclk.dss_pclk */
	212	0x0a6 (PIN_OUTPUT \| MUX_MODE0) /* dss_hsync.dss_hsync */
	213	0x0a8 (PIN_OUTPUT \| MUX_MODE0) /* dss_vsync.dss_vsync */
	214	0x0aa (PIN_OUTPUT \| MUX_MODE0) /* dss_acbias.dss_acbias */
	215	0x0ac (PIN_OUTPUT \| MUX_MODE0) /* dss_data0.dss_data0 */
	216	0x0ae (PIN_OUTPUT \| MUX_MODE0) /* dss_data1.dss_data1 */
	217	0x0b0 (PIN_OUTPUT \| MUX_MODE0) /* dss_data2.dss_data2 */
	218	0x0b2 (PIN_OUTPUT \| MUX_MODE0) /* dss_data3.dss_data3 */
	219	0x0b4 (PIN_OUTPUT \| MUX_MODE0) /* dss_data4.dss_data4 */
	220	0x0b6 (PIN_OUTPUT \| MUX_MODE0) /* dss_data5.dss_data5 */
	221	0x0b8 (PIN_OUTPUT \| MUX_MODE0) /* dss_data6.dss_data6 */
	222	0x0ba (PIN_OUTPUT \| MUX_MODE0) /* dss_data7.dss_data7 */
	223	0x0bc (PIN_OUTPUT \| MUX_MODE0) /* dss_data8.dss_data8 */
	224	0x0be (PIN_OUTPUT \| MUX_MODE0) /* dss_data9.dss_data9 */
	225	0x0c0 (PIN_OUTPUT \| MUX_MODE0) /* dss_data10.dss_data10 */
	226	0x0c2 (PIN_OUTPUT \| MUX_MODE0) /* dss_data11.dss_data11 */
	227	0x0c4 (PIN_OUTPUT \| MUX_MODE0) /* dss_data12.dss_data12 */
	228	0x0c6 (PIN_OUTPUT \| MUX_MODE0) /* dss_data13.dss_data13 */
	229	0x0c8 (PIN_OUTPUT \| MUX_MODE0) /* dss_data14.dss_data14 */
	230	0x0ca (PIN_OUTPUT \| MUX_MODE0) /* dss_data15.dss_data15 */
	231	0x0cc (PIN_OUTPUT \| MUX_MODE0) /* dss_data16.dss_data16 */
	232	0x0ce (PIN_OUTPUT \| MUX_MODE0) /* dss_data17.dss_data17 */
	233	0x0d0 (PIN_OUTPUT \| MUX_MODE0) /* dss_data18.dss_data18 */
	234	0x0d2 (PIN_OUTPUT \| MUX_MODE0) /* dss_data19.dss_data19 */
	235	0x0d4 (PIN_OUTPUT \| MUX_MODE0) /* dss_data20.dss_data20 */
	236	0x0d6 (PIN_OUTPUT \| MUX_MODE0) /* dss_data21.dss_data21 */
	237	0x0d8 (PIN_OUTPUT \| MUX_MODE0) /* dss_data22.dss_data22 */
	238	0x0da (PIN_OUTPUT \| MUX_MODE0) /* dss_data23.dss_data23 */
	239	>;
	240	};
5a8095e9 JH	241	};
5a8095e9 JH	242
3d495383 LP	243	&omap3_pmx_core2 {
	244	pinctrl-names = "default";
	245	pinctrl-0 = <
	246	&hsusb2_2_pins
	247	>;
	248
	249	hsusb2_2_pins: pinmux_hsusb2_2_pins {
	250	pinctrl-single,pins = <
	251	OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT \| MUX_MODE3) /* etk_d10.hsusb2_clk */
	252	OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT \| MUX_MODE3) /* etk_d11.hsusb2_stp */
	253	OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* etk_d12.hsusb2_dir */
	254	OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* etk_d13.hsusb2_nxt */
	255	OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* etk_d14.hsusb2_data0 */
	256	OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* etk_d15.hsusb2_data1 */
	257	>;
	258	};
	259	};
	260
5a8095e9 JH	261	&i2c1 {
	262	clock-frequency = <2600000>;
	263
	264	twl: twl@48 {
	265	reg = <0x48>;
	266	interrupts = <7>; /* SYS_NIRQ cascaded to intc */
	267	interrupt-parent = <&intc>;
33e9c392 JN	268
	269	twl_audio: audio {
	270	compatible = "ti,twl4030-audio";
	271	codec {
	272	};
	273	};
5a8095e9 JH	274	};
	275	};
	276
98ef7957	277	#include "twl4030.dtsi"
f9688457	278	#include "twl4030_omap3.dtsi"
5a8095e9	279
8cecf52b TV	280	&i2c3 {
	281	clock-frequency = <100000>;
	282	};
	283
5a8095e9 JH	284	&mmc1 {
	285	vmmc-supply = <&vmmc1>;
	286	vmmc_aux-supply = <&vsim>;
	287	bus-width = <8>;
	288	};
	289
	290	&mmc2 {
	291	status = "disabled";
	292	};
	293
	294	&mmc3 {
	295	status = "disabled";
	296	};
2e5f78ae RQ	297
	298	&usbhshost {
	299	port2-mode = "ehci-phy";
	300	};
	301
	302	&usbhsehci {
	303	phys = <0 &hsusb2_phy>;
	304	};
	305
	306	&twl_gpio {
	307	ti,use-leds;
	308	/* pullups: BIT(1) */
	309	ti,pullups = <0x000002>;
	310	/*
	311	* pulldowns:
	312	* BIT(2), BIT(6), BIT(7), BIT(8), BIT(13)
	313	* BIT(15), BIT(16), BIT(17)
	314	*/
	315	ti,pulldowns = <0x03a1c4>;
	316	};
b859c1ef KH	317
	318	&uart3 {
	319	pinctrl-names = "default";
	320	pinctrl-0 = <&uart3_pins>;
c15adae8	321	interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
b859c1ef	322	};
d641c3d5 KH	323
	324	&gpio1 {
	325	pinctrl-names = "default";
	326	pinctrl-0 = <&gpio1_pins>;
	327	};
81660208 RQ	328
	329	&usb_otg_hs {
	330	interface-type = <0>;
	331	usb-phy = <&usb2_phy>;
b462b05a RQ	332	phys = <&usb2_phy>;
b462b05a RQ	333	phy-names = "usb2-phy";
81660208 RQ	334	mode = <3>;
	335	power = <50>;
	336	};
30023a7e RQ	337
	338	&vaux2 {
	339	regulator-name = "vdd_ehci";
	340	regulator-min-microvolt = <1800000>;
	341	regulator-max-microvolt = <1800000>;
	342	regulator-always-on;
	343	};
726322ce PU	344
	345	&mcbsp2 {
	346	status = "okay";
	347	};
8cecf52b TV	348
	349	/* Needed to power the DPI pins */
	350	&vpll2 {
	351	regulator-always-on;
	352	};
	353
	354	&dss {
	355	status = "ok";
	356
	357	pinctrl-names = "default";
	358	pinctrl-0 = <&dss_dpi_pins>;
	359
	360	port {
	361	dpi_out: endpoint {
	362	remote-endpoint = <&tfp410_in>;
	363	data-lines = <24>;
	364	};
	365	};
	366	};
	367
	368	&venc {
	369	status = "ok";
	370
	371	vdda-supply = <&vdac>;
	372
	373	port {
	374	venc_out: endpoint {
	375	remote-endpoint = <&tv_connector_in>;
	376	ti,channels = <2>;
	377	};
	378	};
	379	};
d37530a0 RQ	380
	381	&gpmc {
	382	status = "ok";
	383	ranges = <0 0 0x30000000 0x1000000>; /* CS0 space, 16MB */
	384
	385	/* Chip select 0 */
	386	nand@0,0 {
	387	reg = <0 0 4>; /* NAND I/O window, 4 bytes */
	388	interrupts = <20>;
	389	ti,nand-ecc-opt = "ham1";
	390	nand-bus-width = <16>;
	391	#address-cells = <1>;
	392	#size-cells = <1>;
	393
	394	gpmc,device-width = <2>;
	395	gpmc,cs-on-ns = <0>;
	396	gpmc,cs-rd-off-ns = <36>;
	397	gpmc,cs-wr-off-ns = <36>;
	398	gpmc,adv-on-ns = <6>;
	399	gpmc,adv-rd-off-ns = <24>;
	400	gpmc,adv-wr-off-ns = <36>;
	401	gpmc,oe-on-ns = <6>;
	402	gpmc,oe-off-ns = <48>;
	403	gpmc,we-on-ns = <6>;
	404	gpmc,we-off-ns = <30>;
	405	gpmc,rd-cycle-ns = <72>;
	406	gpmc,wr-cycle-ns = <72>;
	407	gpmc,access-ns = <54>;
	408	gpmc,wr-access-ns = <30>;
	409
	410	partition@0 {
	411	label = "X-Loader";
	412	reg = <0 0x80000>;
	413	};
	414	partition@80000 {
	415	label = "U-Boot";
	416	reg = <0x80000 0x1e0000>;
	417	};
	418	partition@1c0000 {
	419	label = "U-Boot Env";
	420	reg = <0x260000 0x20000>;
	421	};
	422	partition@280000 {
	423	label = "Kernel";
	424	reg = <0x280000 0x400000>;
	425	};
	426	partition@780000 {
	427	label = "Filesystem";
	428	reg = <0x680000 0xf980000>;
	429	};
	430	};
	431	};