[mirror_ubuntu-hirsute-kernel.git] / arch / arm / boot / dts / omap3-beagle.dts

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
 */
/dts-v1/;

#include "omap34xx.dtsi"

/ {
	model = "TI OMAP3 BeagleBoard";
	compatible = "ti,omap3-beagle", "ti,omap3";

	cpus {
		cpu@0 {
			cpu0-supply = <&vcc>;
		};
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x10000000>; /* 256 MB */
	};

	aliases {
		display0 = &dvi0;
		display1 = &tv0;
	};

	leds {
		compatible = "gpio-leds";
		pmu_stat {
			label = "beagleboard::pmu_stat";
			gpios = <&twl_gpio 19 GPIO_ACTIVE_HIGH>; /* LEDB */
		};

		heartbeat {
			label = "beagleboard::usr0";
			gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>; /* 150 -> D6 LED */
			linux,default-trigger = "heartbeat";
		};

		mmc {
			label = "beagleboard::usr1";
			gpios = <&gpio5 21 GPIO_ACTIVE_HIGH>; /* 149 -> D7 LED */
			linux,default-trigger = "mmc0";
		};
	};

	/* HS USB Port 2 Power */
	hsusb2_power: hsusb2_power_reg {
		compatible = "regulator-fixed";
		regulator-name = "hsusb2_vbus";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&twl_gpio 18 GPIO_ACTIVE_HIGH>;	/* GPIO LEDA */
		startup-delay-us = <70000>;
	};

	/* HS USB Host PHY on PORT 2 */
	hsusb2_phy: hsusb2_phy {
		compatible = "usb-nop-xceiv";
		reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>;	/* gpio_147 */
		vcc-supply = <&hsusb2_power>;
		#phy-cells = <0>;
	};

	sound {
		compatible = "ti,omap-twl4030";
		ti,model = "omap3beagle";

		ti,mcbsp = <&mcbsp2>;
	};

	gpio_keys {
		compatible = "gpio-keys";

		user {
			label = "user";
			gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
			linux,code = <0x114>;
			wakeup-source;
		};

	};

	tfp410: encoder0 {
		compatible = "ti,tfp410";
		powerdown-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>;	/* gpio_170 */

		pinctrl-names = "default";
		pinctrl-0 = <&tfp410_pins>;

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;

				tfp410_in: endpoint {
					remote-endpoint = <&dpi_out>;
				};
			};

			port@1 {
				reg = <1>;

				tfp410_out: endpoint {
					remote-endpoint = <&dvi_connector_in>;
				};
			};
		};
	};

	dvi0: connector0 {
		compatible = "dvi-connector";
		label = "dvi";

		digital;

		ddc-i2c-bus = <&i2c3>;

		port {
			dvi_connector_in: endpoint {
				remote-endpoint = <&tfp410_out>;
			};
		};
	};

	tv0: connector1 {
		compatible = "svideo-connector";
		label = "tv";

		port {
			tv_connector_in: endpoint {
				remote-endpoint = <&venc_out>;
			};
		};
	};

	etb@540000000 {
		compatible = "arm,coresight-etb10", "arm,primecell";
		reg = <0x5401b000 0x1000>;

		clocks = <&emu_src_ck>;
		clock-names = "apb_pclk";
		in-ports {
			port {
				etb_in: endpoint {
					remote-endpoint = <&etm_out>;
				};
			};
		};
	};

	etm@54010000 {
		compatible = "arm,coresight-etm3x", "arm,primecell";
		reg = <0x54010000 0x1000>;

		clocks = <&emu_src_ck>;
		clock-names = "apb_pclk";
		out-ports {
			port {
				etm_out: endpoint {
					remote-endpoint = <&etb_in>;
				};
			};
		};
	};
};

&omap3_pmx_wkup {
	gpio1_pins: pinmux_gpio1_pins {
		pinctrl-single,pins = <
			OMAP3_WKUP_IOPAD(0x2a14, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_boot5.gpio_7 */
		>;
	};
};

&omap3_pmx_core {
	pinctrl-names = "default";
	pinctrl-0 = <
			&hsusb2_pins
	>;

	hsusb2_pins: pinmux_hsusb2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi1_cs3.hsusb2_data2 */
			OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_clk.hsusb2_data7 */
			OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_simo.hsusb2_data4 */
			OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_somi.hsusb2_data5 */
			OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_cs0.hsusb2_data6 */
			OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_cs1.hsusb2_data3 */
		>;
	};

	uart3_pins: pinmux_uart3_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
			OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
		>;
	};

	tfp410_pins: pinmux_tfp410_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21c6, PIN_OUTPUT | MUX_MODE4)	/* hdq_sio.gpio_170 */
		>;
	};

	dss_dpi_pins: pinmux_dss_dpi_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0)   /* dss_pclk.dss_pclk */
			OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0)   /* dss_hsync.dss_hsync */
			OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0)   /* dss_vsync.dss_vsync */
			OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0)   /* dss_acbias.dss_acbias */
			OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0)   /* dss_data0.dss_data0 */
			OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0)   /* dss_data1.dss_data1 */
			OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0)   /* dss_data2.dss_data2 */
			OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0)   /* dss_data3.dss_data3 */
			OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0)   /* dss_data4.dss_data4 */
			OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0)   /* dss_data5.dss_data5 */
			OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0)   /* dss_data6.dss_data6 */
			OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0)   /* dss_data7.dss_data7 */
			OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0)   /* dss_data8.dss_data8 */
			OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0)   /* dss_data9.dss_data9 */
			OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0)   /* dss_data10.dss_data10 */
			OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0)   /* dss_data11.dss_data11 */
			OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0)   /* dss_data12.dss_data12 */
			OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0)   /* dss_data13.dss_data13 */
			OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0)   /* dss_data14.dss_data14 */
			OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0)   /* dss_data15.dss_data15 */
			OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0)   /* dss_data16.dss_data16 */
			OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0)   /* dss_data17.dss_data17 */
			OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0)   /* dss_data18.dss_data18 */
			OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0)   /* dss_data19.dss_data19 */
			OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0)   /* dss_data20.dss_data20 */
			OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0)   /* dss_data21.dss_data21 */
			OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0)   /* dss_data22.dss_data22 */
			OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0)   /* dss_data23.dss_data23 */
		>;
	};
};

&omap3_pmx_core2 {
	pinctrl-names = "default";
	pinctrl-0 = <
			&hsusb2_2_pins
	>;

	hsusb2_2_pins: pinmux_hsusb2_2_pins {
		pinctrl-single,pins = <
			OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)		/* etk_d10.hsusb2_clk */
			OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)		/* etk_d11.hsusb2_stp */
			OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d12.hsusb2_dir */
			OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d13.hsusb2_nxt */
			OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d14.hsusb2_data0 */
			OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d15.hsusb2_data1 */
		>;
	};
};

&i2c1 {
	clock-frequency = <2600000>;

	twl: twl@48 {
		reg = <0x48>;
		interrupts = <7>; /* SYS_NIRQ cascaded to intc */
		interrupt-parent = <&intc>;

		twl_audio: audio {
			compatible = "ti,twl4030-audio";
			codec {
			};
		};
	};
};

#include "twl4030.dtsi"
#include "twl4030_omap3.dtsi"

&i2c3 {
	clock-frequency = <100000>;
};

&mmc1 {
	vmmc-supply = <&vmmc1>;
	vqmmc-supply = <&vsim>;
	bus-width = <8>;
};

&mmc2 {
	status = "disabled";
};

&mmc3 {
	status = "disabled";
};

&usbhshost {
	port2-mode = "ehci-phy";
};

&usbhsehci {
	phys = <0 &hsusb2_phy>;
};

&twl_gpio {
	ti,use-leds;
	/* pullups: BIT(1) */
	ti,pullups = <0x000002>;
	/*
	 * pulldowns:
	 * BIT(2), BIT(6), BIT(7), BIT(8), BIT(13)
	 * BIT(15), BIT(16), BIT(17)
	 */
	ti,pulldowns = <0x03a1c4>;
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart3_pins>;
	interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
};

&gpio1 {
	pinctrl-names = "default";
	pinctrl-0 = <&gpio1_pins>;
};

&usb_otg_hs {
	interface-type = <0>;
	usb-phy = <&usb2_phy>;
	phys = <&usb2_phy>;
	phy-names = "usb2-phy";
	mode = <3>;
	power = <50>;
};

&vaux2 {
	regulator-name = "vdd_ehci";
	regulator-min-microvolt = <1800000>;
	regulator-max-microvolt = <1800000>;
	regulator-always-on;
};

&mcbsp2 {
	status = "okay";
};

/* Needed to power the DPI pins */
&vpll2 {
	regulator-always-on;
};

&dss {
	status = "ok";

	pinctrl-names = "default";
	pinctrl-0 = <&dss_dpi_pins>;

	port {
		dpi_out: endpoint {
			remote-endpoint = <&tfp410_in>;
			data-lines = <24>;
		};
	};
};

&venc {
	status = "ok";

	vdda-supply = <&vdac>;

	port {
		venc_out: endpoint {
			remote-endpoint = <&tv_connector_in>;
			ti,channels = <2>;
		};
	};
};

&gpmc {
	status = "ok";
	ranges = <0 0 0x30000000 0x1000000>;	/* CS0 space, 16MB */

	/* Chip select 0 */
	nand@0,0 {
		compatible = "ti,omap2-nand";
		reg = <0 0 4>;		/* NAND I/O window, 4 bytes */
		interrupt-parent = <&gpmc>;
		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
			     <1 IRQ_TYPE_NONE>;	/* termcount */
		ti,nand-ecc-opt = "ham1";
		rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
		nand-bus-width = <16>;
		#address-cells = <1>;
		#size-cells = <1>;

		gpmc,device-width = <2>;
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <36>;
		gpmc,cs-wr-off-ns = <36>;
		gpmc,adv-on-ns = <6>;
		gpmc,adv-rd-off-ns = <24>;
		gpmc,adv-wr-off-ns = <36>;
		gpmc,oe-on-ns = <6>;
		gpmc,oe-off-ns = <48>;
		gpmc,we-on-ns = <6>;
		gpmc,we-off-ns = <30>;
		gpmc,rd-cycle-ns = <72>;
		gpmc,wr-cycle-ns = <72>;
		gpmc,access-ns = <54>;
		gpmc,wr-access-ns = <30>;

		partition@0 {
			label = "X-Loader";
			reg = <0 0x80000>;
		};
		partition@80000 {
			label = "U-Boot";
			reg = <0x80000 0x1e0000>;
		};
		partition@1c0000 {
			label = "U-Boot Env";
			reg = <0x260000 0x20000>;
		};
		partition@280000 {
			label = "Kernel";
			reg = <0x280000 0x400000>;
		};
		partition@780000 {
			label = "Filesystem";
			reg = <0x680000 0xf980000>;
		};
	};
};
Commit	Line	Data
d2912cb1	1	// SPDX-License-Identifier: GPL-2.0-only
5a8095e9 JH	2	/*
5a8095e9 JH	3	* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5a8095e9 JH	4	*/
	5	/dts-v1/;
	6
98ef7957	7	#include "omap34xx.dtsi"
5a8095e9 JH	8
	9	/ {
	10	model = "TI OMAP3 BeagleBoard";
	11	compatible = "ti,omap3-beagle", "ti,omap3";
	12
a134be34 NM	13	cpus {
	14	cpu@0 {
	15	cpu0-supply = <&vcc>;
	16	};
	17	};
	18
81777ff9	19	memory@80000000 {
5a8095e9 JH	20	device_type = "memory";
	21	reg = <0x80000000 0x10000000>; /* 256 MB */
	22	};
	23
8cecf52b TV	24	aliases {
	25	display0 = &dvi0;
	26	display1 = &tv0;
	27	};
	28
5a8095e9 JH	29	leds {
	30	compatible = "gpio-leds";
	31	pmu_stat {
	32	label = "beagleboard::pmu_stat";
6d624eab	33	gpios = <&twl_gpio 19 GPIO_ACTIVE_HIGH>; /* LEDB */
5a8095e9 JH	34	};
	35
	36	heartbeat {
	37	label = "beagleboard::usr0";
6d624eab	38	gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>; /* 150 -> D6 LED */
5a8095e9 JH	39	linux,default-trigger = "heartbeat";
	40	};
	41
	42	mmc {
	43	label = "beagleboard::usr1";
6d624eab	44	gpios = <&gpio5 21 GPIO_ACTIVE_HIGH>; /* 149 -> D7 LED */
5a8095e9 JH	45	linux,default-trigger = "mmc0";
	46	};
	47	};
	48
2e5f78ae RQ	49	/* HS USB Port 2 Power */
	50	hsusb2_power: hsusb2_power_reg {
	51	compatible = "regulator-fixed";
	52	regulator-name = "hsusb2_vbus";
	53	regulator-min-microvolt = <3300000>;
	54	regulator-max-microvolt = <3300000>;
3a637e00	55	gpio = <&twl_gpio 18 GPIO_ACTIVE_HIGH>; /* GPIO LEDA */
2e5f78ae RQ	56	startup-delay-us = <70000>;
	57	};
	58
	59	/* HS USB Host PHY on PORT 2 */
	60	hsusb2_phy: hsusb2_phy {
	61	compatible = "usb-nop-xceiv";
633b940f	62	reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>; /* gpio_147 */
2e5f78ae	63	vcc-supply = <&hsusb2_power>;
f568f6f5	64	#phy-cells = <0>;
2e5f78ae	65	};
d641c3d5	66
33e9c392 JN	67	sound {
	68	compatible = "ti,omap-twl4030";
	69	ti,model = "omap3beagle";
	70
	71	ti,mcbsp = <&mcbsp2>;
33e9c392 JN	72	};
33e9c392 JN	73
d641c3d5 KH	74	gpio_keys {
	75	compatible = "gpio-keys";
	76
	77	user {
	78	label = "user";
	79	gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
	80	linux,code = <0x114>;
0c4d63b3	81	wakeup-source;
d641c3d5 KH	82	};
	83
	84	};
8cecf52b	85
a3c4c757	86	tfp410: encoder0 {
8cecf52b TV	87	compatible = "ti,tfp410";
	88	powerdown-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>; /* gpio_170 */
	89
	90	pinctrl-names = "default";
	91	pinctrl-0 = <&tfp410_pins>;
	92
	93	ports {
	94	#address-cells = <1>;
	95	#size-cells = <0>;
	96
	97	port@0 {
	98	reg = <0>;
	99
a3c4c757	100	tfp410_in: endpoint {
8cecf52b TV	101	remote-endpoint = <&dpi_out>;
	102	};
	103	};
	104
	105	port@1 {
	106	reg = <1>;
	107
a3c4c757	108	tfp410_out: endpoint {
8cecf52b TV	109	remote-endpoint = <&dvi_connector_in>;
	110	};
	111	};
	112	};
	113	};
	114
a3c4c757	115	dvi0: connector0 {
8cecf52b TV	116	compatible = "dvi-connector";
	117	label = "dvi";
	118
	119	digital;
	120
	121	ddc-i2c-bus = <&i2c3>;
	122
	123	port {
	124	dvi_connector_in: endpoint {
	125	remote-endpoint = <&tfp410_out>;
	126	};
	127	};
	128	};
	129
a3c4c757	130	tv0: connector1 {
8cecf52b TV	131	compatible = "svideo-connector";
	132	label = "tv";
	133
	134	port {
	135	tv_connector_in: endpoint {
	136	remote-endpoint = <&venc_out>;
	137	};
	138	};
	139	};
9d316202 MP	140
	141	etb@540000000 {
	142	compatible = "arm,coresight-etb10", "arm,primecell";
	143	reg = <0x5401b000 0x1000>;
	144
9d316202 MP	145	clocks = <&emu_src_ck>;
9d316202 MP	146	clock-names = "apb_pclk";
f2b07213 SP	147	in-ports {
	148	port {
	149	etb_in: endpoint {
	150	remote-endpoint = <&etm_out>;
	151	};
9d316202 MP	152	};
	153	};
	154	};
	155
	156	etm@54010000 {
	157	compatible = "arm,coresight-etm3x", "arm,primecell";
	158	reg = <0x54010000 0x1000>;
	159
	160	clocks = <&emu_src_ck>;
	161	clock-names = "apb_pclk";
f2b07213 SP	162	out-ports {
	163	port {
	164	etm_out: endpoint {
	165	remote-endpoint = <&etb_in>;
	166	};
9d316202 MP	167	};
	168	};
	169	};
d641c3d5 KH	170	};
	171
	172	&omap3_pmx_wkup {
	173	gpio1_pins: pinmux_gpio1_pins {
	174	pinctrl-single,pins = <
161312d6	175	OMAP3_WKUP_IOPAD(0x2a14, PIN_INPUT \| PIN_OFF_WAKEUPENABLE \| MUX_MODE4) /* sys_boot5.gpio_7 */
d641c3d5 KH	176	>;
d641c3d5 KH	177	};
2e5f78ae RQ	178	};
	179
	180	&omap3_pmx_core {
	181	pinctrl-names = "default";
	182	pinctrl-0 = <
3d495383	183	&hsusb2_pins
2e5f78ae RQ	184	>;
2e5f78ae RQ	185
3d495383	186	hsusb2_pins: pinmux_hsusb2_pins {
2e5f78ae	187	pinctrl-single,pins = <
3d495383 LP	188	OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */
	189	OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */
	190	OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */
	191	OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */
	192	OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */
	193	OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */
2e5f78ae RQ	194	>;
2e5f78ae RQ	195	};
b859c1ef KH	196
	197	uart3_pins: pinmux_uart3_pins {
	198	pinctrl-single,pins = <
161312d6 JMC	199	OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT \| PIN_OFF_WAKEUPENABLE \| MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
161312d6 JMC	200	OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT \| MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
b859c1ef KH	201	>;
b859c1ef KH	202	};
8cecf52b TV	203
	204	tfp410_pins: pinmux_tfp410_pins {
	205	pinctrl-single,pins = <
161312d6	206	OMAP3_CORE1_IOPAD(0x21c6, PIN_OUTPUT \| MUX_MODE4) /* hdq_sio.gpio_170 */
8cecf52b TV	207	>;
	208	};
	209
	210	dss_dpi_pins: pinmux_dss_dpi_pins {
	211	pinctrl-single,pins = <
161312d6 JMC	212	OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT \| MUX_MODE0) /* dss_pclk.dss_pclk */
	213	OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT \| MUX_MODE0) /* dss_hsync.dss_hsync */
	214	OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT \| MUX_MODE0) /* dss_vsync.dss_vsync */
	215	OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT \| MUX_MODE0) /* dss_acbias.dss_acbias */
	216	OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT \| MUX_MODE0) /* dss_data0.dss_data0 */
	217	OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT \| MUX_MODE0) /* dss_data1.dss_data1 */
	218	OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT \| MUX_MODE0) /* dss_data2.dss_data2 */
	219	OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT \| MUX_MODE0) /* dss_data3.dss_data3 */
	220	OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT \| MUX_MODE0) /* dss_data4.dss_data4 */
	221	OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT \| MUX_MODE0) /* dss_data5.dss_data5 */
	222	OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT \| MUX_MODE0) /* dss_data6.dss_data6 */
	223	OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT \| MUX_MODE0) /* dss_data7.dss_data7 */
	224	OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT \| MUX_MODE0) /* dss_data8.dss_data8 */
	225	OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT \| MUX_MODE0) /* dss_data9.dss_data9 */
	226	OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT \| MUX_MODE0) /* dss_data10.dss_data10 */
	227	OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT \| MUX_MODE0) /* dss_data11.dss_data11 */
	228	OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT \| MUX_MODE0) /* dss_data12.dss_data12 */
	229	OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT \| MUX_MODE0) /* dss_data13.dss_data13 */
	230	OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT \| MUX_MODE0) /* dss_data14.dss_data14 */
	231	OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT \| MUX_MODE0) /* dss_data15.dss_data15 */
	232	OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT \| MUX_MODE0) /* dss_data16.dss_data16 */
	233	OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT \| MUX_MODE0) /* dss_data17.dss_data17 */
	234	OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT \| MUX_MODE0) /* dss_data18.dss_data18 */
	235	OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT \| MUX_MODE0) /* dss_data19.dss_data19 */
	236	OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT \| MUX_MODE0) /* dss_data20.dss_data20 */
	237	OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT \| MUX_MODE0) /* dss_data21.dss_data21 */
	238	OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT \| MUX_MODE0) /* dss_data22.dss_data22 */
	239	OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT \| MUX_MODE0) /* dss_data23.dss_data23 */
8cecf52b TV	240	>;
8cecf52b TV	241	};
5a8095e9 JH	242	};
5a8095e9 JH	243
3d495383 LP	244	&omap3_pmx_core2 {
	245	pinctrl-names = "default";
	246	pinctrl-0 = <
	247	&hsusb2_2_pins
	248	>;
	249
	250	hsusb2_2_pins: pinmux_hsusb2_2_pins {
	251	pinctrl-single,pins = <
	252	OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT \| MUX_MODE3) /* etk_d10.hsusb2_clk */
	253	OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT \| MUX_MODE3) /* etk_d11.hsusb2_stp */
	254	OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* etk_d12.hsusb2_dir */
	255	OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* etk_d13.hsusb2_nxt */
	256	OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* etk_d14.hsusb2_data0 */
	257	OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* etk_d15.hsusb2_data1 */
	258	>;
	259	};
	260	};
	261
5a8095e9 JH	262	&i2c1 {
	263	clock-frequency = <2600000>;
	264
	265	twl: twl@48 {
	266	reg = <0x48>;
	267	interrupts = <7>; /* SYS_NIRQ cascaded to intc */
	268	interrupt-parent = <&intc>;
33e9c392 JN	269
	270	twl_audio: audio {
	271	compatible = "ti,twl4030-audio";
	272	codec {
	273	};
	274	};
5a8095e9 JH	275	};
	276	};
	277
98ef7957	278	#include "twl4030.dtsi"
f9688457	279	#include "twl4030_omap3.dtsi"
5a8095e9	280
8cecf52b TV	281	&i2c3 {
	282	clock-frequency = <100000>;
	283	};
	284
5a8095e9 JH	285	&mmc1 {
5a8095e9 JH	286	vmmc-supply = <&vmmc1>;
45ea75eb	287	vqmmc-supply = <&vsim>;
5a8095e9 JH	288	bus-width = <8>;
	289	};
	290
	291	&mmc2 {
	292	status = "disabled";
	293	};
	294
	295	&mmc3 {
	296	status = "disabled";
	297	};
2e5f78ae RQ	298
	299	&usbhshost {
	300	port2-mode = "ehci-phy";
	301	};
	302
	303	&usbhsehci {
	304	phys = <0 &hsusb2_phy>;
	305	};
	306
	307	&twl_gpio {
	308	ti,use-leds;
	309	/* pullups: BIT(1) */
	310	ti,pullups = <0x000002>;
	311	/*
	312	* pulldowns:
	313	* BIT(2), BIT(6), BIT(7), BIT(8), BIT(13)
	314	* BIT(15), BIT(16), BIT(17)
	315	*/
	316	ti,pulldowns = <0x03a1c4>;
	317	};
b859c1ef KH	318
	319	&uart3 {
	320	pinctrl-names = "default";
	321	pinctrl-0 = <&uart3_pins>;
c15adae8	322	interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
b859c1ef	323	};
d641c3d5 KH	324
	325	&gpio1 {
	326	pinctrl-names = "default";
	327	pinctrl-0 = <&gpio1_pins>;
	328	};
81660208 RQ	329
	330	&usb_otg_hs {
	331	interface-type = <0>;
	332	usb-phy = <&usb2_phy>;
b462b05a RQ	333	phys = <&usb2_phy>;
b462b05a RQ	334	phy-names = "usb2-phy";
81660208 RQ	335	mode = <3>;
	336	power = <50>;
	337	};
30023a7e RQ	338
	339	&vaux2 {
	340	regulator-name = "vdd_ehci";
	341	regulator-min-microvolt = <1800000>;
	342	regulator-max-microvolt = <1800000>;
	343	regulator-always-on;
	344	};
726322ce PU	345
	346	&mcbsp2 {
	347	status = "okay";
	348	};
8cecf52b TV	349
	350	/* Needed to power the DPI pins */
	351	&vpll2 {
	352	regulator-always-on;
	353	};
	354
	355	&dss {
	356	status = "ok";
	357
	358	pinctrl-names = "default";
	359	pinctrl-0 = <&dss_dpi_pins>;
	360
	361	port {
	362	dpi_out: endpoint {
	363	remote-endpoint = <&tfp410_in>;
	364	data-lines = <24>;
	365	};
	366	};
	367	};
	368
	369	&venc {
	370	status = "ok";
	371
	372	vdda-supply = <&vdac>;
	373
	374	port {
	375	venc_out: endpoint {
	376	remote-endpoint = <&tv_connector_in>;
	377	ti,channels = <2>;
	378	};
	379	};
	380	};
d37530a0 RQ	381
	382	&gpmc {
	383	status = "ok";
	384	ranges = <0 0 0x30000000 0x1000000>; /* CS0 space, 16MB */
	385
	386	/* Chip select 0 */
	387	nand@0,0 {
44e47164	388	compatible = "ti,omap2-nand";
d37530a0	389	reg = <0 0 4>; /* NAND I/O window, 4 bytes */
44e47164 RQ	390	interrupt-parent = <&gpmc>;
	391	interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
	392	<1 IRQ_TYPE_NONE>; /* termcount */
d37530a0	393	ti,nand-ecc-opt = "ham1";
4cb53a23	394	rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
d37530a0 RQ	395	nand-bus-width = <16>;
	396	#address-cells = <1>;
	397	#size-cells = <1>;
	398
	399	gpmc,device-width = <2>;
	400	gpmc,cs-on-ns = <0>;
	401	gpmc,cs-rd-off-ns = <36>;
	402	gpmc,cs-wr-off-ns = <36>;
	403	gpmc,adv-on-ns = <6>;
	404	gpmc,adv-rd-off-ns = <24>;
	405	gpmc,adv-wr-off-ns = <36>;
	406	gpmc,oe-on-ns = <6>;
	407	gpmc,oe-off-ns = <48>;
	408	gpmc,we-on-ns = <6>;
	409	gpmc,we-off-ns = <30>;
	410	gpmc,rd-cycle-ns = <72>;
	411	gpmc,wr-cycle-ns = <72>;
	412	gpmc,access-ns = <54>;
	413	gpmc,wr-access-ns = <30>;
	414
	415	partition@0 {
	416	label = "X-Loader";
	417	reg = <0 0x80000>;
	418	};
	419	partition@80000 {
	420	label = "U-Boot";
	421	reg = <0x80000 0x1e0000>;
	422	};
	423	partition@1c0000 {
	424	label = "U-Boot Env";
	425	reg = <0x260000 0x20000>;
	426	};
	427	partition@280000 {
	428	label = "Kernel";
	429	reg = <0x280000 0x400000>;
	430	};
	431	partition@780000 {
	432	label = "Filesystem";
	433	reg = <0x680000 0xf980000>;
	434	};
	435	};
	436	};