[mirror_ubuntu-eoan-kernel.git] / arch / arm / boot / dts / omap3-igep.dtsi

/*
 * Device Tree Source for IGEP Technology devices
 *
 * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk>
 * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
/dts-v1/;

#include "omap34xx.dtsi"

/ {
	memory {
		device_type = "memory";
		reg = <0x80000000 0x20000000>; /* 512 MB */
	};

	sound {
		compatible = "ti,omap-twl4030";
		ti,model = "igep2";
		ti,mcbsp = <&mcbsp2>;
		ti,codec = <&twl_audio>;
	};
};

&omap3_pmx_core {
	uart1_pins: pinmux_uart1_pins {
		pinctrl-single,pins = <
			0x152 (PIN_INPUT | MUX_MODE0)		/* uart1_rx.uart1_rx */
			0x14c (PIN_OUTPUT |MUX_MODE0)		/* uart1_tx.uart1_tx */
		>;
	};

	uart2_pins: pinmux_uart2_pins {
		pinctrl-single,pins = <
			0x14a (PIN_INPUT | MUX_MODE0)		/* uart2_rx.uart2_rx */
			0x148 (PIN_OUTPUT | MUX_MODE0)		/* uart2_tx.uart2_tx */
		>;
	};

	uart3_pins: pinmux_uart3_pins {
		pinctrl-single,pins = <
			0x16e (PIN_INPUT | MUX_MODE0)		/* uart3_rx.uart3_rx */
			0x170 (PIN_OUTPUT | MUX_MODE0)		/* uart3_tx.uart3_tx */
		>;
	};

	mcbsp2_pins: pinmux_mcbsp2_pins {
		pinctrl-single,pins = <
			0x10c (PIN_INPUT | MUX_MODE0)		/* mcbsp2_fsx.mcbsp2_fsx */
			0x10e (PIN_INPUT | MUX_MODE0)		/* mcbsp2_clkx.mcbsp2_clkx */
			0x110 (PIN_INPUT | MUX_MODE0)		/* mcbsp2_dr.mcbsp2.dr */
			0x112 (PIN_OUTPUT | MUX_MODE0)		/* mcbsp2_dx.mcbsp2_dx */
		>;
	};

	mmc1_pins: pinmux_mmc1_pins {
		pinctrl-single,pins = <
			0x114 (PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_clk.sdmmc1_clk */
			0x116 (PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_cmd.sdmmc1_cmd */
			0x118 (PIN_INPUT_PULLUP | MUX_MODE0) 	/* sdmmc1_dat0.sdmmc1_dat0 */
			0x11a (PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat1.sdmmc1_dat1 */
			0x11c (PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat2.sdmmc1_dat2 */
			0x11e (PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat3.sdmmc1_dat3 */
			0x120 (PIN_INPUT | MUX_MODE0)		/* sdmmc1_dat4.sdmmc1_dat4 */
			0x122 (PIN_INPUT | MUX_MODE0)		/* sdmmc1_dat5.sdmmc1_dat5 */
			0x124 (PIN_INPUT | MUX_MODE0)		/* sdmmc1_dat6.sdmmc1_dat6 */
			0x126 (PIN_INPUT | MUX_MODE0)		/* sdmmc1_dat7.sdmmc1_dat7 */
		>;
	};

	smsc911x_pins: pinmux_smsc911x_pins {
		pinctrl-single,pins = <
			0x1a2 (PIN_INPUT | MUX_MODE4)		/* mcspi1_cs2.gpio_176 */
		>;
	};
};

&i2c1 {
	clock-frequency = <2600000>;

	twl: twl@48 {
		reg = <0x48>;
		interrupts = <7>; /* SYS_NIRQ cascaded to intc */
		interrupt-parent = <&intc>;

		twl_audio: audio {
			compatible = "ti,twl4030-audio";
			codec {
			      };
		};
	};
};

#include "twl4030.dtsi"
#include "twl4030_omap3.dtsi"

&i2c2 {
	clock-frequency = <400000>;
};

&mcbsp2 {
	pinctrl-names = "default";
	pinctrl-0 = <&mcbsp2_pins>;
};

&mmc1 {
      pinctrl-names = "default";
      pinctrl-0 = <&mmc1_pins>;
      vmmc-supply = <&vmmc1>;
      vmmc_aux-supply = <&vsim>;
      bus-width = <8>;
};

&mmc2 {
	status = "disabled";
};

&mmc3 {
	status = "disabled";
};

&uart1 {
       pinctrl-names = "default";
       pinctrl-0 = <&uart1_pins>;
};

&uart2 {
       pinctrl-names = "default";
       pinctrl-0 = <&uart2_pins>;
};

&uart3 {
       pinctrl-names = "default";
       pinctrl-0 = <&uart3_pins>;
};

&twl_gpio {
	ti,use-leds;
};
Commit	Line	Data
947fd0a2 JMC	1	/*
	2	* Device Tree Source for IGEP Technology devices
	3	*
	4	* Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk>
	5	* Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License version 2 as
	9	* published by the Free Software Foundation.
	10	*/
	11	/dts-v1/;
	12
98ef7957	13	#include "omap34xx.dtsi"
947fd0a2 JMC	14
	15	/ {
	16	memory {
	17	device_type = "memory";
	18	reg = <0x80000000 0x20000000>; /* 512 MB */
	19	};
	20
	21	sound {
	22	compatible = "ti,omap-twl4030";
	23	ti,model = "igep2";
	24	ti,mcbsp = <&mcbsp2>;
	25	ti,codec = <&twl_audio>;
	26	};
	27	};
	28
	29	&omap3_pmx_core {
bc0b8b70 MB	30	uart1_pins: pinmux_uart1_pins {
bc0b8b70 MB	31	pinctrl-single,pins = <
bcd3cca7 FV	32	0x152 (PIN_INPUT \| MUX_MODE0) /* uart1_rx.uart1_rx */
bcd3cca7 FV	33	0x14c (PIN_OUTPUT \|MUX_MODE0) /* uart1_tx.uart1_tx */
bc0b8b70 MB	34	>;
	35	};
	36
	37	uart2_pins: pinmux_uart2_pins {
	38	pinctrl-single,pins = <
bcd3cca7 FV	39	0x14a (PIN_INPUT \| MUX_MODE0) /* uart2_rx.uart2_rx */
bcd3cca7 FV	40	0x148 (PIN_OUTPUT \| MUX_MODE0) /* uart2_tx.uart2_tx */
bc0b8b70 MB	41	>;
	42	};
	43
947fd0a2 JMC	44	uart3_pins: pinmux_uart3_pins {
947fd0a2 JMC	45	pinctrl-single,pins = <
bcd3cca7 FV	46	0x16e (PIN_INPUT \| MUX_MODE0) /* uart3_rx.uart3_rx */
bcd3cca7 FV	47	0x170 (PIN_OUTPUT \| MUX_MODE0) /* uart3_tx.uart3_tx */
947fd0a2 JMC	48	>;
	49	};
	50
65399f03 EBS	51	mcbsp2_pins: pinmux_mcbsp2_pins {
	52	pinctrl-single,pins = <
	53	0x10c (PIN_INPUT \| MUX_MODE0) /* mcbsp2_fsx.mcbsp2_fsx */
	54	0x10e (PIN_INPUT \| MUX_MODE0) /* mcbsp2_clkx.mcbsp2_clkx */
	55	0x110 (PIN_INPUT \| MUX_MODE0) /* mcbsp2_dr.mcbsp2.dr */
	56	0x112 (PIN_OUTPUT \| MUX_MODE0) /* mcbsp2_dx.mcbsp2_dx */
	57	>;
	58	};
	59
947fd0a2 JMC	60	mmc1_pins: pinmux_mmc1_pins {
947fd0a2 JMC	61	pinctrl-single,pins = <
bcd3cca7 FV	62	0x114 (PIN_INPUT_PULLUP \| MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
	63	0x116 (PIN_INPUT_PULLUP \| MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
	64	0x118 (PIN_INPUT_PULLUP \| MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
	65	0x11a (PIN_INPUT_PULLUP \| MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
	66	0x11c (PIN_INPUT_PULLUP \| MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
	67	0x11e (PIN_INPUT_PULLUP \| MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
	68	0x120 (PIN_INPUT \| MUX_MODE0) /* sdmmc1_dat4.sdmmc1_dat4 */
	69	0x122 (PIN_INPUT \| MUX_MODE0) /* sdmmc1_dat5.sdmmc1_dat5 */
	70	0x124 (PIN_INPUT \| MUX_MODE0) /* sdmmc1_dat6.sdmmc1_dat6 */
	71	0x126 (PIN_INPUT \| MUX_MODE0) /* sdmmc1_dat7.sdmmc1_dat7 */
947fd0a2 JMC	72	>;
947fd0a2 JMC	73	};
d72b4415 JMC	74
	75	smsc911x_pins: pinmux_smsc911x_pins {
	76	pinctrl-single,pins = <
bcd3cca7	77	0x1a2 (PIN_INPUT \| MUX_MODE4) /* mcspi1_cs2.gpio_176 */
d72b4415 JMC	78	>;
d72b4415 JMC	79	};
947fd0a2 JMC	80	};
	81
	82	&i2c1 {
	83	clock-frequency = <2600000>;
	84
	85	twl: twl@48 {
	86	reg = <0x48>;
	87	interrupts = <7>; /* SYS_NIRQ cascaded to intc */
	88	interrupt-parent = <&intc>;
	89
	90	twl_audio: audio {
	91	compatible = "ti,twl4030-audio";
	92	codec {
	93	};
	94	};
	95	};
	96	};
	97
98ef7957	98	#include "twl4030.dtsi"
f9688457	99	#include "twl4030_omap3.dtsi"
947fd0a2 JMC	100
	101	&i2c2 {
	102	clock-frequency = <400000>;
	103	};
	104
65399f03 EBS	105	&mcbsp2 {
	106	pinctrl-names = "default";
	107	pinctrl-0 = <&mcbsp2_pins>;
	108	};
	109
947fd0a2 JMC	110	&mmc1 {
	111	pinctrl-names = "default";
	112	pinctrl-0 = <&mmc1_pins>;
	113	vmmc-supply = <&vmmc1>;
	114	vmmc_aux-supply = <&vsim>;
	115	bus-width = <8>;
	116	};
	117
	118	&mmc2 {
	119	status = "disabled";
	120	};
	121
	122	&mmc3 {
	123	status = "disabled";
	124	};
	125
bc0b8b70 MB	126	&uart1 {
	127	pinctrl-names = "default";
	128	pinctrl-0 = <&uart1_pins>;
	129	};
	130
	131	&uart2 {
	132	pinctrl-names = "default";
	133	pinctrl-0 = <&uart2_pins>;
	134	};
	135
947fd0a2 JMC	136	&uart3 {
	137	pinctrl-names = "default";
	138	pinctrl-0 = <&uart3_pins>;
	139	};
	140
	141	&twl_gpio {
	142	ti,use-leds;
	143	};