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cb5e191e | 1 | /* |
9927064e | 2 | * Device Tree Source for IGEPv2 Rev. C (TI OMAP AM/DM37x) |
cb5e191e JMC |
3 | * |
4 | * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk> | |
5 | * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
98ef7957 | 12 | #include "omap3-igep.dtsi" |
ef139e13 | 13 | #include "omap-gpmc-smsc9221.dtsi" |
cb5e191e JMC |
14 | |
15 | / { | |
9927064e | 16 | model = "IGEPv2 Rev. C (TI OMAP AM/DM37x)"; |
fb0cfecf | 17 | compatible = "isee,omap3-igep0020", "ti,omap36xx", "ti,omap3"; |
cb5e191e JMC |
18 | |
19 | leds { | |
bd52e2d2 JMC |
20 | pinctrl-names = "default"; |
21 | pinctrl-0 = <&leds_pins>; | |
cb5e191e | 22 | compatible = "gpio-leds"; |
bd52e2d2 | 23 | |
cb5e191e JMC |
24 | boot { |
25 | label = "omap3:green:boot"; | |
6d624eab | 26 | gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>; |
cb5e191e JMC |
27 | default-state = "on"; |
28 | }; | |
29 | ||
30 | user0 { | |
31 | label = "omap3:red:user0"; | |
6d624eab | 32 | gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>; |
cb5e191e JMC |
33 | default-state = "off"; |
34 | }; | |
35 | ||
36 | user1 { | |
37 | label = "omap3:red:user1"; | |
6d624eab | 38 | gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>; |
cb5e191e JMC |
39 | default-state = "off"; |
40 | }; | |
41 | ||
42 | user2 { | |
43 | label = "omap3:green:user1"; | |
6d624eab | 44 | gpios = <&twl_gpio 19 GPIO_ACTIVE_LOW>; |
cb5e191e JMC |
45 | }; |
46 | }; | |
d72b4415 | 47 | |
2de584ed EBS |
48 | /* Regulator to trigger the WIFI_PDN signal of the Wifi module */ |
49 | lbee1usjyc_pdn: lbee1usjyc_pdn { | |
50 | compatible = "regulator-fixed"; | |
51 | regulator-name = "regulator-lbee1usjyc-pdn"; | |
52 | regulator-min-microvolt = <3300000>; | |
53 | regulator-max-microvolt = <3300000>; | |
54 | gpio = <&gpio5 10 GPIO_ACTIVE_HIGH>; /* gpio_138 - WIFI_PDN */ | |
55 | startup-delay-us = <10000>; | |
56 | enable-active-high; | |
57 | }; | |
58 | ||
59 | /* Regulator to trigger the RESET_N_W signal of the Wifi module */ | |
60 | lbee1usjyc_reset_n_w: lbee1usjyc_reset_n_w { | |
61 | compatible = "regulator-fixed"; | |
62 | regulator-name = "regulator-lbee1usjyc-reset-n-w"; | |
63 | regulator-min-microvolt = <3300000>; | |
64 | regulator-max-microvolt = <3300000>; | |
65 | gpio = <&gpio5 11 GPIO_ACTIVE_HIGH>; /* gpio_139 - RESET_N_W */ | |
66 | enable-active-high; | |
67 | }; | |
68 | ||
339e834f JMC |
69 | /* HS USB Port 1 Power */ |
70 | hsusb1_power: hsusb1_power_reg { | |
71 | compatible = "regulator-fixed"; | |
72 | regulator-name = "hsusb1_vbus"; | |
73 | regulator-min-microvolt = <3300000>; | |
74 | regulator-max-microvolt = <3300000>; | |
75 | gpio = <&twl_gpio 18 GPIO_ACTIVE_LOW>; /* GPIO LEDA */ | |
76 | startup-delay-us = <70000>; | |
77 | }; | |
78 | ||
79 | /* HS USB Host PHY on PORT 1 */ | |
80 | hsusb1_phy: hsusb1_phy { | |
81 | compatible = "usb-nop-xceiv"; | |
82 | reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; /* gpio_24 */ | |
83 | vcc-supply = <&hsusb1_power>; | |
84 | }; | |
dd186aa5 JMC |
85 | |
86 | tfp410: encoder@0 { | |
87 | compatible = "ti,tfp410"; | |
88 | powerdown-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>; /* gpio_170 */ | |
89 | ||
90 | ports { | |
91 | #address-cells = <1>; | |
92 | #size-cells = <0>; | |
93 | ||
94 | port@0 { | |
95 | reg = <0>; | |
96 | ||
97 | tfp410_in: endpoint@0 { | |
98 | remote-endpoint = <&dpi_out>; | |
99 | }; | |
100 | }; | |
101 | ||
102 | port@1 { | |
103 | reg = <1>; | |
104 | ||
105 | tfp410_out: endpoint@0 { | |
106 | remote-endpoint = <&dvi_connector_in>; | |
107 | }; | |
108 | }; | |
109 | }; | |
110 | }; | |
111 | ||
112 | dvi0: connector@0 { | |
113 | compatible = "dvi-connector"; | |
114 | label = "dvi"; | |
115 | ||
116 | digital; | |
117 | ||
118 | ddc-i2c-bus = <&i2c3>; | |
119 | ||
120 | port { | |
121 | dvi_connector_in: endpoint { | |
122 | remote-endpoint = <&tfp410_out>; | |
123 | }; | |
124 | }; | |
125 | }; | |
339e834f JMC |
126 | }; |
127 | ||
128 | &omap3_pmx_core { | |
129 | pinctrl-names = "default"; | |
130 | pinctrl-0 = < | |
50592dc3 | 131 | &tfp410_pins |
dd186aa5 | 132 | &dss_dpi_pins |
339e834f JMC |
133 | >; |
134 | ||
dd186aa5 | 135 | tfp410_pins: pinmux_tfp410_pins { |
50592dc3 JMC |
136 | pinctrl-single,pins = < |
137 | 0x196 (PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */ | |
138 | >; | |
139 | }; | |
140 | ||
dd186aa5 | 141 | dss_dpi_pins: pinmux_dss_dpi_pins { |
50592dc3 JMC |
142 | pinctrl-single,pins = < |
143 | 0x0a4 (PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */ | |
144 | 0x0a6 (PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */ | |
145 | 0x0a8 (PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */ | |
146 | 0x0aa (PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */ | |
147 | 0x0ac (PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */ | |
148 | 0x0ae (PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */ | |
149 | 0x0b0 (PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */ | |
150 | 0x0b2 (PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */ | |
151 | 0x0b4 (PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */ | |
152 | 0x0b6 (PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */ | |
153 | 0x0b8 (PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */ | |
154 | 0x0ba (PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */ | |
155 | 0x0bc (PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */ | |
156 | 0x0be (PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */ | |
157 | 0x0c0 (PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */ | |
158 | 0x0c2 (PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */ | |
159 | 0x0c4 (PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */ | |
160 | 0x0c6 (PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */ | |
161 | 0x0c8 (PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */ | |
162 | 0x0ca (PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */ | |
163 | 0x0cc (PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */ | |
164 | 0x0ce (PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */ | |
165 | 0x0d0 (PIN_OUTPUT | MUX_MODE0) /* dss_data18.dss_data18 */ | |
166 | 0x0d2 (PIN_OUTPUT | MUX_MODE0) /* dss_data19.dss_data19 */ | |
167 | 0x0d4 (PIN_OUTPUT | MUX_MODE0) /* dss_data20.dss_data20 */ | |
168 | 0x0d6 (PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */ | |
169 | 0x0d8 (PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */ | |
170 | 0x0da (PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */ | |
171 | >; | |
172 | }; | |
86f9abb6 | 173 | |
2de584ed EBS |
174 | lbee1usjyc_pins: pinmux_lbee1usjyc_pins { |
175 | pinctrl-single,pins = < | |
176 | OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat5.gpio_137 - RESET_N_W */ | |
177 | OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat6.gpio_138 - WIFI_PDN */ | |
178 | OMAP3_CORE1_IOPAD(0x216a, PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat7.gpio_139 - RST_N_B */ | |
179 | >; | |
180 | }; | |
181 | ||
86f9abb6 EBS |
182 | uart2_pins: pinmux_uart2_pins { |
183 | pinctrl-single,pins = < | |
184 | OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0) /* uart2_cts.uart2_cts */ | |
185 | OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts .uart2_rts*/ | |
186 | OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */ | |
187 | OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */ | |
188 | >; | |
189 | }; | |
cb5e191e JMC |
190 | }; |
191 | ||
3d495383 LP |
192 | &omap3_pmx_core2 { |
193 | pinctrl-names = "default"; | |
194 | pinctrl-0 = < | |
195 | &hsusbb1_pins | |
bd52e2d2 | 196 | >; |
3d495383 LP |
197 | |
198 | hsusbb1_pins: pinmux_hsusbb1_pins { | |
199 | pinctrl-single,pins = < | |
200 | OMAP3630_CORE2_IOPAD(0x25da, PIN_OUTPUT | MUX_MODE3) /* etk_ctl.hsusb1_clk */ | |
201 | OMAP3630_CORE2_IOPAD(0x25d8, PIN_OUTPUT | MUX_MODE3) /* etk_clk.hsusb1_stp */ | |
202 | OMAP3630_CORE2_IOPAD(0x25ec, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d8.hsusb1_dir */ | |
203 | OMAP3630_CORE2_IOPAD(0x25ee, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d9.hsusb1_nxt */ | |
204 | OMAP3630_CORE2_IOPAD(0x25dc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d0.hsusb1_data0 */ | |
205 | OMAP3630_CORE2_IOPAD(0x25de, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d1.hsusb1_data1 */ | |
206 | OMAP3630_CORE2_IOPAD(0x25e0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d2.hsusb1_data2 */ | |
207 | OMAP3630_CORE2_IOPAD(0x25e2, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d3.hsusb1_data7 */ | |
208 | OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d4.hsusb1_data4 */ | |
209 | OMAP3630_CORE2_IOPAD(0x25e6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d5.hsusb1_data5 */ | |
210 | OMAP3630_CORE2_IOPAD(0x25e8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d6.hsusb1_data6 */ | |
211 | OMAP3630_CORE2_IOPAD(0x25ea, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d7.hsusb1_data3 */ | |
212 | >; | |
213 | }; | |
214 | ||
215 | leds_pins: pinmux_leds_pins { | |
216 | pinctrl-single,pins = < | |
217 | OMAP3630_CORE2_IOPAD(0x25f4, PIN_OUTPUT | MUX_MODE4) /* etk_d12.gpio_26 */ | |
218 | OMAP3630_CORE2_IOPAD(0x25f6, PIN_OUTPUT | MUX_MODE4) /* etk_d13.gpio_27 */ | |
219 | OMAP3630_CORE2_IOPAD(0x25f8, PIN_OUTPUT | MUX_MODE4) /* etk_d14.gpio_28 */ | |
220 | >; | |
221 | }; | |
bd52e2d2 JMC |
222 | }; |
223 | ||
cb5e191e JMC |
224 | &i2c3 { |
225 | clock-frequency = <100000>; | |
226 | ||
227 | /* | |
228 | * Display monitor features are burnt in the EEPROM | |
229 | * as EDID data. | |
230 | */ | |
231 | eeprom@50 { | |
232 | compatible = "ti,eeprom"; | |
233 | reg = <0x50>; | |
234 | }; | |
235 | }; | |
d72b4415 JMC |
236 | |
237 | &gpmc { | |
e2c5eb78 | 238 | ranges = <0 0 0x00000000 0x1000000>, /* CS0: 16MB for NAND */ |
7f674b3f JMC |
239 | <5 0 0x2c000000 0x01000000>; |
240 | ||
6b2978ac | 241 | ethernet@gpmc { |
d72b4415 | 242 | pinctrl-names = "default"; |
ef139e13 | 243 | pinctrl-0 = <&smsc9221_pins>; |
d72b4415 | 244 | reg = <5 0 0xff>; |
d72b4415 | 245 | interrupt-parent = <&gpio6>; |
2892aef2 | 246 | interrupts = <16 IRQ_TYPE_LEVEL_LOW>; |
d72b4415 JMC |
247 | }; |
248 | }; | |
339e834f | 249 | |
2de584ed EBS |
250 | /* On board Wifi module */ |
251 | &mmc2 { | |
252 | pinctrl-names = "default"; | |
253 | pinctrl-0 = <&mmc2_pins &lbee1usjyc_pins>; | |
254 | vmmc-supply = <&lbee1usjyc_pdn>; | |
255 | vmmc_aux-supply = <&lbee1usjyc_reset_n_w>; | |
256 | bus-width = <4>; | |
257 | non-removable; | |
258 | }; | |
259 | ||
86f9abb6 EBS |
260 | &uart2 { |
261 | pinctrl-names = "default"; | |
262 | pinctrl-0 = <&uart2_pins>; | |
263 | }; | |
264 | ||
339e834f JMC |
265 | &usbhshost { |
266 | port1-mode = "ehci-phy"; | |
267 | }; | |
268 | ||
269 | &usbhsehci { | |
270 | phys = <&hsusb1_phy>; | |
271 | }; | |
2f2befd8 JMC |
272 | |
273 | &vpll2 { | |
274 | /* Needed for DSS */ | |
275 | regulator-name = "vdds_dsi"; | |
276 | }; | |
dd186aa5 JMC |
277 | |
278 | &dss { | |
279 | status = "ok"; | |
280 | ||
281 | port { | |
282 | dpi_out: endpoint { | |
283 | remote-endpoint = <&tfp410_in>; | |
284 | data-lines = <24>; | |
285 | }; | |
286 | }; | |
287 | }; |