]> git.proxmox.com Git - mirror_ubuntu-zesty-kernel.git/blame - arch/arm/boot/dts/omap3-n900.dts
projects / mirror_ubuntu-zesty-kernel.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Documentation: DT: lis302: update wakeup binding
[mirror_ubuntu-zesty-kernel.git] / arch / arm / boot / dts / omap3-n900.dts
CommitLineData
a4d4b153
PM		 1/*
2 * Copyright (C) 2013 Pavel Machek <pavel@ucw.cz>
c3580bc1 3 * Copyright (C) 2013-2014 Aaro Koskinen <aaro.koskinen@iki.fi>
a4d4b153
PM		 4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 (or later) as
7 * published by the Free Software Foundation.
8 */
9
10/dts-v1/;
11
f2e2c9d9 12#include "omap34xx-hs.dtsi"
3fdb7717 13#include <dt-bindings/input/input.h>
a4d4b153
PM		 14
15/ {
16 model = "Nokia N900";
c3580bc1 17 compatible = "nokia,omap3-n900", "ti,omap3430", "ti,omap3";
a4d4b153 18
1861cda0
ID		 19 aliases {
20 i2c0;
21 i2c1 = &i2c1;
22 i2c2 = &i2c2;
23 i2c3 = &i2c3;
24 };
25
a4d4b153
PM		 26 cpus {
27 cpu@0 {
28 cpu0-supply = <&vcc>;
29 };
30 };
31
c1be2032
TL		 32 leds {
33 compatible = "gpio-leds";
34 heartbeat {
35 label = "debug::sleep";
36 gpios = <&gpio6 2 GPIO_ACTIVE_HIGH>; /* gpio162 */
37 linux,default-trigger = "default-on";
38 pinctrl-names = "default";
39 pinctrl-0 = <&debug_leds>;
40 };
41 };
42
a4d4b153
PM		 43 memory {
44 device_type = "memory";
45 reg = <0x80000000 0x10000000>; /* 256 MB */
46 };
47
3931c839
SR		 48 gpio_keys {
49 compatible = "gpio-keys";
50
51 camera_lens_cover {
52 label = "Camera Lens Cover";
53 gpios = <&gpio4 14 GPIO_ACTIVE_LOW>; /* 110 */
54 linux,input-type = <5>; /* EV_SW */
55 linux,code = <0x09>; /* SW_CAMERA_LENS_COVER */
56 gpio-key,wakeup;
57 };
58
59 camera_focus {
60 label = "Camera Focus";
61 gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; /* 68 */
62 linux,code = <0x210>; /* KEY_CAMERA_FOCUS */
63 gpio-key,wakeup;
64 };
65
66 camera_capture {
67 label = "Camera Capture";
68 gpios = <&gpio3 5 GPIO_ACTIVE_LOW>; /* 69 */
69 linux,code = <0xd4>; /* KEY_CAMERA */
70 gpio-key,wakeup;
71 };
72
73 lock_button {
74 label = "Lock Button";
75 gpios = <&gpio4 17 GPIO_ACTIVE_LOW>; /* 113 */
76 linux,code = <0x98>; /* KEY_SCREENLOCK */
77 gpio-key,wakeup;
78 };
79
80 keypad_slide {
81 label = "Keypad Slide";
82 gpios = <&gpio3 7 GPIO_ACTIVE_LOW>; /* 71 */
83 linux,input-type = <5>; /* EV_SW */
84 linux,code = <0x0a>; /* SW_KEYPAD_SLIDE */
85 gpio-key,wakeup;
86 };
87
88 proximity_sensor {
89 label = "Proximity Sensor";
90 gpios = <&gpio3 25 GPIO_ACTIVE_HIGH>; /* 89 */
91 linux,input-type = <5>; /* EV_SW */
92 linux,code = <0x0b>; /* SW_FRONT_PROXIMITY */
93 };
94 };
95
e17337a2
SR		 96 isp1704: isp1704 {
97 compatible = "nxp,isp1704";
98 nxp,enable-gpio = <&gpio3 3 GPIO_ACTIVE_HIGH>;
99 usb-phy = <&usb2_phy>;
100 };
1133420f
TV		 101
102 tv: connector {
32797b3e 103 compatible = "composite-video-connector";
1133420f
TV		 104 label = "tv";
105
106 port {
107 tv_connector_in: endpoint {
108 remote-endpoint = <&venc_out>;
109 };
110 };
111 };
f7d0f2a0
SR		 112
113 sound: n900-audio {
114 compatible = "nokia,n900-audio";
115
116 nokia,cpu-dai = <&mcbsp2>;
117 nokia,audio-codec = <&tlv320aic3x>, <&tlv320aic3x_aux>;
118 nokia,headphone-amplifier = <&tpa6130a2>;
119
120 tvout-selection-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>; /* 40 */
121 jack-detection-gpios = <&gpio6 17 GPIO_ACTIVE_HIGH>; /* 177 */
122 eci-switch-gpios = <&gpio6 22 GPIO_ACTIVE_HIGH>; /* 182 */
123 speaker-amplifier-gpios = <&twl_gpio 7 GPIO_ACTIVE_HIGH>;
124 };
28398c69
SR		 125
126 battery: n900-battery {
127 compatible = "nokia,n900-battery";
128 io-channels = <&twl_madc 0>, <&twl_madc 4>, <&twl_madc 12>;
129 io-channel-names = "temp", "bsi", "vbat";
130 };
a4d4b153
PM		 131};
132
ac888a88
SR		 133&omap3_pmx_core {
134 pinctrl-names = "default";
135
7a89eecf
SR		 136 uart2_pins: pinmux_uart2_pins {
137 pinctrl-single,pins = <
138 0x14a (PIN_INPUT | MUX_MODE0) /* uart2_rx */
139 0x148 (PIN_OUTPUT | MUX_MODE0) /* uart2_tx */
140 >;
141 };
142
143 uart3_pins: pinmux_uart3_pins {
144 pinctrl-single,pins = <
145 0x16e (PIN_INPUT | MUX_MODE0) /* uart3_rx */
146 0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx */
147 >;
148 };
149
271d4c6b
TL		 150 ethernet_pins: pinmux_ethernet_pins {
151 pinctrl-single,pins = <
152 OMAP3_CORE1_IOPAD(0x20b4, PIN_INPUT_PULLDOWN | MUX_MODE4) /* gpmc_ncs3.gpio_54 */
153 OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE4) /* dss_data16.gpio_86 */
154 OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE4) /* uart3_rts_sd.gpio_164 */
155 >;
156 };
157
9a894953
TL		 158 gpmc_pins: pinmux_gpmc_pins {
159 pinctrl-single,pins = <
160
161 /* address lines */
162 OMAP3_CORE1_IOPAD(0x207a, PIN_OUTPUT | MUX_MODE0) /* gpmc_a1.gpmc_a1 */
163 OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE0) /* gpmc_a2.gpmc_a2 */
164 OMAP3_CORE1_IOPAD(0x207e, PIN_OUTPUT | MUX_MODE0) /* gpmc_a3.gpmc_a3 */
165
166 /* data lines, gpmc_d0..d7 not muxable according to TRM */
167 OMAP3_CORE1_IOPAD(0x209e, PIN_INPUT | MUX_MODE0) /* gpmc_d8.gpmc_d8 */
168 OMAP3_CORE1_IOPAD(0x20a0, PIN_INPUT | MUX_MODE0) /* gpmc_d9.gpmc_d9 */
169 OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE0) /* gpmc_d10.gpmc_d10 */
170 OMAP3_CORE1_IOPAD(0x20a4, PIN_INPUT | MUX_MODE0) /* gpmc_d11.gpmc_d11 */
171 OMAP3_CORE1_IOPAD(0x20a6, PIN_INPUT | MUX_MODE0) /* gpmc_d12.gpmc_d12 */
172 OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT | MUX_MODE0) /* gpmc_d13.gpmc_d13 */
173 OMAP3_CORE1_IOPAD(0x20aa, PIN_INPUT | MUX_MODE0) /* gpmc_d14.gpmc_d14 */
174 OMAP3_CORE1_IOPAD(0x20ac, PIN_INPUT | MUX_MODE0) /* gpmc_d15.gpmc_d15 */
175
176 /*
177 * gpmc_ncs0, gpmc_nadv_ale, gpmc_noe, gpmc_nwe, gpmc_wait0 not muxable
178 * according to TRM. OneNAND seems to require PIN_INPUT on clock.
179 */
180 OMAP3_CORE1_IOPAD(0x20b0, PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs1.gpmc_ncs1 */
181 OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0) /* gpmc_clk.gpmc_clk */
182 >;
183 };
184
ac888a88
SR		 185 i2c1_pins: pinmux_i2c1_pins {
186 pinctrl-single,pins = <
a4ff93c1
TL		 187 0x18a (PIN_INPUT | MUX_MODE0) /* i2c1_scl */
188 0x18c (PIN_INPUT | MUX_MODE0) /* i2c1_sda */
ac888a88
SR		 189 >;
190 };
191
192 i2c2_pins: pinmux_i2c2_pins {
193 pinctrl-single,pins = <
a4ff93c1
TL		 194 0x18e (PIN_INPUT | MUX_MODE0) /* i2c2_scl */
195 0x190 (PIN_INPUT | MUX_MODE0) /* i2c2_sda */
ac888a88
SR		 196 >;
197 };
198
199 i2c3_pins: pinmux_i2c3_pins {
200 pinctrl-single,pins = <
a4ff93c1
TL		 201 0x192 (PIN_INPUT | MUX_MODE0) /* i2c3_scl */
202 0x194 (PIN_INPUT | MUX_MODE0) /* i2c3_sda */
ac888a88
SR		 203 >;
204 };
f1751cff 205
c1be2032
TL		 206 debug_leds: pinmux_debug_led_pins {
207 pinctrl-single,pins = <
208 OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4) /* mcbsp1_clkx.gpio_162 */
209 >;
210 };
211
c1ad2206
SR		 212 mcspi4_pins: pinmux_mcspi4_pins {
213 pinctrl-single,pins = <
214 0x15c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_clk */
215 0x162 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_somi */
216 0x160 (PIN_OUTPUT | MUX_MODE1) /* mcspi4_simo */
217 0x166 (PIN_OUTPUT | MUX_MODE1) /* mcspi4_cs0 */
218 >;
219 };
220
f1751cff
SR		 221 mmc1_pins: pinmux_mmc1_pins {
222 pinctrl-single,pins = <
223 0x114 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk */
224 0x116 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd */
225 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0 */
226 0x11a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1 */
227 0x11c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2 */
228 0x11e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3 */
229 >;
230 };
d1e6f516 231
edd5eb4e
TL		 232 mmc2_pins: pinmux_mmc2_pins {
233 pinctrl-single,pins = <
234 0x128 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk */
235 0x12a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd */
236 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0 */
237 0x12e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1 */
238 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2 */
239 0x132 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3 */
240 0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat4 */
241 0x136 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat5 */
242 0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat6 */
243 0x13a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat7 */
244 >;
245 };
246
1133420f 247 acx565akm_pins: pinmux_acx565akm_pins {
d1e6f516
SR		 248 pinctrl-single,pins = <
249 0x0d4 (PIN_OUTPUT | MUX_MODE4) /* RX51_LCD_RESET_GPIO */
250 >;
251 };
1133420f
TV		 252
253 dss_sdi_pins: pinmux_dss_sdi_pins {
254 pinctrl-single,pins = <
255 0x0c0 (PIN_OUTPUT | MUX_MODE1) /* dss_data10.sdi_dat1n */
256 0x0c2 (PIN_OUTPUT | MUX_MODE1) /* dss_data11.sdi_dat1p */
257 0x0c4 (PIN_OUTPUT | MUX_MODE1) /* dss_data12.sdi_dat2n */
258 0x0c6 (PIN_OUTPUT | MUX_MODE1) /* dss_data13.sdi_dat2p */
259
260 0x0d8 (PIN_OUTPUT | MUX_MODE1) /* dss_data22.sdi_clkp */
261 0x0da (PIN_OUTPUT | MUX_MODE1) /* dss_data23.sdi_clkn */
262 >;
263 };
c1ad2206
SR		 264
265 wl1251_pins: pinmux_wl1251 {
266 pinctrl-single,pins = <
267 0x0ce (PIN_OUTPUT | MUX_MODE4) /* gpio 87 => wl1251 enable */
268 0x05a (PIN_INPUT | MUX_MODE4) /* gpio 42 => wl1251 irq */
269 >;
270 };
782e25a4
SR		 271
272 ssi_pins: pinmux_ssi {
273 pinctrl-single,pins = <
274 0x150 (PIN_INPUT_PULLUP | MUX_MODE1) /* ssi1_rdy_tx */
275 0x14e (PIN_OUTPUT | MUX_MODE1) /* ssi1_flag_tx */
276 0x152 (PIN_INPUT | WAKEUP_EN | MUX_MODE4) /* ssi1_wake_tx (cawake) */
277 0x14c (PIN_OUTPUT | MUX_MODE1) /* ssi1_dat_tx */
278 0x154 (PIN_INPUT | MUX_MODE1) /* ssi1_dat_rx */
279 0x156 (PIN_INPUT | MUX_MODE1) /* ssi1_flag_rx */
280 0x158 (PIN_OUTPUT | MUX_MODE1) /* ssi1_rdy_rx */
281 0x15a (PIN_OUTPUT | MUX_MODE1) /* ssi1_wake */
282 >;
283 };
76ad4ac1
SR		 284
285 modem_pins: pinmux_modem {
286 pinctrl-single,pins = <
287 0x0ac (PIN_OUTPUT | MUX_MODE4) /* gpio 70 => cmt_apeslpx */
288 0x0b0 (PIN_INPUT | WAKEUP_EN | MUX_MODE4) /* gpio 72 => ape_rst_rq */
289 0x0b2 (PIN_OUTPUT | MUX_MODE4) /* gpio 73 => cmt_rst_rq */
290 0x0b4 (PIN_OUTPUT | MUX_MODE4) /* gpio 74 => cmt_en */
291 0x0b6 (PIN_OUTPUT | MUX_MODE4) /* gpio 75 => cmt_rst */
292 0x15e (PIN_OUTPUT | MUX_MODE4) /* gpio 157 => cmt_bsi */
293 >;
294 };
ac888a88
SR		 295};
296
a4d4b153 297&i2c1 {
ac888a88
SR		 298 pinctrl-names = "default";
299 pinctrl-0 = <&i2c1_pins>;
300
a4d4b153
PM		 301 clock-frequency = <2200000>;
302
303 twl: twl@48 {
304 reg = <0x48>;
305 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
306 interrupt-parent = <&intc>;
307 };
308};
309
310#include "twl4030.dtsi"
ac888a88 311#include "twl4030_omap3.dtsi"
a4d4b153 312
9cdbbadd
SR		 313&vaux1 {
314 regulator-name = "V28";
315 regulator-min-microvolt = <2800000>;
316 regulator-max-microvolt = <2800000>;
14fd7330 317 regulator-always-on; /* due to battery cover sensor */
9cdbbadd
SR		 318};
319
320&vaux2 {
321 regulator-name = "VCSI";
322 regulator-min-microvolt = <1800000>;
323 regulator-max-microvolt = <1800000>;
324};
325
326&vaux3 {
327 regulator-name = "VMMC2_30";
328 regulator-min-microvolt = <2800000>;
329 regulator-max-microvolt = <3000000>;
330};
331
332&vaux4 {
333 regulator-name = "VCAM_ANA_28";
334 regulator-min-microvolt = <2800000>;
335 regulator-max-microvolt = <2800000>;
336};
337
338&vmmc1 {
339 regulator-name = "VMMC1";
340 regulator-min-microvolt = <1850000>;
341 regulator-max-microvolt = <3150000>;
342};
343
344&vmmc2 {
345 regulator-name = "V28_A";
346 regulator-min-microvolt = <2800000>;
347 regulator-max-microvolt = <3000000>;
348 regulator-always-on; /* due VIO leak to AIC34 VDDs */
349};
350
351&vpll1 {
352 regulator-name = "VPLL";
353 regulator-min-microvolt = <1800000>;
354 regulator-max-microvolt = <1800000>;
355 regulator-always-on;
356};
357
358&vpll2 {
359 regulator-name = "VSDI_CSI";
360 regulator-min-microvolt = <1800000>;
361 regulator-max-microvolt = <1800000>;
362 regulator-always-on;
363};
364
365&vsim {
366 regulator-name = "VMMC2_IO_18";
367 regulator-min-microvolt = <1800000>;
368 regulator-max-microvolt = <1800000>;
369};
370
371&vio {
372 regulator-name = "VIO";
373 regulator-min-microvolt = <1800000>;
374 regulator-max-microvolt = <1800000>;
9cdbbadd
SR		 375};
376
377&vintana1 {
378 regulator-name = "VINTANA1";
379 /* fixed to 1500000 */
380 regulator-always-on;
381};
382
383&vintana2 {
384 regulator-name = "VINTANA2";
385 regulator-min-microvolt = <2750000>;
386 regulator-max-microvolt = <2750000>;
387 regulator-always-on;
388};
389
390&vintdig {
391 regulator-name = "VINTDIG";
392 /* fixed to 1500000 */
393 regulator-always-on;
394};
395
06ba7a61
SR		 396&twl {
397 twl_audio: audio {
398 compatible = "ti,twl4030-audio";
399 ti,enable-vibra = <1>;
400 };
9188883f
TL		 401
402 twl_power: power {
daebabd5 403 compatible = "ti,twl4030-power-n900", "ti,twl4030-power-idle-osc-off";
9188883f
TL		 404 ti,use_poweroff;
405 };
06ba7a61
SR		 406};
407
85c215f3 408&twl_keypad {
3fdb7717
SR		 409 linux,keymap = < MATRIX_KEY(0x00, 0x00, KEY_Q)
410 MATRIX_KEY(0x00, 0x01, KEY_O)
411 MATRIX_KEY(0x00, 0x02, KEY_P)
412 MATRIX_KEY(0x00, 0x03, KEY_COMMA)
413 MATRIX_KEY(0x00, 0x04, KEY_BACKSPACE)
414 MATRIX_KEY(0x00, 0x06, KEY_A)
415 MATRIX_KEY(0x00, 0x07, KEY_S)
416
417 MATRIX_KEY(0x01, 0x00, KEY_W)
418 MATRIX_KEY(0x01, 0x01, KEY_D)
419 MATRIX_KEY(0x01, 0x02, KEY_F)
420 MATRIX_KEY(0x01, 0x03, KEY_G)
421 MATRIX_KEY(0x01, 0x04, KEY_H)
422 MATRIX_KEY(0x01, 0x05, KEY_J)
423 MATRIX_KEY(0x01, 0x06, KEY_K)
424 MATRIX_KEY(0x01, 0x07, KEY_L)
425
426 MATRIX_KEY(0x02, 0x00, KEY_E)
427 MATRIX_KEY(0x02, 0x01, KEY_DOT)
428 MATRIX_KEY(0x02, 0x02, KEY_UP)
429 MATRIX_KEY(0x02, 0x03, KEY_ENTER)
430 MATRIX_KEY(0x02, 0x05, KEY_Z)
431 MATRIX_KEY(0x02, 0x06, KEY_X)
432 MATRIX_KEY(0x02, 0x07, KEY_C)
433 MATRIX_KEY(0x02, 0x08, KEY_F9)
434
435 MATRIX_KEY(0x03, 0x00, KEY_R)
436 MATRIX_KEY(0x03, 0x01, KEY_V)
437 MATRIX_KEY(0x03, 0x02, KEY_B)
438 MATRIX_KEY(0x03, 0x03, KEY_N)
439 MATRIX_KEY(0x03, 0x04, KEY_M)
440 MATRIX_KEY(0x03, 0x05, KEY_SPACE)
441 MATRIX_KEY(0x03, 0x06, KEY_SPACE)
442 MATRIX_KEY(0x03, 0x07, KEY_LEFT)
443
444 MATRIX_KEY(0x04, 0x00, KEY_T)
445 MATRIX_KEY(0x04, 0x01, KEY_DOWN)
446 MATRIX_KEY(0x04, 0x02, KEY_RIGHT)
447 MATRIX_KEY(0x04, 0x04, KEY_LEFTCTRL)
448 MATRIX_KEY(0x04, 0x05, KEY_RIGHTALT)
449 MATRIX_KEY(0x04, 0x06, KEY_LEFTSHIFT)
450 MATRIX_KEY(0x04, 0x08, KEY_F10)
451
452 MATRIX_KEY(0x05, 0x00, KEY_Y)
453 MATRIX_KEY(0x05, 0x08, KEY_F11)
454
455 MATRIX_KEY(0x06, 0x00, KEY_U)
456
457 MATRIX_KEY(0x07, 0x00, KEY_I)
458 MATRIX_KEY(0x07, 0x01, KEY_F7)
459 MATRIX_KEY(0x07, 0x02, KEY_F8)
85c215f3
SR		 460 >;
461};
462
a4d4b153
PM		 463&twl_gpio {
464 ti,pullups = <0x0>;
465 ti,pulldowns = <0x03ff3f>; /* BIT(0..5) | BIT(8..17) */
466};
467
468&i2c2 {
ac888a88
SR		 469 pinctrl-names = "default";
470 pinctrl-0 = <&i2c2_pins>;
471
48fc9864 472 clock-frequency = <100000>;
b2b9b258 473
14e3e295
SR		 474 tlv320aic3x: tlv320aic3x@18 {
475 compatible = "ti,tlv320aic3x";
476 reg = <0x18>;
477 gpio-reset = <&gpio2 28 GPIO_ACTIVE_HIGH>; /* 60 */
478 ai3x-gpio-func = <
479 0 /* AIC3X_GPIO1_FUNC_DISABLED */
480 5 /* AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT */
481 >;
482
483 AVDD-supply = <&vmmc2>;
484 DRVDD-supply = <&vmmc2>;
485 IOVDD-supply = <&vio>;
486 DVDD-supply = <&vio>;
487 };
488
489 tlv320aic3x_aux: tlv320aic3x@19 {
490 compatible = "ti,tlv320aic3x";
491 reg = <0x19>;
492 gpio-reset = <&gpio2 28 GPIO_ACTIVE_HIGH>; /* 60 */
493
494 AVDD-supply = <&vmmc2>;
495 DRVDD-supply = <&vmmc2>;
496 IOVDD-supply = <&vio>;
497 DVDD-supply = <&vio>;
498 };
499
12f2f873
SR		 500 tsl2563: tsl2563@29 {
501 compatible = "amstaos,tsl2563";
502 reg = <0x29>;
503
504 amstaos,cover-comp-gain = <16>;
505 };
506
a0bf1f3e
SR		 507 lp5523: lp5523@32 {
508 compatible = "national,lp5523";
509 reg = <0x32>;
510 clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */
511 enable-gpio = <&gpio2 9 GPIO_ACTIVE_HIGH>; /* 41 */
512
513 chan0 {
514 chan-name = "lp5523:kb1";
515 led-cur = /bits/ 8 <50>;
516 max-cur = /bits/ 8 <100>;
517 };
518
519 chan1 {
520 chan-name = "lp5523:kb2";
521 led-cur = /bits/ 8 <50>;
522 max-cur = /bits/ 8 <100>;
523 };
524
525 chan2 {
526 chan-name = "lp5523:kb3";
527 led-cur = /bits/ 8 <50>;
528 max-cur = /bits/ 8 <100>;
529 };
530
531 chan3 {
532 chan-name = "lp5523:kb4";
533 led-cur = /bits/ 8 <50>;
534 max-cur = /bits/ 8 <100>;
535 };
536
537 chan4 {
538 chan-name = "lp5523:b";
539 led-cur = /bits/ 8 <50>;
540 max-cur = /bits/ 8 <100>;
541 };
542
543 chan5 {
544 chan-name = "lp5523:g";
545 led-cur = /bits/ 8 <50>;
546 max-cur = /bits/ 8 <100>;
547 };
548
549 chan6 {
550 chan-name = "lp5523:r";
551 led-cur = /bits/ 8 <50>;
552 max-cur = /bits/ 8 <100>;
553 };
554
555 chan7 {
556 chan-name = "lp5523:kb5";
557 led-cur = /bits/ 8 <50>;
558 max-cur = /bits/ 8 <100>;
559 };
560
561 chan8 {
562 chan-name = "lp5523:kb6";
563 led-cur = /bits/ 8 <50>;
564 max-cur = /bits/ 8 <100>;
565 };
566 };
567
b2b9b258
SR		 568 bq27200: bq27200@55 {
569 compatible = "ti,bq27200";
570 reg = <0x55>;
571 };
9e2367c8
SR		 572
573 tpa6130a2: tpa6130a2@60 {
574 compatible = "ti,tpa6130a2";
575 reg = <0x60>;
576
577 Vdd-supply = <&vmmc2>;
578
579 power-gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>; /* 98 */
580 };
334a09c8 581
406c07e7
SR		 582 si4713: si4713@63 {
583 compatible = "silabs,si4713";
584 reg = <0x63>;
585
586 interrupts-extended = <&gpio2 21 IRQ_TYPE_EDGE_FALLING>; /* 53 */
587 reset-gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 */
588 vio-supply = <&vio>;
589 vdd-supply = <&vaux1>;
590 };
591
334a09c8
SR		 592 bq24150a: bq24150a@6b {
593 compatible = "ti,bq24150a";
594 reg = <0x6b>;
595
596 ti,current-limit = <100>;
597 ti,weak-battery-voltage = <3400>;
598 ti,battery-regulation-voltage = <4200>;
599 ti,charge-current = <650>;
600 ti,termination-current = <100>;
601 ti,resistor-sense = <68>;
602
603 ti,usb-charger-detection = <&isp1704>;
604 };
a4d4b153
PM		 605};
606
607&i2c3 {
ac888a88
SR		 608 pinctrl-names = "default";
609 pinctrl-0 = <&i2c3_pins>;
610
48fc9864 611 clock-frequency = <400000>;
a4d4b153
PM		 612};
613
614&mmc1 {
f1751cff
SR		 615 pinctrl-names = "default";
616 pinctrl-0 = <&mmc1_pins>;
617 vmmc-supply = <&vmmc1>;
618 bus-width = <4>;
619 cd-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>; /* 160 */
a4d4b153
PM		 620};
621
edd5eb4e 622/* most boards use vaux3, only some old versions use vmmc2 instead */
a4d4b153 623&mmc2 {
edd5eb4e
TL		 624 pinctrl-names = "default";
625 pinctrl-0 = <&mmc2_pins>;
626 vmmc-supply = <&vaux3>;
627 vmmc_aux-supply = <&vsim>;
628 bus-width = <8>;
629 non-removable;
a4d4b153
PM		 630};
631
632&mmc3 {
633 status = "disabled";
634};
635
8699d2dd 636&gpmc {
271d4c6b
TL		 637 ranges = <0 0 0x01000000 0x01000000>, /* 16 MB for OneNAND */
638 <1 0 0x02000000 0x01000000>; /* 16 MB for smc91c96 */
9a894953
TL		 639 pinctrl-names = "default";
640 pinctrl-0 = <&gpmc_pins>;
8699d2dd 641
e2c5eb78 642 /* sys_ndmareq1 could be used by the driver, not as gpio65 though */
8699d2dd
SR		 643 onenand@0,0 {
644 #address-cells = <1>;
645 #size-cells = <1>;
e2c5eb78 646 reg = <0 0 0x20000>; /* CS0, offset 0, IO size 128K */
8699d2dd
SR		 647
648 gpmc,sync-read;
649 gpmc,sync-write;
650 gpmc,burst-length = <16>;
651 gpmc,burst-read;
652 gpmc,burst-wrap;
653 gpmc,burst-write;
654 gpmc,device-width = <2>; /* GPMC_DEVWIDTH_16BIT */
655 gpmc,mux-add-data = <2>; /* GPMC_MUX_AD */
656 gpmc,cs-on-ns = <0>;
657 gpmc,cs-rd-off-ns = <87>;
658 gpmc,cs-wr-off-ns = <87>;
659 gpmc,adv-on-ns = <0>;
660 gpmc,adv-rd-off-ns = <10>;
661 gpmc,adv-wr-off-ns = <10>;
662 gpmc,oe-on-ns = <15>;
663 gpmc,oe-off-ns = <87>;
664 gpmc,we-on-ns = <0>;
665 gpmc,we-off-ns = <87>;
666 gpmc,rd-cycle-ns = <112>;
667 gpmc,wr-cycle-ns = <112>;
668 gpmc,access-ns = <81>;
669 gpmc,page-burst-access-ns = <15>;
670 gpmc,bus-turnaround-ns = <0>;
671 gpmc,cycle2cycle-delay-ns = <0>;
672 gpmc,wait-monitoring-ns = <0>;
673 gpmc,clk-activation-ns = <5>;
674 gpmc,wr-data-mux-bus-ns = <30>;
675 gpmc,wr-access-ns = <81>;
676 gpmc,sync-clk-ps = <15000>;
677
678 /*
679 * MTD partition table corresponding to Nokia's
680 * Maemo 5 (Fremantle) release.
681 */
682 partition@0 {
683 label = "bootloader";
684 reg = <0x00000000 0x00020000>;
685 read-only;
686 };
687 partition@1 {
688 label = "config";
689 reg = <0x00020000 0x00060000>;
690 };
691 partition@2 {
692 label = "log";
693 reg = <0x00080000 0x00040000>;
694 };
695 partition@3 {
696 label = "kernel";
697 reg = <0x000c0000 0x00200000>;
698 };
699 partition@4 {
700 label = "initfs";
701 reg = <0x002c0000 0x00200000>;
702 };
703 partition@5 {
704 label = "rootfs";
705 reg = <0x004c0000 0x0fb40000>;
706 };
707 };
271d4c6b 708
7ac72746 709 /* Ethernet is on some early development boards and qemu */
271d4c6b
TL		 710 ethernet@gpmc {
711 compatible = "smsc,lan91c94";
712 interrupt-parent = <&gpio2>;
713 interrupts = <22 IRQ_TYPE_LEVEL_HIGH>; /* gpio54 */
cb9071d4 714 reg = <1 0 0xf>; /* 16 byte IO range */
271d4c6b
TL		 715 bank-width = <2>;
716 pinctrl-names = "default";
717 pinctrl-0 = <&ethernet_pins>;
7d2911c4
TL		 718 power-gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>; /* gpio86 */
719 reset-gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>; /* gpio164 */
271d4c6b
TL		 720 gpmc,device-width = <2>;
721 gpmc,sync-clk-ps = <0>;
722 gpmc,cs-on-ns = <0>;
723 gpmc,cs-rd-off-ns = <48>;
724 gpmc,cs-wr-off-ns = <24>;
725 gpmc,adv-on-ns = <0>;
726 gpmc,adv-rd-off-ns = <0>;
727 gpmc,adv-wr-off-ns = <0>;
728 gpmc,we-on-ns = <12>;
729 gpmc,we-off-ns = <18>;
730 gpmc,oe-on-ns = <12>;
731 gpmc,oe-off-ns = <48>;
732 gpmc,page-burst-access-ns = <0>;
733 gpmc,access-ns = <42>;
734 gpmc,rd-cycle-ns = <180>;
735 gpmc,wr-cycle-ns = <180>;
736 gpmc,bus-turnaround-ns = <0>;
737 gpmc,cycle2cycle-delay-ns = <0>;
738 gpmc,wait-monitoring-ns = <0>;
739 gpmc,clk-activation-ns = <0>;
740 gpmc,wr-access-ns = <0>;
741 gpmc,wr-data-mux-bus-ns = <12>;
742 };
8699d2dd
SR		 743};
744
a4d4b153
PM		 745&mcspi1 {
746 /*
747 * For some reason, touchscreen is necessary for screen to work at
748 * all on real hw. It works well without it on emulator.
749 *
750 * Also... order in the device tree actually matters here.
751 */
752 tsc2005@0 {
50525891 753 compatible = "ti,tsc2005";
a4d4b153
PM		 754 spi-max-frequency = <6000000>;
755 reg = <0>;
50525891
SR		 756
757 vio-supply = <&vio>;
758
759 reset-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* 104 */
760 interrupts-extended = <&gpio4 4 IRQ_TYPE_EDGE_RISING>; /* 100 */
761
762 touchscreen-fuzz-x = <4>;
763 touchscreen-fuzz-y = <7>;
764 touchscreen-fuzz-pressure = <2>;
765 touchscreen-max-x = <4096>;
766 touchscreen-max-y = <4096>;
767 touchscreen-max-pressure = <2048>;
768
769 ti,x-plate-ohms = <280>;
770 ti,esd-recovery-timeout-ms = <8000>;
a4d4b153 771 };
1133420f
TV		 772
773 acx565akm@2 {
774 compatible = "sony,acx565akm";
a4d4b153
PM		 775 spi-max-frequency = <6000000>;
776 reg = <2>;
d1e6f516
SR		 777
778 pinctrl-names = "default";
1133420f
TV		 779 pinctrl-0 = <&acx565akm_pins>;
780
781 label = "lcd";
782 reset-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>; /* 90 */
783
784 port {
785 lcd_in: endpoint {
786 remote-endpoint = <&sdi_out>;
787 };
788 };
a4d4b153
PM		 789 };
790};
791
c1ad2206
SR		 792&mcspi4 {
793 pinctrl-names = "default";
794 pinctrl-0 = <&mcspi4_pins>;
795
796 wl1251@0 {
797 pinctrl-names = "default";
798 pinctrl-0 = <&wl1251_pins>;
799
800 vio-supply = <&vio>;
801
802 compatible = "ti,wl1251";
803 reg = <0>;
804 spi-max-frequency = <48000000>;
805
806 spi-cpol;
807 spi-cpha;
808
809 ti,power-gpio = <&gpio3 23 GPIO_ACTIVE_HIGH>; /* 87 */
810
811 interrupt-parent = <&gpio2>;
812 interrupts = <10 IRQ_TYPE_NONE>; /* gpio line 42 */
813 };
814};
815
a4d4b153
PM		 816&usb_otg_hs {
817 interface-type = <0>;
818 usb-phy = <&usb2_phy>;
d2afcf09
RQ		 819 phys = <&usb2_phy>;
820 phy-names = "usb2-phy";
a4d4b153
PM		 821 mode = <2>;
822 power = <50>;
823};
7a89eecf
SR		 824
825&uart1 {
826 status = "disabled";
827};
828
829&uart2 {
31f0820a 830 interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
7a89eecf
SR		 831 pinctrl-names = "default";
832 pinctrl-0 = <&uart2_pins>;
833};
834
835&uart3 {
31f0820a 836 interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
7a89eecf
SR		 837 pinctrl-names = "default";
838 pinctrl-0 = <&uart3_pins>;
839};
1133420f
TV		 840
841&dss {
842 status = "ok";
843
844 pinctrl-names = "default";
845 pinctrl-0 = <&dss_sdi_pins>;
846
847 vdds_sdi-supply = <&vaux1>;
848
849 ports {
850 #address-cells = <1>;
851 #size-cells = <0>;
852
853 port@1 {
854 reg = <1>;
855
856 sdi_out: endpoint {
857 remote-endpoint = <&lcd_in>;
858 datapairs = <2>;
859 };
860 };
861 };
862};
863
864&venc {
865 status = "ok";
866
867 vdda-supply = <&vdac>;
868
869 port {
870 venc_out: endpoint {
871 remote-endpoint = <&tv_connector_in>;
872 ti,channels = <1>;
873 };
874 };
875};
f7d0f2a0
SR		 876
877&mcbsp2 {
878 status = "ok";
879};
782e25a4
SR		 880
881&ssi_port1 {
882 pinctrl-names = "default";
883 pinctrl-0 = <&ssi_pins>;
884
885 ti,ssi-cawake-gpio = <&gpio5 23 GPIO_ACTIVE_HIGH>; /* 151 */
76ad4ac1
SR		 886
887 modem: hsi-client {
888 compatible = "nokia,n900-modem";
889
890 pinctrl-names = "default";
891 pinctrl-0 = <&modem_pins>;
892
893 hsi-channel-ids = <0>, <1>, <2>, <3>;
894 hsi-channel-names = "mcsaab-control",
895 "speech-control",
896 "speech-data",
897 "mcsaab-data";
898 hsi-speed-kbps = <55000>;
899 hsi-mode = "frame";
900 hsi-flow = "synchronized";
901 hsi-arb-mode = "round-robin";
902
903 interrupts-extended = <&gpio3 8 IRQ_TYPE_EDGE_FALLING>; /* 72 */
904
905 gpios = <&gpio3 6 GPIO_ACTIVE_HIGH>, /* 70 */
906 <&gpio3 9 GPIO_ACTIVE_HIGH>, /* 73 */
907 <&gpio3 10 GPIO_ACTIVE_HIGH>, /* 74 */
908 <&gpio3 11 GPIO_ACTIVE_HIGH>, /* 75 */
909 <&gpio5 29 GPIO_ACTIVE_HIGH>; /* 157 */
910 gpio-names = "cmt_apeslpx",
911 "cmt_rst_rq",
912 "cmt_en",
913 "cmt_rst",
914 "cmt_bsi";
915 };
782e25a4
SR		 916};
917
918&ssi_port2 {
919 status = "disabled";
76ad4ac1 920};
ubuntu-zesty-kernel mirror