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af3c0380 FV |
1 | /* |
2 | * Copyright (C) 2012 Florian Vaussard, EPFL Mobots group | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 as | |
6 | * published by the Free Software Foundation. | |
7 | */ | |
8 | ||
9 | /* | |
10 | * The Gumstix Overo must be combined with an expansion board. | |
11 | */ | |
12 | ||
13 | / { | |
14 | pwmleds { | |
15 | compatible = "pwm-leds"; | |
16 | ||
17 | overo { | |
18 | label = "overo:blue:COM"; | |
19 | pwms = <&twl_pwmled 1 7812500>; | |
20 | max-brightness = <127>; | |
21 | linux,default-trigger = "mmc0"; | |
22 | }; | |
23 | }; | |
24 | ||
25 | sound { | |
26 | compatible = "ti,omap-twl4030"; | |
27 | ti,model = "overo"; | |
28 | ||
29 | ti,mcbsp = <&mcbsp2>; | |
30 | ti,codec = <&twl_audio>; | |
31 | }; | |
94647a30 | 32 | |
dd4051bd FV |
33 | /* HS USB Port 2 Power */ |
34 | hsusb2_power: hsusb2_power_reg { | |
35 | compatible = "regulator-fixed"; | |
36 | regulator-name = "hsusb2_vbus"; | |
37 | regulator-min-microvolt = <5000000>; | |
38 | regulator-max-microvolt = <5000000>; | |
39 | gpio = <&gpio6 8 0>; /* gpio_168: vbus enable */ | |
40 | startup-delay-us = <70000>; | |
41 | enable-active-high; | |
42 | }; | |
43 | ||
44 | /* HS USB Host PHY on PORT 2 */ | |
45 | hsusb2_phy: hsusb2_phy { | |
46 | compatible = "usb-nop-xceiv"; | |
47 | reset-gpios = <&gpio6 23 GPIO_ACTIVE_LOW>; /* gpio_183 */ | |
48 | vcc-supply = <&hsusb2_power>; | |
49 | }; | |
50 | ||
94647a30 FV |
51 | /* Regulator to trigger the nPoweron signal of the Wifi module */ |
52 | w3cbw003c_npoweron: regulator-w3cbw003c-npoweron { | |
53 | compatible = "regulator-fixed"; | |
54 | regulator-name = "regulator-w3cbw003c-npoweron"; | |
55 | regulator-min-microvolt = <3300000>; | |
56 | regulator-max-microvolt = <3300000>; | |
57 | gpio = <&gpio2 22 GPIO_ACTIVE_HIGH>; /* gpio_54: nPoweron */ | |
58 | enable-active-high; | |
59 | }; | |
60 | ||
61 | /* Regulator to trigger the nReset signal of the Wifi module */ | |
62 | w3cbw003c_wifi_nreset: regulator-w3cbw003c-wifi-nreset { | |
63 | pinctrl-names = "default"; | |
64 | pinctrl-0 = <&w3cbw003c_pins &w3cbw003c_2_pins>; | |
65 | compatible = "regulator-fixed"; | |
66 | regulator-name = "regulator-w3cbw003c-wifi-nreset"; | |
67 | regulator-min-microvolt = <3300000>; | |
68 | regulator-max-microvolt = <3300000>; | |
69 | gpio = <&gpio1 16 GPIO_ACTIVE_HIGH>; /* gpio_16: WiFi nReset */ | |
70 | startup-delay-us = <10000>; | |
71 | }; | |
72 | ||
73 | /* Regulator to trigger the nReset signal of the Bluetooth module */ | |
74 | w3cbw003c_bt_nreset: regulator-w3cbw003c-bt-nreset { | |
75 | compatible = "regulator-fixed"; | |
76 | regulator-name = "regulator-w3cbw003c-bt-nreset"; | |
77 | regulator-min-microvolt = <3300000>; | |
78 | regulator-max-microvolt = <3300000>; | |
79 | gpio = <&gpio6 4 GPIO_ACTIVE_HIGH>; /* gpio_164: BT nReset */ | |
80 | startup-delay-us = <10000>; | |
81 | }; | |
af3c0380 FV |
82 | }; |
83 | ||
fc177226 | 84 | &omap3_pmx_core { |
dd4051bd FV |
85 | pinctrl-names = "default"; |
86 | pinctrl-0 = < | |
87 | &hsusb2_pins | |
88 | >; | |
89 | ||
94647a30 FV |
90 | uart2_pins: pinmux_uart2_pins { |
91 | pinctrl-single,pins = < | |
92 | OMAP3_CORE1_IOPAD(0x216c, PIN_INPUT | MUX_MODE1) /* mcbsp3_dx.uart2_cts */ | |
93 | OMAP3_CORE1_IOPAD(0x216e, PIN_OUTPUT | MUX_MODE1) /* mcbsp3_dr.uart2_rts */ | |
94 | OMAP3_CORE1_IOPAD(0x2170, PIN_OUTPUT | MUX_MODE1) /* mcbsp3_clk.uart2_tx */ | |
95 | OMAP3_CORE1_IOPAD(0x2172, PIN_INPUT | MUX_MODE1) /* mcbsp3_fsx.uart2_rx */ | |
96 | >; | |
97 | }; | |
98 | ||
fc177226 FV |
99 | i2c1_pins: pinmux_i2c1_pins { |
100 | pinctrl-single,pins = < | |
101 | OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */ | |
102 | OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */ | |
103 | >; | |
104 | }; | |
105 | ||
106 | mmc1_pins: pinmux_mmc1_pins { | |
107 | pinctrl-single,pins = < | |
108 | OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */ | |
109 | OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */ | |
110 | OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */ | |
111 | OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */ | |
112 | OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */ | |
113 | OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */ | |
114 | >; | |
115 | }; | |
94647a30 FV |
116 | |
117 | mmc2_pins: pinmux_mmc2_pins { | |
118 | pinctrl-single,pins = < | |
119 | OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */ | |
120 | OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */ | |
121 | OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */ | |
122 | OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */ | |
123 | OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */ | |
124 | OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */ | |
125 | >; | |
126 | }; | |
127 | ||
128 | /* WiFi/BT combo */ | |
129 | w3cbw003c_pins: pinmux_w3cbw003c_pins { | |
130 | pinctrl-single,pins = < | |
131 | OMAP3_CORE1_IOPAD(0x20b4, PIN_OUTPUT | MUX_MODE4) /* gpmc_ncs3.gpio_54 */ | |
132 | OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE4) /* uart3_rts_sd.gpio_164 */ | |
133 | >; | |
134 | }; | |
dd4051bd FV |
135 | |
136 | hsusb2_pins: pinmux_hsusb2_pins { | |
137 | pinctrl-single,pins = < | |
138 | OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */ | |
139 | OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */ | |
140 | OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */ | |
141 | OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */ | |
142 | OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */ | |
143 | OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */ | |
144 | OMAP3_CORE1_IOPAD(0x21be, PIN_OUTPUT | MUX_MODE4) /* i2c2_scl.gpio_168 */ | |
145 | OMAP3_CORE1_IOPAD(0x21c0, PIN_OUTPUT | MUX_MODE4) /* i2c2_sda.gpio_183 */ | |
146 | >; | |
147 | }; | |
fc177226 FV |
148 | }; |
149 | ||
af3c0380 | 150 | &i2c1 { |
fc177226 FV |
151 | pinctrl-names = "default"; |
152 | pinctrl-0 = <&i2c1_pins>; | |
af3c0380 FV |
153 | clock-frequency = <2600000>; |
154 | ||
155 | twl: twl@48 { | |
156 | reg = <0x48>; | |
157 | interrupts = <7>; /* SYS_NIRQ cascaded to intc */ | |
158 | interrupt-parent = <&intc>; | |
159 | ||
160 | twl_audio: audio { | |
161 | compatible = "ti,twl4030-audio"; | |
162 | codec { | |
163 | }; | |
164 | }; | |
165 | }; | |
166 | }; | |
167 | ||
168 | #include "twl4030.dtsi" | |
169 | #include "twl4030_omap3.dtsi" | |
170 | ||
171 | /* i2c2 pins are used for gpio */ | |
172 | &i2c2 { | |
173 | status = "disabled"; | |
174 | }; | |
175 | ||
176 | /* on board microSD slot */ | |
177 | &mmc1 { | |
fc177226 FV |
178 | pinctrl-names = "default"; |
179 | pinctrl-0 = <&mmc1_pins>; | |
af3c0380 FV |
180 | vmmc-supply = <&vmmc1>; |
181 | bus-width = <4>; | |
182 | }; | |
183 | ||
184 | /* optional on board WiFi */ | |
185 | &mmc2 { | |
94647a30 FV |
186 | pinctrl-names = "default"; |
187 | pinctrl-0 = <&mmc2_pins>; | |
188 | vmmc-supply = <&w3cbw003c_npoweron>; | |
189 | vqmmc-supply = <&w3cbw003c_bt_nreset>; | |
190 | vmmc_aux-supply = <&w3cbw003c_wifi_nreset>; | |
af3c0380 | 191 | bus-width = <4>; |
94647a30 FV |
192 | cap-sdio-irq; |
193 | non-removable; | |
af3c0380 FV |
194 | }; |
195 | ||
196 | &twl_gpio { | |
197 | ti,use-leds; | |
198 | }; | |
199 | ||
200 | &usb_otg_hs { | |
201 | interface-type = <0>; | |
202 | usb-phy = <&usb2_phy>; | |
203 | phys = <&usb2_phy>; | |
204 | phy-names = "usb2-phy"; | |
205 | mode = <3>; | |
206 | power = <50>; | |
207 | }; | |
208 | ||
dd4051bd FV |
209 | &usbhshost { |
210 | port2-mode = "ehci-phy"; | |
211 | }; | |
212 | ||
213 | &usbhsehci { | |
214 | phys = <0 &hsusb2_phy>; | |
215 | }; | |
216 | ||
94647a30 FV |
217 | &uart2 { |
218 | pinctrl-names = "default"; | |
219 | pinctrl-0 = <&uart2_pins>; | |
220 | }; | |
221 |