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ARM: dts: Fix smartreflex compatible for omap3 shared mpu-iva instance
[mirror_ubuntu-eoan-kernel.git] / arch / arm / boot / dts / omap36xx.dtsi
CommitLineData
642f12b4
TL
1/*
2 * Device Tree Source for OMAP3 SoC
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
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11#include <dt-bindings/media/omap3-isp.h>
12
98ef7957 13#include "omap3.dtsi"
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14
15/ {
16 aliases {
17 serial3 = &uart4;
18 };
19
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NM
20 cpus {
21 /* OMAP3630/OMAP37xx 'standard device' variants OPP50 to OPP130 */
a761d517 22 cpu: cpu@0 {
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23 operating-points = <
24 /* kHz uV */
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25 300000 1012500
26 600000 1200000
27 800000 1325000
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28 >;
29 clock-latency = <300000>; /* From legacy driver */
30 };
31 };
32
f515f814 33 ocp@68000000 {
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34 uart4: serial@49042000 {
35 compatible = "ti,omap3-uart";
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36 reg = <0x49042000 0x400>;
37 interrupts = <80>;
38 dmas = <&sdma 81 &sdma 82>;
39 dma-names = "tx", "rx";
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40 ti,hwmods = "uart4";
41 clock-frequency = <48000000>;
42 };
3d495383 43
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AT
44 abb_mpu_iva: regulator-abb-mpu {
45 compatible = "ti,abb-v1";
46 regulator-name = "abb_mpu_iva";
3023aa4a 47 #address-cells = <0>;
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AT
48 #size-cells = <0>;
49 reg = <0x483072f0 0x8>, <0x48306818 0x4>;
50 reg-names = "base-address", "int-address";
51 ti,tranxdone-status-mask = <0x4000000>;
52 clocks = <&sys_ck>;
53 ti,settling-time = <30>;
54 ti,clock-cycles = <8>;
55 ti,abb_info = <
56 /*uV ABB efuse rbb_m fbb_m vset_m*/
57 1012500 0 0 0 0 0
58 1200000 0 0 0 0 0
59 1325000 0 0 0 0 0
60 1375000 1 0 0 0 0
61 >;
62 };
63
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LP
64 omap3_pmx_core2: pinmux@480025a0 {
65 compatible = "ti,omap3-padconf", "pinctrl-single";
66 reg = <0x480025a0 0x5c>;
67 #address-cells = <1>;
68 #size-cells = <0>;
be76fd31 69 #pinctrl-cells = <1>;
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LP
70 #interrupt-cells = <1>;
71 interrupt-controller;
72 pinctrl-single,register-width = <16>;
73 pinctrl-single,function-mask = <0xff1f>;
74 };
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75
76 isp: isp@480bc000 {
77 compatible = "ti,omap3-isp";
78 reg = <0x480bc000 0x12fc
79 0x480bd800 0x0600>;
80 interrupts = <24>;
81 iommus = <&mmu_isp>;
30ecc84e 82 syscon = <&scm_conf 0x2f0>;
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83 ti,phy-type = <OMAP3ISP_PHY_TYPE_CSIPHY>;
84 #clock-cells = <1>;
85 ports {
86 #address-cells = <1>;
87 #size-cells = <0>;
88 };
89 };
12e47442 90
a761d517 91 bandgap: bandgap@48002524 {
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PR
92 reg = <0x48002524 0x4>;
93 compatible = "ti,omap36xx-bandgap";
94 #thermal-sensor-cells = <0>;
95 };
642f12b4 96 };
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97
98 thermal_zones: thermal-zones {
99 #include "omap3-cpu-thermal.dtsi"
100 };
642f12b4 101};
657fc11c 102
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TV
103/* OMAP3630 needs dss_96m_fck for VENC */
104&venc {
105 clocks = <&dss_tv_fck>, <&dss_96m_fck>;
106 clock-names = "fck", "tv_dac_clk";
107};
108
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109&ssi {
110 status = "ok";
111
112 clocks = <&ssi_ssr_fck>,
113 <&ssi_sst_fck>,
114 <&ssi_ick>;
115 clock-names = "ssi_ssr_fck",
116 "ssi_sst_fck",
117 "ssi_ick";
118};
119
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120/include/ "omap34xx-omap36xx-clocks.dtsi"
121/include/ "omap36xx-omap3430es2plus-clocks.dtsi"
d30492ad 122/include/ "omap36xx-am35xx-omap3430es2plus-clocks.dtsi"
64a900ff 123/include/ "omap36xx-clocks.dtsi"