[mirror_ubuntu-eoan-kernel.git] / arch / arm / boot / dts / pxa27x.dtsi

/* The pxa3xx skeleton simply augments the 2xx version */
#include "pxa2xx.dtsi"
#include "dt-bindings/clock/pxa-clock.h"

/ {
	model = "Marvell PXA27x familiy SoC";
	compatible = "marvell,pxa27x";

	pxabus {
		pdma: dma-controller@40000000 {
			compatible = "marvell,pdma-1.0";
			reg = <0x40000000 0x10000>;
			interrupts = <25>;
			#dma-channels = <32>;
			#dma-cells = <2>;
			#dma-requests = <75>;
			status = "okay";
		};

		pxairq: interrupt-controller@40d00000 {
			marvell,intc-priority;
			marvell,intc-nr-irqs = <34>;
		};

		pinctrl: pinctrl@40e00000 {
			reg = <0x40e00054 0x20 0x40e0000c 0xc 0x40e0010c 4
			       0x40f00020 0x10>;
			compatible = "marvell,pxa27x-pinctrl";
		};

		gpio: gpio@40e00000 {
			compatible = "intel,pxa27x-gpio";
			gpio-ranges = <&pinctrl 0 0 128>;
			clocks = <&clks CLK_NONE>;
		};

		pxa27x_ohci: usb@4c000000 {
			compatible = "marvell,pxa-ohci";
			reg = <0x4c000000 0x10000>;
			interrupts = <3>;
			clocks = <&clks CLK_USBHOST>;
			status = "disabled";
		};

		pwm0: pwm@40b00000 {
			compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
			reg = <0x40b00000 0x10>;
			#pwm-cells = <1>;
			clocks = <&clks CLK_PWM0>;
		};

		pwm1: pwm@40b00010 {
			compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
			reg = <0x40b00010 0x10>;
			#pwm-cells = <1>;
			clocks = <&clks CLK_PWM1>;
		};

		pwm2: pwm@40c00000 {
			compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
			reg = <0x40c00000 0x10>;
			#pwm-cells = <1>;
			clocks = <&clks CLK_PWM0>;
		};

		pwm3: pwm@40c00010 {
			compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
			reg = <0x40c00010 0x10>;
			#pwm-cells = <1>;
			clocks = <&clks CLK_PWM1>;
		};

		pwri2c: i2c@40f000180 {
			compatible = "mrvl,pxa-i2c";
			reg = <0x40f00180 0x24>;
			interrupts = <6>;
			clocks = <&clks CLK_PWRI2C>;
			#address-cells = <0x1>;
			#size-cells = <0>;
			status = "disabled";
		};

		pxa27x_udc: udc@40600000 {
			compatible = "marvell,pxa270-udc";
			reg = <0x40600000 0x10000>;
			interrupts = <11>;
			clocks = <&clks CLK_USB>;
			status = "disabled";
		};

		keypad: keypad@41500000 {
			compatible = "marvell,pxa27x-keypad";
			reg = <0x41500000 0x4c>;
			interrupts = <4>;
			clocks = <&clks CLK_KEYPAD>;
			status = "disabled";
		};

		pxa_camera: imaging@50000000 {
			compatible = "marvell,pxa270-qci";
			reg = <0x50000000 0x1000>;
			interrupts = <33>;
			dmas = <&pdma 68 0	/* Y channel */
				&pdma 69 0	/* U channel */
				&pdma 70 0>;	/* V channel */
			dma-names = "CI_Y", "CI_U", "CI_V";

			clocks = <&clks CLK_CAMERA>;
			clock-names = "ciclk";
			clock-frequency = <5000000>;
			clock-output-names = "qci_mclk";

			status = "disabled";
		};
	};

	clocks {
	       /*
		* The muxing of external clocks/internal dividers for osc* clock
		* sources has been hidden under the carpet by now.
		*/
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		clks: pxa2xx_clks@41300004 {
			compatible = "marvell,pxa270-clocks";
			#clock-cells = <1>;
			status = "okay";
		};
	};

	timer@40a00000 {
		compatible = "marvell,pxa-timer";
		reg = <0x40a00000 0x20>;
		interrupts = <26>;
		clocks = <&clks CLK_OSTIMER>;
		status = "okay";
	};

	pxa270_opp_table: opp_table0 {
		compatible = "operating-points-v2";

		opp@104000000 {
			opp-hz = /bits/ 64 <104000000>;
			opp-microvolt = <900000 900000 1705000>;
			clock-latency-ns = <20>;
		};
		opp@156000000 {
			opp-hz = /bits/ 64 <156000000>;
			opp-microvolt = <1000000 1000000 1705000>;
			clock-latency-ns = <20>;
		};
		opp@208000000 {
			opp-hz = /bits/ 64 <208000000>;
			opp-microvolt = <1180000 1180000 1705000>;
			clock-latency-ns = <20>;
		};
		opp@312000000 {
			opp-hz = /bits/ 64 <312000000>;
			opp-microvolt = <1250000 1250000 1705000>;
			clock-latency-ns = <20>;
		};
		opp@416000000 {
			opp-hz = /bits/ 64 <416000000>;
			opp-microvolt = <1350000 1350000 1705000>;
			clock-latency-ns = <20>;
		};
		opp@520000000 {
			opp-hz = /bits/ 64 <520000000>;
			opp-microvolt = <1450000 1450000 1705000>;
			clock-latency-ns = <20>;
		};
		opp@624000000 {
			opp-hz = /bits/ 64 <624000000>;
			opp-microvolt = <1550000 1550000 1705000>;
			clock-latency-ns = <20>;
		};
	};
};
Commit	Line	Data
aff18a67	1	/* The pxa3xx skeleton simply augments the 2xx version */
85fe55c1	2	#include "pxa2xx.dtsi"
d96672e6	3	#include "dt-bindings/clock/pxa-clock.h"
aff18a67 DM	4
	5	/ {
	6	model = "Marvell PXA27x familiy SoC";
	7	compatible = "marvell,pxa27x";
	8
	9	pxabus {
0cd49141 RJ	10	pdma: dma-controller@40000000 {
	11	compatible = "marvell,pdma-1.0";
	12	reg = <0x40000000 0x10000>;
	13	interrupts = <25>;
	14	#dma-channels = <32>;
	15	#dma-cells = <2>;
72b195cb	16	#dma-requests = <75>;
0cd49141 RJ	17	status = "okay";
	18	};
	19
aff18a67 DM	20	pxairq: interrupt-controller@40d00000 {
	21	marvell,intc-priority;
	22	marvell,intc-nr-irqs = <34>;
	23	};
e7b4a8df	24
ca91c703 RJ	25	pinctrl: pinctrl@40e00000 {
	26	reg = <0x40e00054 0x20 0x40e0000c 0xc 0x40e0010c 4
	27	0x40f00020 0x10>;
	28	compatible = "marvell,pxa27x-pinctrl";
	29	};
	30
d96672e6 RJ	31	gpio: gpio@40e00000 {
d96672e6 RJ	32	compatible = "intel,pxa27x-gpio";
ca91c703	33	gpio-ranges = <&pinctrl 0 0 128>;
d96672e6 RJ	34	clocks = <&clks CLK_NONE>;
	35	};
	36
0ec19396 RJ	37	pxa27x_ohci: usb@4c000000 {
	38	compatible = "marvell,pxa-ohci";
	39	reg = <0x4c000000 0x10000>;
	40	interrupts = <3>;
	41	clocks = <&clks CLK_USBHOST>;
	42	status = "disabled";
	43	};
	44
e7b4a8df MD	45	pwm0: pwm@40b00000 {
	46	compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
	47	reg = <0x40b00000 0x10>;
	48	#pwm-cells = <1>;
d96672e6	49	clocks = <&clks CLK_PWM0>;
e7b4a8df MD	50	};
	51
	52	pwm1: pwm@40b00010 {
	53	compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
	54	reg = <0x40b00010 0x10>;
	55	#pwm-cells = <1>;
d96672e6	56	clocks = <&clks CLK_PWM1>;
e7b4a8df MD	57	};
	58
	59	pwm2: pwm@40c00000 {
	60	compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
	61	reg = <0x40c00000 0x10>;
	62	#pwm-cells = <1>;
d96672e6	63	clocks = <&clks CLK_PWM0>;
e7b4a8df MD	64	};
	65
	66	pwm3: pwm@40c00010 {
	67	compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
	68	reg = <0x40c00010 0x10>;
	69	#pwm-cells = <1>;
d96672e6	70	clocks = <&clks CLK_PWM1>;
e7b4a8df	71	};
f374d1e7 RJ	72
	73	pwri2c: i2c@40f000180 {
	74	compatible = "mrvl,pxa-i2c";
	75	reg = <0x40f00180 0x24>;
	76	interrupts = <6>;
d96672e6	77	clocks = <&clks CLK_PWRI2C>;
fb18539b RJ	78	#address-cells = <0x1>;
fb18539b RJ	79	#size-cells = <0>;
f374d1e7 RJ	80	status = "disabled";
f374d1e7 RJ	81	};
d96672e6	82
361818cd RJ	83	pxa27x_udc: udc@40600000 {
	84	compatible = "marvell,pxa270-udc";
	85	reg = <0x40600000 0x10000>;
	86	interrupts = <11>;
	87	clocks = <&clks CLK_USB>;
	88	status = "disabled";
	89	};
8dcba817 RJ	90
	91	keypad: keypad@41500000 {
	92	compatible = "marvell,pxa27x-keypad";
	93	reg = <0x41500000 0x4c>;
	94	interrupts = <4>;
	95	clocks = <&clks CLK_KEYPAD>;
	96	status = "disabled";
	97	};
796b7dcf RJ	98
	99	pxa_camera: imaging@50000000 {
	100	compatible = "marvell,pxa270-qci";
	101	reg = <0x50000000 0x1000>;
	102	interrupts = <33>;
	103	dmas = <&pdma 68 0 /* Y channel */
	104	&pdma 69 0 /* U channel */
	105	&pdma 70 0>; /* V channel */
	106	dma-names = "CI_Y", "CI_U", "CI_V";
	107
	108	clocks = <&clks CLK_CAMERA>;
	109	clock-names = "ciclk";
	110	clock-frequency = <5000000>;
	111	clock-output-names = "qci_mclk";
	112
	113	status = "disabled";
	114	};
aff18a67	115	};
85fe55c1 RJ	116
	117	clocks {
	118	/*
	119	* The muxing of external clocks/internal dividers for osc* clock
	120	* sources has been hidden under the carpet by now.
	121	*/
	122	#address-cells = <1>;
	123	#size-cells = <1>;
	124	ranges;
	125
d96672e6 RJ	126	clks: pxa2xx_clks@41300004 {
d96672e6 RJ	127	compatible = "marvell,pxa270-clocks";
85fe55c1 RJ	128	#clock-cells = <1>;
	129	status = "okay";
	130	};
	131	};
8dd3075c RJ	132
	133	timer@40a00000 {
	134	compatible = "marvell,pxa-timer";
	135	reg = <0x40a00000 0x20>;
	136	interrupts = <26>;
	137	clocks = <&clks CLK_OSTIMER>;
	138	status = "okay";
	139	};
74e382b8 RJ	140
	141	pxa270_opp_table: opp_table0 {
	142	compatible = "operating-points-v2";
	143
	144	opp@104000000 {
	145	opp-hz = /bits/ 64 <104000000>;
	146	opp-microvolt = <900000 900000 1705000>;
	147	clock-latency-ns = <20>;
	148	};
	149	opp@156000000 {
	150	opp-hz = /bits/ 64 <156000000>;
	151	opp-microvolt = <1000000 1000000 1705000>;
	152	clock-latency-ns = <20>;
	153	};
	154	opp@208000000 {
	155	opp-hz = /bits/ 64 <208000000>;
	156	opp-microvolt = <1180000 1180000 1705000>;
	157	clock-latency-ns = <20>;
	158	};
	159	opp@312000000 {
	160	opp-hz = /bits/ 64 <312000000>;
	161	opp-microvolt = <1250000 1250000 1705000>;
	162	clock-latency-ns = <20>;
	163	};
	164	opp@416000000 {
	165	opp-hz = /bits/ 64 <416000000>;
	166	opp-microvolt = <1350000 1350000 1705000>;
	167	clock-latency-ns = <20>;
	168	};
	169	opp@520000000 {
	170	opp-hz = /bits/ 64 <520000000>;
	171	opp-microvolt = <1450000 1450000 1705000>;
	172	clock-latency-ns = <20>;
	173	};
	174	opp@624000000 {
	175	opp-hz = /bits/ 64 <624000000>;
	176	opp-microvolt = <1550000 1550000 1705000>;
	177	clock-latency-ns = <20>;
	178	};
	179	};
aff18a67	180	};