]>
Commit | Line | Data |
---|---|---|
aff18a67 | 1 | /* The pxa3xx skeleton simply augments the 2xx version */ |
85fe55c1 | 2 | #include "pxa2xx.dtsi" |
d96672e6 | 3 | #include "dt-bindings/clock/pxa-clock.h" |
aff18a67 DM |
4 | |
5 | / { | |
6 | model = "Marvell PXA27x familiy SoC"; | |
7 | compatible = "marvell,pxa27x"; | |
8 | ||
9 | pxabus { | |
0cd49141 RJ |
10 | pdma: dma-controller@40000000 { |
11 | compatible = "marvell,pdma-1.0"; | |
12 | reg = <0x40000000 0x10000>; | |
13 | interrupts = <25>; | |
14 | #dma-channels = <32>; | |
15 | #dma-cells = <2>; | |
16 | status = "okay"; | |
17 | }; | |
18 | ||
aff18a67 DM |
19 | pxairq: interrupt-controller@40d00000 { |
20 | marvell,intc-priority; | |
21 | marvell,intc-nr-irqs = <34>; | |
22 | }; | |
e7b4a8df | 23 | |
d96672e6 RJ |
24 | gpio: gpio@40e00000 { |
25 | compatible = "intel,pxa27x-gpio"; | |
26 | clocks = <&clks CLK_NONE>; | |
27 | }; | |
28 | ||
e7b4a8df MD |
29 | pwm0: pwm@40b00000 { |
30 | compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm"; | |
31 | reg = <0x40b00000 0x10>; | |
32 | #pwm-cells = <1>; | |
d96672e6 | 33 | clocks = <&clks CLK_PWM0>; |
e7b4a8df MD |
34 | }; |
35 | ||
36 | pwm1: pwm@40b00010 { | |
37 | compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm"; | |
38 | reg = <0x40b00010 0x10>; | |
39 | #pwm-cells = <1>; | |
d96672e6 | 40 | clocks = <&clks CLK_PWM1>; |
e7b4a8df MD |
41 | }; |
42 | ||
43 | pwm2: pwm@40c00000 { | |
44 | compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm"; | |
45 | reg = <0x40c00000 0x10>; | |
46 | #pwm-cells = <1>; | |
d96672e6 | 47 | clocks = <&clks CLK_PWM0>; |
e7b4a8df MD |
48 | }; |
49 | ||
50 | pwm3: pwm@40c00010 { | |
51 | compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm"; | |
52 | reg = <0x40c00010 0x10>; | |
53 | #pwm-cells = <1>; | |
d96672e6 | 54 | clocks = <&clks CLK_PWM1>; |
e7b4a8df | 55 | }; |
f374d1e7 RJ |
56 | |
57 | pwri2c: i2c@40f000180 { | |
58 | compatible = "mrvl,pxa-i2c"; | |
59 | reg = <0x40f00180 0x24>; | |
60 | interrupts = <6>; | |
d96672e6 | 61 | clocks = <&clks CLK_PWRI2C>; |
f374d1e7 RJ |
62 | status = "disabled"; |
63 | }; | |
d96672e6 | 64 | |
361818cd RJ |
65 | pxa27x_udc: udc@40600000 { |
66 | compatible = "marvell,pxa270-udc"; | |
67 | reg = <0x40600000 0x10000>; | |
68 | interrupts = <11>; | |
69 | clocks = <&clks CLK_USB>; | |
70 | status = "disabled"; | |
71 | }; | |
8dcba817 RJ |
72 | |
73 | keypad: keypad@41500000 { | |
74 | compatible = "marvell,pxa27x-keypad"; | |
75 | reg = <0x41500000 0x4c>; | |
76 | interrupts = <4>; | |
77 | clocks = <&clks CLK_KEYPAD>; | |
78 | status = "disabled"; | |
79 | }; | |
aff18a67 | 80 | }; |
85fe55c1 RJ |
81 | |
82 | clocks { | |
83 | /* | |
84 | * The muxing of external clocks/internal dividers for osc* clock | |
85 | * sources has been hidden under the carpet by now. | |
86 | */ | |
87 | #address-cells = <1>; | |
88 | #size-cells = <1>; | |
89 | ranges; | |
90 | ||
d96672e6 RJ |
91 | clks: pxa2xx_clks@41300004 { |
92 | compatible = "marvell,pxa270-clocks"; | |
85fe55c1 RJ |
93 | #clock-cells = <1>; |
94 | status = "okay"; | |
95 | }; | |
96 | }; | |
8dd3075c RJ |
97 | |
98 | timer@40a00000 { | |
99 | compatible = "marvell,pxa-timer"; | |
100 | reg = <0x40a00000 0x20>; | |
101 | interrupts = <26>; | |
102 | clocks = <&clks CLK_OSTIMER>; | |
103 | status = "okay"; | |
104 | }; | |
aff18a67 | 105 | }; |