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a636cd6c | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
aff18a67 DM |
2 | /* |
3 | * pxa2xx.dtsi - Device Tree Include file for Marvell PXA2xx family SoC | |
4 | * | |
5 | * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com> | |
aff18a67 DM |
6 | */ |
7 | ||
d96672e6 | 8 | #include "dt-bindings/clock/pxa-clock.h" |
aff18a67 | 9 | |
9f296fe2 RJ |
10 | #define PMGROUP(pin) #pin |
11 | #define PMMUX(func, pin, af) \ | |
12 | mux- ## func { \ | |
13 | groups = PMGROUP(P ## pin); \ | |
14 | function = #af; \ | |
15 | } | |
16 | #define PMMUX_LPM_LOW(func, pin, af) \ | |
17 | mux- ## func { \ | |
18 | groups = PMGROUP(P ## pin); \ | |
19 | function = #af; \ | |
20 | low-power-disable; \ | |
21 | } | |
22 | #define PMMUX_LPM_HIGH(func, pin, af) \ | |
23 | mux- ## func { \ | |
24 | groups = PMGROUP(P ## pin); \ | |
25 | function = #af; \ | |
26 | low-power-enable; \ | |
27 | } | |
28 | ||
aff18a67 | 29 | / { |
abe60a3a RH |
30 | #address-cells = <1>; |
31 | #size-cells = <1>; | |
aff18a67 DM |
32 | model = "Marvell PXA2xx family SoC"; |
33 | compatible = "marvell,pxa2xx"; | |
34 | interrupt-parent = <&pxairq>; | |
35 | ||
36 | aliases { | |
37 | serial0 = &ffuart; | |
38 | serial1 = &btuart; | |
39 | serial2 = &stuart; | |
40 | serial3 = &hwuart; | |
41 | i2c0 = &pwri2c; | |
42 | i2c1 = &pxai2c1; | |
43 | }; | |
44 | ||
45 | cpus { | |
03362044 LP |
46 | cpu { |
47 | compatible = "marvell,xscale"; | |
48 | device_type = "cpu"; | |
aff18a67 DM |
49 | }; |
50 | }; | |
51 | ||
52 | pxabus { | |
53 | compatible = "simple-bus"; | |
54 | #address-cells = <1>; | |
55 | #size-cells = <1>; | |
56 | ranges; | |
57 | ||
58 | pxairq: interrupt-controller@40d00000 { | |
59 | #interrupt-cells = <1>; | |
60 | compatible = "marvell,pxa-intc"; | |
61 | interrupt-controller; | |
62 | interrupt-parent; | |
63 | marvell,intc-nr-irqs = <32>; | |
64 | reg = <0x40d00000 0xd0>; | |
65 | }; | |
66 | ||
67 | gpio: gpio@40e00000 { | |
68 | compatible = "mrvl,pxa-gpio"; | |
69 | #address-cells = <0x1>; | |
70 | #size-cells = <0x1>; | |
71 | reg = <0x40e00000 0x10000>; | |
72 | gpio-controller; | |
73 | #gpio-cells = <0x2>; | |
4852a25e RJ |
74 | interrupts = <8>, <9>, <10>; |
75 | interrupt-names = "gpio0", "gpio1", "gpio_mux"; | |
aff18a67 DM |
76 | interrupt-controller; |
77 | #interrupt-cells = <0x2>; | |
78 | ranges; | |
79 | ||
80 | gcb0: gpio@40e00000 { | |
81 | reg = <0x40e00000 0x4>; | |
82 | }; | |
83 | ||
84 | gcb1: gpio@40e00004 { | |
85 | reg = <0x40e00004 0x4>; | |
86 | }; | |
87 | ||
88 | gcb2: gpio@40e00008 { | |
89 | reg = <0x40e00008 0x4>; | |
90 | }; | |
91 | gcb3: gpio@40e0000c { | |
92 | reg = <0x40e0000c 0x4>; | |
93 | }; | |
94 | }; | |
95 | ||
4adb6603 | 96 | ffuart: serial@40100000 { |
aff18a67 DM |
97 | compatible = "mrvl,pxa-uart"; |
98 | reg = <0x40100000 0x30>; | |
99 | interrupts = <22>; | |
d96672e6 | 100 | clocks = <&clks CLK_FFUART>; |
aff18a67 DM |
101 | status = "disabled"; |
102 | }; | |
103 | ||
4adb6603 | 104 | btuart: serial@40200000 { |
aff18a67 DM |
105 | compatible = "mrvl,pxa-uart"; |
106 | reg = <0x40200000 0x30>; | |
107 | interrupts = <21>; | |
d96672e6 | 108 | clocks = <&clks CLK_BTUART>; |
aff18a67 DM |
109 | status = "disabled"; |
110 | }; | |
111 | ||
4adb6603 | 112 | stuart: serial@40700000 { |
aff18a67 DM |
113 | compatible = "mrvl,pxa-uart"; |
114 | reg = <0x40700000 0x30>; | |
115 | interrupts = <20>; | |
d96672e6 | 116 | clocks = <&clks CLK_STUART>; |
aff18a67 DM |
117 | status = "disabled"; |
118 | }; | |
119 | ||
513057f1 | 120 | hwuart: serial@41600000 { |
aff18a67 | 121 | compatible = "mrvl,pxa-uart"; |
513057f1 | 122 | reg = <0x41600000 0x30>; |
aff18a67 DM |
123 | interrupts = <7>; |
124 | status = "disabled"; | |
125 | }; | |
126 | ||
127 | pxai2c1: i2c@40301680 { | |
128 | compatible = "mrvl,pxa-i2c"; | |
129 | reg = <0x40301680 0x30>; | |
130 | interrupts = <18>; | |
d96672e6 | 131 | clocks = <&clks CLK_I2C>; |
aff18a67 DM |
132 | #address-cells = <0x1>; |
133 | #size-cells = <0>; | |
134 | status = "disabled"; | |
135 | }; | |
136 | ||
aff18a67 | 137 | mmc0: mmc@41100000 { |
2bf172cf | 138 | compatible = "marvell,pxa-mmc"; |
aff18a67 DM |
139 | reg = <0x41100000 0x1000>; |
140 | interrupts = <23>; | |
316c9382 RJ |
141 | clocks = <&clks CLK_MMC>; |
142 | dmas = <&pdma 21 3 | |
143 | &pdma 22 3>; | |
144 | dma-names = "rx", "tx"; | |
aff18a67 DM |
145 | status = "disabled"; |
146 | }; | |
147 | ||
148 | rtc@40900000 { | |
149 | compatible = "marvell,pxa-rtc"; | |
150 | reg = <0x40900000 0x3c>; | |
151 | interrupts = <30 31>; | |
152 | }; | |
bc0c0c30 | 153 | |
e66e3998 | 154 | lcdc: lcd-controller@40500000 { |
bc0c0c30 RJ |
155 | compatible = "marvell,pxa2xx-lcdc"; |
156 | reg = <0x44000000 0x10000>; | |
157 | interrupts = <17>; | |
158 | clocks = <&clks CLK_LCD>; | |
159 | status = "disabled"; | |
160 | }; | |
aff18a67 DM |
161 | }; |
162 | }; |