[mirror_ubuntu-zesty-kernel.git] / arch / arm / boot / dts / pxa3xx.dtsi

/* The pxa3xx skeleton simply augments the 2xx version */
#include "pxa2xx.dtsi"

#define MFP_PIN_PXA300(gpio)				\
	((gpio <= 2) ? (0x00b4 + 4 * gpio) :		\
	 (gpio <= 26) ? (0x027c + 4 * (gpio - 3)) :	\
	 (gpio <= 98) ? (0x0400 + 4 * (gpio - 27)) :	\
	 (gpio <= 127) ? (0x0600 + 4 * (gpio - 99)) :	\
	 0)

#define MFP_PIN_PXA310(gpio)				\
	((gpio <= 2) ? (0x00b4 + 4 * gpio) :		\
	 (gpio <= 26) ? (0x027c + 4 * (gpio - 3)) :	\
	 (gpio <= 29) ? (0x0400 + 4 * (gpio - 27)) :	\
	 (gpio <= 98) ? (0x0418 + 4 * (gpio - 30)) :	\
	 (gpio <= 127) ? (0x0600 + 4 * (gpio - 99)) :	\
	 (gpio <= 262) ? 0 :				\
	 (gpio <= 268) ? (0x052c + 4 * (gpio - 263)) :	\
	 0)

#define MFP_PIN_PXA320(gpio)				\
	((gpio <= 4) ? (0x0124 + 4 * gpio) :		\
	 (gpio <= 9) ? (0x028c + 4 * (gpio - 5)) :	\
	 (gpio <= 10) ? (0x0458 + 4 * (gpio - 10)) :	\
	 (gpio <= 26) ? (0x02a0 + 4 * (gpio - 11)) :	\
	 (gpio <= 48) ? (0x0400 + 4 * (gpio - 27)) :	\
	 (gpio <= 62) ? (0x045c + 4 * (gpio - 49)) :	\
	 (gpio <= 73) ? (0x04b4 + 4 * (gpio - 63)) :	\
	 (gpio <= 98) ? (0x04f0 + 4 * (gpio - 74)) :	\
	 (gpio <= 127) ? (0x0600 + 4 * (gpio - 99)) :	\
	 0)

/*
 * MFP Alternate functions for pins having a gpio.
 * Example of use: pinctrl-single,pins = < MFP_PIN_PXA310(21) MFP_AF1 >
 */
#define MFP_AF0		(0 << 0)
#define MFP_AF1		(1 << 0)
#define MFP_AF2		(2 << 0)
#define MFP_AF3		(3 << 0)
#define MFP_AF4		(4 << 0)
#define MFP_AF5		(5 << 0)
#define MFP_AF6		(6 << 0)

/*
 * MFP drive strength functions for pins.
 * Example of use: pinctrl-single,drive-strength = MFP_DS03X;
 */
#define MFP_DSMSK	(0x7 << 10)
#define MFP_DS01X	< (0x0 << 10) MFP_DSMSK >
#define MFP_DS02X	< (0x1 << 10) MFP_DSMSK >
#define MFP_DS03X	< (0x2 << 10) MFP_DSMSK >
#define MFP_DS04X	< (0x3 << 10) MFP_DSMSK >
#define MFP_DS06X	< (0x4 << 10) MFP_DSMSK >
#define MFP_DS08X	< (0x5 << 10) MFP_DSMSK >
#define MFP_DS10X	< (0x6 << 10) MFP_DSMSK >
#define MFP_DS13X	< (0x7 << 10) MFP_DSMSK >

/*
 * MFP low power mode for pins.
 * Example of use:
 *   pinctrl-single,low-power-mode = MFP_LPM(MFP_LPM_PULL_LOW|MFP_LPM_EDGE_FALL);
 *
 * Table that determines the low power modes outputs, with actual settings
 * used in parentheses for don't-care values. Except for the float output,
 * the configured driven and pulled levels match, so if there is a need for
 * non-LPM pulled output, the same configuration could probably be used.
 *
 * Output value  sleep_oe_n  sleep_data  pullup_en  pulldown_en  pull_sel
 *                 (bit 7)    (bit 8)    (bit 14)     (bit 13)   (bit 15)
 *
 * Input            0          X(0)        X(0)        X(0)       0
 * Drive 0          0          0           0           X(1)       0
 * Drive 1          0          1           X(1)        0	  0
 * Pull hi (1)      1          X(1)        1           0	  0
 * Pull lo (0)      1          X(0)        0           1	  0
 * Z (float)        1          X(0)        0           0	  0
 */
#define MFP_LPM(x)		< (x) MFP_LPM_MSK >

#define MFP_LPM_MSK		0xe1f0
#define MFP_LPM_INPUT		0x0000
#define MFP_LPM_DRIVE_LOW	0x2000
#define MFP_LPM_DRIVE_HIGH	0x4100
#define MFP_LPM_PULL_LOW	0x2080
#define MFP_LPM_PULL_HIGH	0x4180
#define MFP_LPM_FLOAT		0x0080

#define MFP_LPM_EDGE_NONE	0x0000
#define MFP_LPM_EDGE_RISE	0x0010
#define MFP_LPM_EDGE_FALL	0x0020
#define MFP_LPM_EDGE_BOTH	0x0030

/ {
	model = "Marvell PXA3xx familiy SoC";
	compatible = "marvell,pxa3xx";

	pxabus {
		pdma: dma-controller@40000000 {
			compatible = "marvell,pdma-1.0";
			reg = <0x40000000 0x10000>;
			interrupts = <25>;
			#dma-channels = <32>;
			#dma-cells = <2>;
			#dma-requests = <100>;
			status = "okay";
		};

		pwri2c: i2c@40f500c0 {
			compatible = "mrvl,pwri2c";
			reg = <0x40f500c0 0x30>;
			interrupts = <6>;
			clocks = <&clks CLK_PWRI2C>;
			#address-cells = <0x1>;
			#size-cells = <0>;
			status = "disabled";
		};

		nand0: nand@43100000 {
			compatible = "marvell,pxa3xx-nand";
			reg = <0x43100000 90>;
			interrupts = <45>;
			clocks = <&clks CLK_NAND>;
			dmas = <&pdma 97 3>;
			dma-names = "data";
			#address-cells = <1>;
			#size-cells = <1>;	
			status = "disabled";
		};

		pxairq: interrupt-controller@40d00000 {
			marvell,intc-priority;
			marvell,intc-nr-irqs = <56>;
		};

		pinctrl: pinctrl@40e10000 {
			compatible = "pinconf-single";
			reg = <0x40e10000 0xffff>;
			#address-cells = <1>;
			#size-cells = <0>;
			#pinctrl-cells = <1>;
			pinctrl-single,register-width = <32>;
			pinctrl-single,function-mask = <0x7>;
		};

		gpio: gpio@40e00000 {
			compatible = "intel,pxa3xx-gpio";
			reg = <0x40e00000 0x10000>;
			clocks = <&clks CLK_GPIO>;
			interrupt-names = "gpio0", "gpio1", "gpio_mux";
			interrupts = <8 9 10>;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
		};

		mmc0: mmc@41100000 {
			compatible = "marvell,pxa-mmc";
			reg = <0x41100000 0x1000>;
			interrupts = <23>;
			clocks = <&clks CLK_MMC>;
			dmas = <&pdma 21 3
				&pdma 22 3>;
			dma-names = "rx", "tx";
			status = "disabled";
		};

		mmc1: mmc@42000000 {
			compatible = "marvell,pxa-mmc";
			reg = <0x42000000 0x1000>;
			interrupts = <41>;
			clocks = <&clks CLK_MMC1>;
			dmas = <&pdma 93 3
				&pdma 94 3>;
			dma-names = "rx", "tx";
			status = "disabled";
		};

		mmc2: mmc@42500000 {
			compatible = "marvell,pxa-mmc";
			reg = <0x42500000 0x1000>;
			interrupts = <55>;
			clocks = <&clks CLK_MMC2>;
			dmas = <&pdma 46 3
				&pdma 47 3>;
			dma-names = "rx", "tx";
			status = "disabled";
		};

		pxa3xx_ohci: usb@4c000000 {
			compatible = "marvell,pxa-ohci";
			reg = <0x4c000000 0x10000>;
			interrupts = <3>;
			clocks = <&clks CLK_USBH>;
			status = "disabled";
		};

		pwm0: pwm@40b00000 {
			compatible = "marvell,pxa270-pwm";
			reg = <0x40b00000 0x10>;
			#pwm-cells = <1>;
			clocks = <&clks CLK_PWM0>;
			status = "disabled";
		};

		pwm1: pwm@40b00010 {
			compatible = "marvell,pxa270-pwm";
			reg = <0x40b00010 0x10>;
			#pwm-cells = <1>;
			clocks = <&clks CLK_PWM1>;
			status = "disabled";
		};

		pwm2: pwm@40c00000 {
			compatible = "marvell,pxa270-pwm";
			reg = <0x40c00000 0x10>;
			#pwm-cells = <1>;
			clocks = <&clks CLK_PWM0>;
			status = "disabled";
		};

		pwm3: pwm@40c00010 {
			compatible = "marvell,pxa270-pwm";
			reg = <0x40c00010 0x10>;
			#pwm-cells = <1>;
			clocks = <&clks CLK_PWM1>;
			status = "disabled";
		};
	};

	clocks {
	       /*
		* The muxing of external clocks/internal dividers for osc* clock
		* sources has been hidden under the carpet by now.
		*/
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		clks: pxa3xx_clks@41300004 {
			compatible = "marvell,pxa300-clocks";
			#clock-cells = <1>;
			status = "okay";
		};
	};

	timer@40a00000 {
		compatible = "marvell,pxa-timer";
		reg = <0x40a00000 0x20>;
		interrupts = <26>;
		clocks = <&clks CLK_OSTIMER>;
		status = "okay";
	};
};
Commit	Line	Data
aff18a67	1	/* The pxa3xx skeleton simply augments the 2xx version */
d96672e6	2	#include "pxa2xx.dtsi"
aff18a67	3
fca43c3f RJ	4	#define MFP_PIN_PXA300(gpio) \
	5	((gpio <= 2) ? (0x00b4 + 4 * gpio) : \
	6	(gpio <= 26) ? (0x027c + 4 * (gpio - 3)) : \
	7	(gpio <= 98) ? (0x0400 + 4 * (gpio - 27)) : \
	8	(gpio <= 127) ? (0x0600 + 4 * (gpio - 99)) : \
	9	0)
	10
	11	#define MFP_PIN_PXA310(gpio) \
	12	((gpio <= 2) ? (0x00b4 + 4 * gpio) : \
	13	(gpio <= 26) ? (0x027c + 4 * (gpio - 3)) : \
	14	(gpio <= 29) ? (0x0400 + 4 * (gpio - 27)) : \
	15	(gpio <= 98) ? (0x0418 + 4 * (gpio - 30)) : \
	16	(gpio <= 127) ? (0x0600 + 4 * (gpio - 99)) : \
	17	(gpio <= 262) ? 0 : \
	18	(gpio <= 268) ? (0x052c + 4 * (gpio - 263)) : \
	19	0)
	20
	21	#define MFP_PIN_PXA320(gpio) \
	22	((gpio <= 4) ? (0x0124 + 4 * gpio) : \
	23	(gpio <= 9) ? (0x028c + 4 * (gpio - 5)) : \
	24	(gpio <= 10) ? (0x0458 + 4 * (gpio - 10)) : \
	25	(gpio <= 26) ? (0x02a0 + 4 * (gpio - 11)) : \
	26	(gpio <= 48) ? (0x0400 + 4 * (gpio - 27)) : \
	27	(gpio <= 62) ? (0x045c + 4 * (gpio - 49)) : \
	28	(gpio <= 73) ? (0x04b4 + 4 * (gpio - 63)) : \
	29	(gpio <= 98) ? (0x04f0 + 4 * (gpio - 74)) : \
	30	(gpio <= 127) ? (0x0600 + 4 * (gpio - 99)) : \
	31	0)
	32
	33	/*
	34	* MFP Alternate functions for pins having a gpio.
	35	* Example of use: pinctrl-single,pins = < MFP_PIN_PXA310(21) MFP_AF1 >
	36	*/
	37	#define MFP_AF0 (0 << 0)
	38	#define MFP_AF1 (1 << 0)
	39	#define MFP_AF2 (2 << 0)
	40	#define MFP_AF3 (3 << 0)
	41	#define MFP_AF4 (4 << 0)
	42	#define MFP_AF5 (5 << 0)
	43	#define MFP_AF6 (6 << 0)
	44
	45	/*
	46	* MFP drive strength functions for pins.
	47	* Example of use: pinctrl-single,drive-strength = MFP_DS03X;
	48	*/
	49	#define MFP_DSMSK (0x7 << 10)
	50	#define MFP_DS01X < (0x0 << 10) MFP_DSMSK >
	51	#define MFP_DS02X < (0x1 << 10) MFP_DSMSK >
	52	#define MFP_DS03X < (0x2 << 10) MFP_DSMSK >
	53	#define MFP_DS04X < (0x3 << 10) MFP_DSMSK >
	54	#define MFP_DS06X < (0x4 << 10) MFP_DSMSK >
	55	#define MFP_DS08X < (0x5 << 10) MFP_DSMSK >
	56	#define MFP_DS10X < (0x6 << 10) MFP_DSMSK >
	57	#define MFP_DS13X < (0x7 << 10) MFP_DSMSK >
	58
	59	/*
	60	* MFP low power mode for pins.
	61	* Example of use:
	62	* pinctrl-single,low-power-mode = MFP_LPM(MFP_LPM_PULL_LOW\|MFP_LPM_EDGE_FALL);
	63	*
	64	* Table that determines the low power modes outputs, with actual settings
	65	* used in parentheses for don't-care values. Except for the float output,
	66	* the configured driven and pulled levels match, so if there is a need for
	67	* non-LPM pulled output, the same configuration could probably be used.
68	*
69	* Output value sleep_oe_n sleep_data pullup_en pulldown_en pull_sel
70	* (bit 7) (bit 8) (bit 14) (bit 13) (bit 15)
71	*
72	* Input 0 X(0) X(0) X(0) 0
73	* Drive 0 0 0 0 X(1) 0
74	* Drive 1 0 1 X(1) 0 0
75	* Pull hi (1) 1 X(1) 1 0 0
76	* Pull lo (0) 1 X(0) 0 1 0
77	* Z (float) 1 X(0) 0 0 0
78	*/
79	#define MFP_LPM(x) < (x) MFP_LPM_MSK >
80
81	#define MFP_LPM_MSK 0xe1f0
82	#define MFP_LPM_INPUT 0x0000
83	#define MFP_LPM_DRIVE_LOW 0x2000
84	#define MFP_LPM_DRIVE_HIGH 0x4100
85	#define MFP_LPM_PULL_LOW 0x2080
86	#define MFP_LPM_PULL_HIGH 0x4180
87	#define MFP_LPM_FLOAT 0x0080
88
89	#define MFP_LPM_EDGE_NONE 0x0000
90	#define MFP_LPM_EDGE_RISE 0x0010
91	#define MFP_LPM_EDGE_FALL 0x0020
92	#define MFP_LPM_EDGE_BOTH 0x0030
93
aff18a67 DM	94	/ {
	95	model = "Marvell PXA3xx familiy SoC";
	96	compatible = "marvell,pxa3xx";
	97
	98	pxabus {
0cd49141 RJ	99	pdma: dma-controller@40000000 {
	100	compatible = "marvell,pdma-1.0";
	101	reg = <0x40000000 0x10000>;
	102	interrupts = <25>;
	103	#dma-channels = <32>;
	104	#dma-cells = <2>;
72b195cb	105	#dma-requests = <100>;
0cd49141 RJ	106	status = "okay";
	107	};
	108
aff18a67 DM	109	pwri2c: i2c@40f500c0 {
	110	compatible = "mrvl,pwri2c";
	111	reg = <0x40f500c0 0x30>;
	112	interrupts = <6>;
d96672e6	113	clocks = <&clks CLK_PWRI2C>;
aff18a67 DM	114	#address-cells = <0x1>;
	115	#size-cells = <0>;
	116	status = "disabled";
	117	};
	118
	119	nand0: nand@43100000 {
	120	compatible = "marvell,pxa3xx-nand";
	121	reg = <0x43100000 90>;
	122	interrupts = <45>;
d96672e6	123	clocks = <&clks CLK_NAND>;
07c6b2d0	124	dmas = <&pdma 97 3>;
c943646d	125	dma-names = "data";
aff18a67 DM	126	#address-cells = <1>;
	127	#size-cells = <1>;
	128	status = "disabled";
	129	};
	130
	131	pxairq: interrupt-controller@40d00000 {
	132	marvell,intc-priority;
	133	marvell,intc-nr-irqs = <56>;
	134	};
93c5a5b1	135
3a23249e RJ	136	pinctrl: pinctrl@40e10000 {
	137	compatible = "pinconf-single";
	138	reg = <0x40e10000 0xffff>;
	139	#address-cells = <1>;
	140	#size-cells = <0>;
be76fd31	141	#pinctrl-cells = <1>;
3a23249e RJ	142	pinctrl-single,register-width = <32>;
	143	pinctrl-single,function-mask = <0x7>;
	144	};
	145
93c5a5b1 DM	146	gpio: gpio@40e00000 {
	147	compatible = "intel,pxa3xx-gpio";
	148	reg = <0x40e00000 0x10000>;
d96672e6	149	clocks = <&clks CLK_GPIO>;
93c5a5b1 DM	150	interrupt-names = "gpio0", "gpio1", "gpio_mux";
	151	interrupts = <8 9 10>;
	152	gpio-controller;
	153	#gpio-cells = <0x2>;
	154	interrupt-controller;
	155	#interrupt-cells = <0x2>;
	156	};
316c9382 RJ	157
	158	mmc0: mmc@41100000 {
	159	compatible = "marvell,pxa-mmc";
	160	reg = <0x41100000 0x1000>;
	161	interrupts = <23>;
	162	clocks = <&clks CLK_MMC>;
	163	dmas = <&pdma 21 3
	164	&pdma 22 3>;
	165	dma-names = "rx", "tx";
	166	status = "disabled";
	167	};
	168
	169	mmc1: mmc@42000000 {
	170	compatible = "marvell,pxa-mmc";
	171	reg = <0x42000000 0x1000>;
	172	interrupts = <41>;
	173	clocks = <&clks CLK_MMC1>;
	174	dmas = <&pdma 93 3
	175	&pdma 94 3>;
	176	dma-names = "rx", "tx";
	177	status = "disabled";
	178	};
	179
	180	mmc2: mmc@42500000 {
	181	compatible = "marvell,pxa-mmc";
	182	reg = <0x42500000 0x1000>;
	183	interrupts = <55>;
	184	clocks = <&clks CLK_MMC2>;
	185	dmas = <&pdma 46 3
	186	&pdma 47 3>;
	187	dma-names = "rx", "tx";
	188	status = "disabled";
	189	};
0ec19396 RJ	190
	191	pxa3xx_ohci: usb@4c000000 {
	192	compatible = "marvell,pxa-ohci";
	193	reg = <0x4c000000 0x10000>;
	194	interrupts = <3>;
aa71cc50	195	clocks = <&clks CLK_USBH>;
0ec19396 RJ	196	status = "disabled";
0ec19396 RJ	197	};
85deaec8 RJ	198
	199	pwm0: pwm@40b00000 {
	200	compatible = "marvell,pxa270-pwm";
	201	reg = <0x40b00000 0x10>;
	202	#pwm-cells = <1>;
	203	clocks = <&clks CLK_PWM0>;
	204	status = "disabled";
	205	};
	206
	207	pwm1: pwm@40b00010 {
	208	compatible = "marvell,pxa270-pwm";
	209	reg = <0x40b00010 0x10>;
	210	#pwm-cells = <1>;
	211	clocks = <&clks CLK_PWM1>;
	212	status = "disabled";
	213	};
	214
	215	pwm2: pwm@40c00000 {
	216	compatible = "marvell,pxa270-pwm";
	217	reg = <0x40c00000 0x10>;
	218	#pwm-cells = <1>;
	219	clocks = <&clks CLK_PWM0>;
	220	status = "disabled";
	221	};
	222
	223	pwm3: pwm@40c00010 {
	224	compatible = "marvell,pxa270-pwm";
	225	reg = <0x40c00010 0x10>;
	226	#pwm-cells = <1>;
	227	clocks = <&clks CLK_PWM1>;
	228	status = "disabled";
	229	};
aff18a67	230	};
d96672e6 RJ	231
	232	clocks {
	233	/*
	234	* The muxing of external clocks/internal dividers for osc* clock
	235	* sources has been hidden under the carpet by now.
	236	*/
	237	#address-cells = <1>;
	238	#size-cells = <1>;
	239	ranges;
	240
	241	clks: pxa3xx_clks@41300004 {
	242	compatible = "marvell,pxa300-clocks";
	243	#clock-cells = <1>;
	244	status = "okay";
	245	};
	246	};
8dd3075c RJ	247
	248	timer@40a00000 {
	249	compatible = "marvell,pxa-timer";
	250	reg = <0x40a00000 0x20>;
	251	interrupts = <26>;
	252	clocks = <&clks CLK_OSTIMER>;
	253	status = "okay";
	254	};
aff18a67	255	};