[mirror_ubuntu-artful-kernel.git] / arch / arm / boot / dts / r7s72100.dtsi

/*
 * Device Tree Source for the r7s72100 SoC
 *
 * Copyright (C) 2013 Renesas Solutions Corp.
 *
 * This file is licensed under the terms of the GNU General Public License
 * version 2.  This program is licensed "as is" without any warranty of any
 * kind, whether express or implied.
 */

#include <dt-bindings/interrupt-controller/irq.h>

/ {
	compatible = "renesas,r7s72100";
	interrupt-parent = <&gic>;
	#address-cells = <1>;
	#size-cells = <1>;

	aliases {
		i2c0 = &i2c0;
		i2c1 = &i2c1;
		i2c2 = &i2c2;
		i2c3 = &i2c3;
		spi0 = &spi0;
		spi1 = &spi1;
		spi2 = &spi2;
		spi3 = &spi3;
		spi4 = &spi4;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a9";
			reg = <0>;
		};
	};

	gic: interrupt-controller@e8201000 {
		compatible = "arm,cortex-a9-gic";
		#interrupt-cells = <3>;
		#address-cells = <0>;
		interrupt-controller;
		reg = <0xe8201000 0x1000>,
			<0xe8202000 0x1000>;
	};

	i2c0: i2c@fcfee000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
		reg = <0xfcfee000 0x44>;
		interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>,
			     <0 158 IRQ_TYPE_EDGE_RISING>,
			     <0 159 IRQ_TYPE_EDGE_RISING>,
			     <0 160 IRQ_TYPE_LEVEL_HIGH>,
			     <0 161 IRQ_TYPE_LEVEL_HIGH>,
			     <0 162 IRQ_TYPE_LEVEL_HIGH>,
			     <0 163 IRQ_TYPE_LEVEL_HIGH>,
			     <0 164 IRQ_TYPE_LEVEL_HIGH>;
		clock-frequency = <100000>;
		status = "disabled";
	};

	i2c1: i2c@fcfee400 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
		reg = <0xfcfee400 0x44>;
		interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>,
			     <0 166 IRQ_TYPE_EDGE_RISING>,
			     <0 167 IRQ_TYPE_EDGE_RISING>,
			     <0 168 IRQ_TYPE_LEVEL_HIGH>,
			     <0 169 IRQ_TYPE_LEVEL_HIGH>,
			     <0 170 IRQ_TYPE_LEVEL_HIGH>,
			     <0 171 IRQ_TYPE_LEVEL_HIGH>,
			     <0 172 IRQ_TYPE_LEVEL_HIGH>;
		clock-frequency = <100000>;
		status = "disabled";
	};

	i2c2: i2c@fcfee800 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
		reg = <0xfcfee800 0x44>;
		interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>,
			     <0 174 IRQ_TYPE_EDGE_RISING>,
			     <0 175 IRQ_TYPE_EDGE_RISING>,
			     <0 176 IRQ_TYPE_LEVEL_HIGH>,
			     <0 177 IRQ_TYPE_LEVEL_HIGH>,
			     <0 178 IRQ_TYPE_LEVEL_HIGH>,
			     <0 179 IRQ_TYPE_LEVEL_HIGH>,
			     <0 180 IRQ_TYPE_LEVEL_HIGH>;
		clock-frequency = <100000>;
		status = "disabled";
	};

	i2c3: i2c@fcfeec00 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
		reg = <0xfcfeec00 0x44>;
		interrupts = <0 181 IRQ_TYPE_LEVEL_HIGH>,
			     <0 182 IRQ_TYPE_EDGE_RISING>,
			     <0 183 IRQ_TYPE_EDGE_RISING>,
			     <0 184 IRQ_TYPE_LEVEL_HIGH>,
			     <0 185 IRQ_TYPE_LEVEL_HIGH>,
			     <0 186 IRQ_TYPE_LEVEL_HIGH>,
			     <0 187 IRQ_TYPE_LEVEL_HIGH>,
			     <0 188 IRQ_TYPE_LEVEL_HIGH>;
		clock-frequency = <100000>;
		status = "disabled";
	};

	spi0: spi@e800c800 {
		compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
		reg = <0xe800c800 0x24>;
		interrupts = <0 238 IRQ_TYPE_LEVEL_HIGH>,
			     <0 239 IRQ_TYPE_LEVEL_HIGH>,
			     <0 240 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-names = "error", "rx", "tx";
		num-cs = <1>;
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};

	spi1: spi@e800d000 {
		compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
		reg = <0xe800d000 0x24>;
		interrupts = <0 241 IRQ_TYPE_LEVEL_HIGH>,
			     <0 242 IRQ_TYPE_LEVEL_HIGH>,
			     <0 243 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-names = "error", "rx", "tx";
		num-cs = <1>;
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};

	spi2: spi@e800d800 {
		compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
		reg = <0xe800d800 0x24>;
		interrupts = <0 244 IRQ_TYPE_LEVEL_HIGH>,
			     <0 245 IRQ_TYPE_LEVEL_HIGH>,
			     <0 246 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-names = "error", "rx", "tx";
		num-cs = <1>;
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};

	spi3: spi@e800e000 {
		compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
		reg = <0xe800e000 0x24>;
		interrupts = <0 247 IRQ_TYPE_LEVEL_HIGH>,
			     <0 248 IRQ_TYPE_LEVEL_HIGH>,
			     <0 249 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-names = "error", "rx", "tx";
		num-cs = <1>;
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};

	spi4: spi@e800e800 {
		compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
		reg = <0xe800e800 0x24>;
		interrupts = <0 250 IRQ_TYPE_LEVEL_HIGH>,
			     <0 251 IRQ_TYPE_LEVEL_HIGH>,
			     <0 252 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-names = "error", "rx", "tx";
		num-cs = <1>;
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};
};
Commit	Line	Data
e3da5b36 MD	1	/*
	2	* Device Tree Source for the r7s72100 SoC
	3	*
	4	* Copyright (C) 2013 Renesas Solutions Corp.
	5	*
	6	* This file is licensed under the terms of the GNU General Public License
	7	* version 2. This program is licensed "as is" without any warranty of any
	8	* kind, whether express or implied.
	9	*/
	10
4b18e83f GU	11	#include <dt-bindings/interrupt-controller/irq.h>
4b18e83f GU	12
e3da5b36 MD	13	/ {
	14	compatible = "renesas,r7s72100";
	15	interrupt-parent = <&gic>;
	16	#address-cells = <1>;
	17	#size-cells = <1>;
	18
4b18e83f	19	aliases {
c81a4d3d WS	20	i2c0 = &i2c0;
	21	i2c1 = &i2c1;
	22	i2c2 = &i2c2;
	23	i2c3 = &i2c3;
4b18e83f GU	24	spi0 = &spi0;
	25	spi1 = &spi1;
	26	spi2 = &spi2;
	27	spi3 = &spi3;
	28	spi4 = &spi4;
	29	};
	30
e3da5b36 MD	31	cpus {
	32	#address-cells = <1>;
	33	#size-cells = <0>;
	34
	35	cpu@0 {
	36	device_type = "cpu";
	37	compatible = "arm,cortex-a9";
	38	reg = <0>;
	39	};
	40	};
	41
	42	gic: interrupt-controller@e8201000 {
	43	compatible = "arm,cortex-a9-gic";
	44	#interrupt-cells = <3>;
	45	#address-cells = <0>;
	46	interrupt-controller;
	47	reg = <0xe8201000 0x1000>,
	48	<0xe8202000 0x1000>;
	49	};
4b18e83f	50
c81a4d3d WS	51	i2c0: i2c@fcfee000 {
	52	#address-cells = <1>;
	53	#size-cells = <0>;
	54	compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
	55	reg = <0xfcfee000 0x44>;
	56	interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>,
	57	<0 158 IRQ_TYPE_EDGE_RISING>,
	58	<0 159 IRQ_TYPE_EDGE_RISING>,
	59	<0 160 IRQ_TYPE_LEVEL_HIGH>,
	60	<0 161 IRQ_TYPE_LEVEL_HIGH>,
	61	<0 162 IRQ_TYPE_LEVEL_HIGH>,
	62	<0 163 IRQ_TYPE_LEVEL_HIGH>,
	63	<0 164 IRQ_TYPE_LEVEL_HIGH>;
	64	clock-frequency = <100000>;
	65	status = "disabled";
	66	};
	67
	68	i2c1: i2c@fcfee400 {
	69	#address-cells = <1>;
	70	#size-cells = <0>;
	71	compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
	72	reg = <0xfcfee400 0x44>;
	73	interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>,
	74	<0 166 IRQ_TYPE_EDGE_RISING>,
	75	<0 167 IRQ_TYPE_EDGE_RISING>,
	76	<0 168 IRQ_TYPE_LEVEL_HIGH>,
	77	<0 169 IRQ_TYPE_LEVEL_HIGH>,
	78	<0 170 IRQ_TYPE_LEVEL_HIGH>,
	79	<0 171 IRQ_TYPE_LEVEL_HIGH>,
	80	<0 172 IRQ_TYPE_LEVEL_HIGH>;
	81	clock-frequency = <100000>;
	82	status = "disabled";
	83	};
	84
	85	i2c2: i2c@fcfee800 {
	86	#address-cells = <1>;
	87	#size-cells = <0>;
	88	compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
	89	reg = <0xfcfee800 0x44>;
	90	interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>,
	91	<0 174 IRQ_TYPE_EDGE_RISING>,
	92	<0 175 IRQ_TYPE_EDGE_RISING>,
	93	<0 176 IRQ_TYPE_LEVEL_HIGH>,
	94	<0 177 IRQ_TYPE_LEVEL_HIGH>,
	95	<0 178 IRQ_TYPE_LEVEL_HIGH>,
	96	<0 179 IRQ_TYPE_LEVEL_HIGH>,
	97	<0 180 IRQ_TYPE_LEVEL_HIGH>;
	98	clock-frequency = <100000>;
	99	status = "disabled";
	100	};
	101
	102	i2c3: i2c@fcfeec00 {
	103	#address-cells = <1>;
	104	#size-cells = <0>;
	105	compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
	106	reg = <0xfcfeec00 0x44>;
	107	interrupts = <0 181 IRQ_TYPE_LEVEL_HIGH>,
	108	<0 182 IRQ_TYPE_EDGE_RISING>,
	109	<0 183 IRQ_TYPE_EDGE_RISING>,
	110	<0 184 IRQ_TYPE_LEVEL_HIGH>,
	111	<0 185 IRQ_TYPE_LEVEL_HIGH>,
	112	<0 186 IRQ_TYPE_LEVEL_HIGH>,
	113	<0 187 IRQ_TYPE_LEVEL_HIGH>,
	114	<0 188 IRQ_TYPE_LEVEL_HIGH>;
115	clock-frequency = <100000>;
116	status = "disabled";
117	};
118
4b18e83f GU	119	spi0: spi@e800c800 {
	120	compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
	121	reg = <0xe800c800 0x24>;
	122	interrupts = <0 238 IRQ_TYPE_LEVEL_HIGH>,
	123	<0 239 IRQ_TYPE_LEVEL_HIGH>,
	124	<0 240 IRQ_TYPE_LEVEL_HIGH>;
	125	interrupt-names = "error", "rx", "tx";
	126	num-cs = <1>;
	127	#address-cells = <1>;
	128	#size-cells = <0>;
	129	status = "disabled";
	130	};
	131
	132	spi1: spi@e800d000 {
	133	compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
	134	reg = <0xe800d000 0x24>;
	135	interrupts = <0 241 IRQ_TYPE_LEVEL_HIGH>,
	136	<0 242 IRQ_TYPE_LEVEL_HIGH>,
	137	<0 243 IRQ_TYPE_LEVEL_HIGH>;
	138	interrupt-names = "error", "rx", "tx";
	139	num-cs = <1>;
	140	#address-cells = <1>;
	141	#size-cells = <0>;
	142	status = "disabled";
	143	};
	144
	145	spi2: spi@e800d800 {
	146	compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
	147	reg = <0xe800d800 0x24>;
	148	interrupts = <0 244 IRQ_TYPE_LEVEL_HIGH>,
	149	<0 245 IRQ_TYPE_LEVEL_HIGH>,
	150	<0 246 IRQ_TYPE_LEVEL_HIGH>;
	151	interrupt-names = "error", "rx", "tx";
	152	num-cs = <1>;
	153	#address-cells = <1>;
	154	#size-cells = <0>;
	155	status = "disabled";
	156	};
	157
	158	spi3: spi@e800e000 {
	159	compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
	160	reg = <0xe800e000 0x24>;
	161	interrupts = <0 247 IRQ_TYPE_LEVEL_HIGH>,
	162	<0 248 IRQ_TYPE_LEVEL_HIGH>,
	163	<0 249 IRQ_TYPE_LEVEL_HIGH>;
	164	interrupt-names = "error", "rx", "tx";
	165	num-cs = <1>;
	166	#address-cells = <1>;
	167	#size-cells = <0>;
	168	status = "disabled";
	169	};
	170
	171	spi4: spi@e800e800 {
	172	compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
	173	reg = <0xe800e800 0x24>;
	174	interrupts = <0 250 IRQ_TYPE_LEVEL_HIGH>,
	175	<0 251 IRQ_TYPE_LEVEL_HIGH>,
	176	<0 252 IRQ_TYPE_LEVEL_HIGH>;
	177	interrupt-names = "error", "rx", "tx";
	178	num-cs = <1>;
	179	#address-cells = <1>;
	180	#size-cells = <0>;
	181	status = "disabled";
	182	};
e3da5b36	183	};