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1/*
2 * Device Tree Source for the r8a7740 SoC
3 *
4 * Copyright (C) 2012 Renesas Solutions Corp.
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11/include/ "skeleton.dtsi"
12
13/ {
14 compatible = "renesas,r8a7740";
15
16 cpus {
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17 #address-cells = <1>;
18 #size-cells = <0>;
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19 cpu@0 {
20 compatible = "arm,cortex-a9";
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21 device_type = "cpu";
22 reg = <0x0>;
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23 };
24 };
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25
26 gic: interrupt-controller@c2800000 {
27 compatible = "arm,cortex-a9-gic";
28 #interrupt-cells = <3>;
29 #address-cells = <1>;
30 interrupt-controller;
31 reg = <0xc2800000 0x1000>,
32 <0xc2000000 0x1000>;
33 };
34
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35 pmu {
36 compatible = "arm,cortex-a9-pmu";
37 interrupts = <0 83 4>;
38 };
39
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40 /* irqpin0: IRQ0 - IRQ7 */
41 irqpin0: irqpin@e6900000 {
42 compatible = "renesas,intc-irqpin";
43 #interrupt-cells = <2>;
44 interrupt-controller;
45 reg = <0xe6900000 4>,
46 <0xe6900010 4>,
47 <0xe6900020 1>,
48 <0xe6900040 1>,
49 <0xe6900060 1>;
50 interrupt-parent = <&gic>;
51 interrupts = <0 149 0x4
52 0 149 0x4
53 0 149 0x4
54 0 149 0x4
55 0 149 0x4
56 0 149 0x4
57 0 149 0x4
58 0 149 0x4>;
59 };
60
61 /* irqpin1: IRQ8 - IRQ15 */
62 irqpin1: irqpin@e6900004 {
63 compatible = "renesas,intc-irqpin";
64 #interrupt-cells = <2>;
65 interrupt-controller;
66 reg = <0xe6900004 4>,
67 <0xe6900014 4>,
68 <0xe6900024 1>,
69 <0xe6900044 1>,
70 <0xe6900064 1>;
71 interrupt-parent = <&gic>;
72 interrupts = <0 149 0x4
73 0 149 0x4
74 0 149 0x4
75 0 149 0x4
76 0 149 0x4
77 0 149 0x4
78 0 149 0x4
79 0 149 0x4>;
80 };
81
82 /* irqpin2: IRQ16 - IRQ23 */
83 irqpin2: irqpin@e6900008 {
84 compatible = "renesas,intc-irqpin";
85 #interrupt-cells = <2>;
86 interrupt-controller;
87 reg = <0xe6900008 4>,
88 <0xe6900018 4>,
89 <0xe6900028 1>,
90 <0xe6900048 1>,
91 <0xe6900068 1>;
92 interrupt-parent = <&gic>;
93 interrupts = <0 149 0x4
94 0 149 0x4
95 0 149 0x4
96 0 149 0x4
97 0 149 0x4
98 0 149 0x4
99 0 149 0x4
100 0 149 0x4>;
101 };
102
103 /* irqpin3: IRQ24 - IRQ31 */
104 irqpin3: irqpin@e690000c {
105 compatible = "renesas,intc-irqpin";
106 #interrupt-cells = <2>;
107 interrupt-controller;
108 reg = <0xe690000c 4>,
109 <0xe690001c 4>,
110 <0xe690002c 1>,
111 <0xe690004c 1>,
112 <0xe690006c 1>;
113 interrupt-parent = <&gic>;
114 interrupts = <0 149 0x4
115 0 149 0x4
116 0 149 0x4
117 0 149 0x4
118 0 149 0x4
119 0 149 0x4
120 0 149 0x4
121 0 149 0x4>;
122 };
123
124 i2c0: i2c@fff20000 {
125 #address-cells = <1>;
126 #size-cells = <0>;
127 compatible = "renesas,rmobile-iic";
128 reg = <0xfff20000 0x425>;
129 interrupt-parent = <&gic>;
130 interrupts = <0 201 0x4
131 0 202 0x4
132 0 203 0x4
133 0 204 0x4>;
134 };
135
136 i2c1: i2c@e6c20000 {
137 #address-cells = <1>;
138 #size-cells = <0>;
139 compatible = "renesas,rmobile-iic";
140 reg = <0xe6c20000 0x425>;
141 interrupt-parent = <&gic>;
142 interrupts = <0 70 0x4
143 0 71 0x4
144 0 72 0x4
145 0 73 0x4>;
146 };
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